Merge branch 'nr_pdsch_debug' into fix-frame-rx-and-memory

Conflicts:
	executables/nr-ue.c

executables/nr-ue.c

@@ -364,7 +364,12 @@ void processSubframeRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
     nr_ue_dcireq(&UE->dcireq); //to be replaced with function pointer later
     NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
     UE_mac->scheduled_response.dl_config = &UE->dcireq.dl_config_req;
-    UE_mac->scheduled_response.slot = proc->nr_tti_rx;
+    UE_mac->scheduled_response.ul_config = NULL;
+    UE_mac->scheduled_response.tx_request = NULL;
+    UE_mac->scheduled_response.module_id = UE->Mod_id;
+    UE_mac->scheduled_response.CC_id     = 0;
+    UE_mac->scheduled_response.frame = proc->frame_rx;
+    UE_mac->scheduled_response.slot  = proc->nr_tti_rx;
     nr_ue_scheduled_response(&UE_mac->scheduled_response);
     //write_output("uerxdata_frame.m", "uerxdata_frame", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_frame, 1, 1);
 #ifdef UE_SLOT_PARALLELISATION
@@ -724,20 +729,27 @@ void init_UE(int nb_inst) {
   pthread_attr_setschedparam(&attr, &sched);
 
   for (inst=0; inst < nb_inst; inst++) {
-    //    UE->rfdevice.type      = NONE_DEV;
-    //PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
-    LOG_I(PHY,"Initializing memory for UE instance %d (%p)\n",inst,PHY_vars_UE_g[inst]);
     PHY_VARS_NR_UE *UE = PHY_vars_UE_g[inst][0];
     AssertFatal((UE->if_inst = nr_ue_if_module_init(inst)) != NULL, "can not initial IF module\n");
     nr_l3_init_ue();
     nr_l2_init_ue();
-    mac_inst = get_mac_inst(0);
+    mac_inst = get_mac_inst(inst);
     mac_inst->if_module = UE->if_inst;
-    UE->if_inst->scheduled_response = nr_ue_scheduled_response;
-    UE->if_inst->phy_config_request = nr_ue_phy_config_request;
+
+    // Initial bandwidth part configuration -- full carrier bandwidth
+    mac_inst->initial_bwp_dl.bwp_id = 0;
+    mac_inst->initial_bwp_dl.location = 0;
+    mac_inst->initial_bwp_dl.scs = UE->frame_parms.subcarrier_spacing;
+    mac_inst->initial_bwp_dl.N_RB = UE->frame_parms.N_RB_DL;
+    mac_inst->initial_bwp_dl.cyclic_prefix = UE->frame_parms.Ncp;
+    
+    mac_inst->initial_bwp_ul.bwp_id = 0;
+    mac_inst->initial_bwp_ul.location = 0;
+    mac_inst->initial_bwp_ul.scs = UE->frame_parms.subcarrier_spacing;
+    mac_inst->initial_bwp_ul.N_RB = UE->frame_parms.N_RB_UL;
+    mac_inst->initial_bwp_ul.cyclic_prefix = UE->frame_parms.Ncp;
+        
     LOG_I(PHY,"Intializing UE Threads for instance %d (%p,%p)...\n",inst,PHY_vars_UE_g[inst],PHY_vars_UE_g[inst][0]);
-    //init_UE_threads(inst);
-    //UE = PHY_vars_UE_g[inst][0];
     AssertFatal(0 == pthread_create(&threads[inst],
                                     &attr,
                                     UE_thread,

executables/nr-uesoftmodem.c

@@ -196,7 +196,6 @@ int                         rx_input_level_dBm;
 //int                             number_of_cards =   1;
 
 static NR_DL_FRAME_PARMS      *frame_parms[MAX_NUM_CCs];
-static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
 int16_t   node_synch_ref[MAX_NUM_CCs];
 
 uint32_t target_dl_mcs = 28; //maximum allowed mcs
@@ -528,14 +527,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
   for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
     /* Set some default values that may be overwritten while reading options */
     frame_parms[CC_id] = (NR_DL_FRAME_PARMS *) calloc(sizeof(NR_DL_FRAME_PARMS),1);
-    config[CC_id] = (nfapi_nr_config_request_t *) calloc(sizeof(nfapi_nr_config_request_t),1);
-    config[CC_id]->subframe_config.numerology_index_mu.value =1;
-    config[CC_id]->subframe_config.duplex_mode.value = 1; //FDD
-    config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
-    config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
-    config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
-    config[CC_id]->sch_config.physical_cell_id.value = 0;
-
     frame_parms[CC_id]->eutra_band          = 78;
     frame_parms[CC_id]->frame_type          = FDD;
     frame_parms[CC_id]->tdd_config          = 3;
@@ -550,24 +541,7 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
     frame_parms[CC_id]->nb_antennas_tx      = 1;
     frame_parms[CC_id]->nb_antennas_rx      = 1;
     //frame_parms[CC_id]->nushift             = 0;
-    ///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
-    //frame_parms[CC_id]->phich_config_common.phich_duration = normal;
-    // UL RS Config
-    /*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
-    frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
-    frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
-    frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
-
-    frame_parms[CC_id]->pusch_config_common.n_SB = 1;
-    frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
-    frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
-    frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
-
-    frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
-    frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
-    frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
-    frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
-    frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
+
     // NR: Init to legacy LTE 20Mhz params
     frame_parms[CC_id]->numerology_index  = 0;
     frame_parms[CC_id]->ttis_per_subframe = 1;
@@ -759,20 +733,6 @@ int main( int argc, char **argv ) {
     else
       UE[CC_id]->mac_enabled = 1;
 
-    if (UE[CC_id]->mac_enabled == 0) {  //set default UL parameters for testing mode
-      for (int i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
-        //UE[CC_id]->pusch_config_dedicated[i] = malloc(sizeof(PUSCH_CONFIG_DEDICATED));
-        //UE[CC_id]->scheduling_request_config[i] = malloc(sizeof(SCHEDULING_REQUEST_CONFIG));
-        /*UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
-          UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index  = beta_RI;
-          UE[CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
-
-          UE[CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = 0;
-          UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
-          UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;*/
-      }
-    }
-
     UE[CC_id]->UE_scan = UE_scan;
     UE[CC_id]->UE_scan_carrier = UE_scan_carrier;
     UE[CC_id]->UE_fo_compensation = UE_fo_compensation;

openair1/PHY/INIT/nr_init_ue.c

@@ -831,7 +831,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
 	      (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_time[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
       
 	      //  size_t num = 7*2*fp->N_RB_DL*12;
-	      size_t num = 4*100*12;  // 4 symbols, 100 PRBs, 12 REs per PRB
+	      size_t num = 4*273*12;  // 4 symbols, 100 PRBs, 12 REs per PRB
               (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp[idx]        = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
               (*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[idx]       = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
               (*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext[idx]         = (int32_t*)malloc16_clear( sizeof(int32_t) * num );

openair1/PHY/INIT/nr_parms.c

@@ -245,13 +245,6 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
   else
     fp->Lmax = 64;
 
-  // Initial bandwidth part configuration -- full carrier bandwidth
-  fp->initial_bwp_dl.bwp_id = 0;
-  fp->initial_bwp_dl.scs = fp->subcarrier_spacing;
-  fp->initial_bwp_dl.location = 0;
-  fp->initial_bwp_dl.N_RB = fp->N_RB_DL;
-  fp->initial_bwp_dl.cyclic_prefix = fp->Ncp;
-  fp->initial_bwp_dl.ofdm_symbol_size = fp->ofdm_symbol_size;
 
   return 0;
 }
@@ -293,12 +286,6 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *fp)
   LOG_I(PHY,"fp->samples_per_frame_wCP=%d\n",fp->samples_per_frame_wCP);
   LOG_I(PHY,"fp->samples_per_subframe=%d\n",fp->samples_per_subframe);
   LOG_I(PHY,"fp->samples_per_frame=%d\n",fp->samples_per_frame);
-  LOG_I(PHY,"fp->initial_bwp_dl.bwp_id=%d\n",fp->initial_bwp_dl.bwp_id);
-  LOG_I(PHY,"fp->initial_bwp_dl.scs=%d\n",fp->initial_bwp_dl.scs);
-  LOG_I(PHY,"fp->initial_bwp_dl.N_RB=%d\n",fp->initial_bwp_dl.N_RB);
-  LOG_I(PHY,"fp->initial_bwp_dl.cyclic_prefix=%d\n",fp->initial_bwp_dl.cyclic_prefix);
-  LOG_I(PHY,"fp->initial_bwp_dl.location=%d\n",fp->initial_bwp_dl.location);
-  LOG_I(PHY,"fp->initial_bwp_dl.ofdm_symbol_size=%d\n",fp->initial_bwp_dl.ofdm_symbol_size);
 }
 
 

openair1/PHY/NR_TRANSPORT/nr_dlsch.c

@@ -233,7 +233,7 @@ printf("\n");
   for (int q=0; q<rel15->nb_codewords; q++)
     memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
   uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
-  ((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
+  ((pdcch_params.scrambling_id==0)?pdcch_params.rnti:0) : 0;
   uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
   pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
   for (int q=0; q<rel15->nb_codewords; q++)

openair1/PHY/defs_nr_common.h

@@ -161,8 +161,6 @@ typedef struct NR_BWP_PARMS {
   uint8_t location;
   /// Bandwidth in PRB
   uint16_t N_RB;
-  /// Size of FFT/IFFT
-  uint16_t ofdm_symbol_size;
   /// Cyclic prefix
   uint8_t cyclic_prefix;
   /// RBG params
@@ -315,10 +313,6 @@ typedef struct NR_DL_FRAME_PARMS {
   /// PBCH polar encoder params
   t_nrPolar_params pbch_polar_params;
 
-   //BWP params
-  NR_BWP_PARMS initial_bwp_dl;
-  NR_BWP_PARMS initial_bwp_ul;
-
 } NR_DL_FRAME_PARMS;
 
 #define KHz (1000UL)

openair1/SCHED_NR_UE/phy_procedures_nr_ue.c

@@ -3596,22 +3596,26 @@ void copy_harq_proc_struct(NR_DL_UE_HARQ_t *harq_processes_dest, NR_DL_UE_HARQ_t
   memcpy(harq_ack_dest, current_harq_ack, sizeof(nr_harq_status_t));
   }*/
 
-void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1, int s0, int s1) {
+void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_id, PDSCH_t pdsch, NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1) {
 
   int nr_tti_rx = proc->nr_tti_rx;
   int m;
-  int harq_pid;
   int i_mod,eNB_id_i,dual_stream_UE;
   int first_symbol_flag=0;
-  uint16_t pdsch_start_rb = 0;
-  uint16_t pdsch_nb_rb = 50;
 
   if (dlsch0->active == 0)
     return;
 
-  for (m=s0;m<=s1;m++) {
+  if (dlsch0 && (!dlsch1))  {
+    int harq_pid = dlsch0->current_harq_pid;
+    uint16_t pdsch_start_rb = dlsch0->harq_processes[harq_pid]->start_rb;
+    uint16_t pdsch_nb_rb =  dlsch0->harq_processes[harq_pid]->nb_rb;
+    uint16_t s0 =  dlsch0->harq_processes[harq_pid]->start_symbol;
+    uint16_t s1 =  dlsch0->harq_processes[harq_pid]->nb_symbols;
+
+    LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_tti_rx %d, harq_pid %d, rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d\n",ue->Mod_id,pdsch,nr_tti_rx,harq_pid,pdsch_start_rb,pdsch_nb_rb,s0,s1);
 
-    if (dlsch0 && (!dlsch1))  {
+    for (m=s0;m<=s1;m++) {
 
       if (m==s0)
 	nr_pdsch_channel_estimation(ue,
@@ -3622,8 +3626,6 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
 				    ue->frame_parms.first_carrier_offset+pdsch_start_rb*12,
 				    pdsch_nb_rb);
       
-      harq_pid = dlsch0->current_harq_pid;
-      LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_tti_rx %d, harq_pid %d Symbol %d\n",ue->Mod_id,pdsch,nr_tti_rx,harq_pid,m);
 
       dual_stream_UE = 0;
       eNB_id_i = eNB_id+1;
@@ -4440,9 +4442,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
 			   eNB_id,
 			   PDSCH,
 			   ue->dlsch[ue->current_thread_id[nr_tti_rx]][eNB_id][0],
-			   NULL,
-			   nb_symb_pdcch, //ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
-			   (nb_symb_sch+nb_symb_pdcch-1)); //ue->frame_parms.symbols_per_tti>>1,
+			   NULL);
 
     /*
     write_output("rxF.m","rxF",&ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF[0][0],ue->frame_parms.ofdm_symbol_size*14,1,1);
@@ -4464,9 +4464,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
 			   eNB_id,
 			   SI_PDSCH,
 			   ue->dlsch_SI[eNB_id],
-			   NULL,
-			   ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
-			   ue->frame_parms.symbols_per_tti>>1);
+			   NULL);
+    
     VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_SI, VCD_FUNCTION_OUT);
   }
 
@@ -4478,9 +4477,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
 			   eNB_id,
 			   P_PDSCH,
 			   ue->dlsch_p[eNB_id],
-			   NULL,
-			   ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
-			   ue->frame_parms.symbols_per_tti>>1);
+			   NULL);
+
     VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_P, VCD_FUNCTION_OUT);
   }
 
@@ -4492,9 +4490,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
 			   eNB_id,
 			   RA_PDSCH,
 			   ue->dlsch_ra[eNB_id],
-			   NULL,
-			   ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->num_pdcch_symbols,
-			   ue->frame_parms.symbols_per_tti>>1);
+			   NULL);
+
     VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PDSCH_PROC_RA, VCD_FUNCTION_OUT);
   }
 
@@ -4592,9 +4589,7 @@ start_meas(&ue->generic_stat);
 			   eNB_id,
 			   SI_PDSCH,
 			   ue->dlsch_SI[eNB_id],
-			   NULL,
-			   1+(ue->frame_parms.symbols_per_tti>>1),
-			   ue->frame_parms.symbols_per_tti-1);
+			   NULL);
 
     /*ue_dlsch_procedures(ue,
       proc,
@@ -4615,9 +4610,7 @@ start_meas(&ue->generic_stat);
 			   eNB_id,
 			   P_PDSCH,
 			   ue->dlsch_p[eNB_id],
-			   NULL,
-			   1+(ue->frame_parms.symbols_per_tti>>1),
-			   ue->frame_parms.symbols_per_tti-1);
+			   NULL);
 
 
     /*ue_dlsch_procedures(ue,
@@ -4638,9 +4631,7 @@ start_meas(&ue->generic_stat);
 			   eNB_id,
 			   RA_PDSCH,
 			   ue->dlsch_ra[eNB_id],
-			   NULL,
-			   1+(ue->frame_parms.symbols_per_tti>>1),
-			   ue->frame_parms.symbols_per_tti-1);
+			   NULL);
 
     /*ue_dlsch_procedures(ue,
       proc,

openair1/SIMULATION/NR_PHY/dlsim.c

@@ -614,11 +614,19 @@ int main(int argc, char **argv)
   carrier.sizeof_MIB = do_MIB_NR(&carrier,0,ssb_SubcarrierOffset,pdcch_ConfigSIB1,30,2);
 
   nr_rrc_mac_config_req_ue(0,0,0,carrier.mib.message.choice.mib,NULL,NULL,NULL);
-  fapi_nr_dl_config_request_t dl_config; 
+
+  // Initial bandwidth part configuration -- full carrier bandwidth
+  UE_mac->initial_bwp_dl.bwp_id = 0;
+  UE_mac->initial_bwp_dl.location = 0;
+  UE_mac->initial_bwp_dl.scs = UE->frame_parms.subcarrier_spacing;
+  UE_mac->initial_bwp_dl.N_RB = UE->frame_parms.N_RB_DL;
+  UE_mac->initial_bwp_dl.cyclic_prefix = UE->frame_parms.Ncp;
+  
+  fapi_nr_dl_config_request_t *dl_config = &UE_mac->dl_config_request; 
   //  Type0 PDCCH search space
-  dl_config.number_pdus =  1;
-  dl_config.dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234;	//	to be set
+  dl_config->number_pdus =  1;
+  dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234;	
   
   uint64_t mask = 0x0;
   uint16_t num_rbs=24;
@@ -629,16 +637,16 @@ int main(int argc, char **argv)
     mask = mask >> 1;
     mask = mask | 0x100000000000;
   }
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.frequency_domain_resource = mask;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.rb_offset = rb_offset;  //  additional parameter other than coreset
   
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 0;   //  L 38.211 7.3.2.2
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 0;  //  R 38.211 7.3.2.2
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.duration = num_symbols;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_mapping_type =CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_reg_bundle_size = 0;   //  L 38.211 7.3.2.2
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_interleaver_size = 0;  //  R 38.211 7.3.2.2
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.cce_reg_interleaved_shift_index = cell_id;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.coreset.pdcch_dmrs_scrambling_id = cell_id;
   
   uint32_t number_of_search_space_per_slot=1;
   uint32_t first_symbol_index=0;
@@ -647,15 +655,23 @@ int main(int argc, char **argv)
   
   coreset_duration = num_symbols * number_of_search_space_per_slot;
   
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[0] = table_38213_10_1_1_c2[0];
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[1] = table_38213_10_1_1_c2[1];
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[2] = table_38213_10_1_1_c2[2];   //  CCE aggregation level = 4
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[3] = table_38213_10_1_1_c2[3];   //  CCE aggregation level = 8
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[4] = table_38213_10_1_1_c2[4];   //  CCE aggregation level = 16
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
-
-  dl_config.dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = N_RB_DL;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[0] = table_38213_10_1_1_c2[0];
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[1] = table_38213_10_1_1_c2[1];
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[2] = table_38213_10_1_1_c2[2];   //  CCE aggregation level = 4
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[3] = table_38213_10_1_1_c2[3];   //  CCE aggregation level = 8
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.number_of_candidates[4] = table_38213_10_1_1_c2[4];   //  CCE aggregation level = 16
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
+
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = N_RB_DL;
+
+  UE_mac->scheduled_response.dl_config = dl_config;
+  UE_mac->scheduled_response.ul_config = NULL;
+  UE_mac->scheduled_response.tx_request = NULL;
+  UE_mac->scheduled_response.module_id = 0;
+  UE_mac->scheduled_response.CC_id = 0;
+  UE_mac->scheduled_response.frame = frame;
+  UE_mac->scheduled_response.slot = slot;
 
   for (SNR=snr0; SNR<snr1; SNR+=.2) {
 
@@ -699,7 +715,6 @@ int main(int argc, char **argv)
 	UE_proc.nr_tti_rx= slot;
 	UE_proc.subframe_rx = slot;
 	
-	UE_mac->scheduled_response.dl_config = &dl_config;
 	nr_ue_scheduled_response(&UE_mac->scheduled_response);
 
 	printf("Running phy procedures UE RX %d.%d\n",frame,slot);

openair1/SIMULATION/NR_PHY/pbchsim.c

@@ -617,8 +617,7 @@ int main(int argc, char **argv)
 	  	      i,
 		      0,
 		      0,
-		      0,
-		      NR_PBCH_EST);
+		      0);
 
           nr_pbch_channel_estimation(UE,0,0,i,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
         }

openair2/LAYER2/NR_MAC_UE/mac_defs.h

@@ -57,6 +57,8 @@
 #include "fapi_nr_ue_interface.h"
 #include "NR_IF_Module.h"
 
+#include "PHY/defs_nr_common.h"
+
 #define NB_NR_UE_MAC_INST 1
 
 typedef enum {
@@ -64,44 +66,42 @@ typedef enum {
     SFN_C_MOD_2_EQ_1
 } SFN_C_TYPE;
 
+
 /*!\brief Top level UE MAC structure */
 typedef struct {
-    
-    ////  MAC config
-    NR_DRX_Config_t    	            *drx_Config;
-    NR_SchedulingRequestConfig_t    *schedulingRequestConfig;
-    NR_BSR_Config_t    	            *bsr_Config;
-    NR_TAG_Config_t		            *tag_Config;
-    NR_PHR_Config_t		            *phr_Config;
-    NR_RNTI_Value_t 	            *cs_RNTI;
-	NR_MIB_t 			            *mib;
-
-    ///     Type0-PDCCH seach space
-    fapi_nr_dl_config_dci_dl_pdu_rel15_t type0_pdcch_dci_config;
-    uint32_t type0_pdcch_ss_mux_pattern;
-    SFN_C_TYPE type0_pdcch_ss_sfn_c;
-    uint32_t type0_pdcch_ss_n_c;
-    uint32_t type0_pdcch_consecutive_slots;
-
-    ///     Random access parameter
-    uint16_t ra_rnti;
-
-
-	////	FAPI-like interface message
-	fapi_nr_tx_request_t tx_request;
-	fapi_nr_ul_config_request_t ul_config_request;
-	fapi_nr_dl_config_request_t dl_config_request;
-
-
-
-	///     Interface module instances
-	nr_ue_if_module_t *if_module;
-	nr_scheduled_response_t	scheduled_response;
-	nr_phy_config_t phy_config;
-
-
-
-
+  
+  ////  MAC config
+  NR_DRX_Config_t    	          *drx_Config;
+  NR_SchedulingRequestConfig_t    *schedulingRequestConfig;
+  NR_BSR_Config_t    	          *bsr_Config;
+  NR_TAG_Config_t	          *tag_Config;
+  NR_PHR_Config_t	          *phr_Config;
+  NR_RNTI_Value_t 	          *cs_RNTI;
+  NR_MIB_t 	                  *mib;
+  
+  ///     Type0-PDCCH seach space
+  fapi_nr_dl_config_dci_dl_pdu_rel15_t type0_pdcch_dci_config;
+  uint32_t type0_pdcch_ss_mux_pattern;
+  SFN_C_TYPE type0_pdcch_ss_sfn_c;
+  uint32_t type0_pdcch_ss_n_c;
+  uint32_t type0_pdcch_consecutive_slots;
+  
+  ///     Random access parameter
+  uint16_t ra_rnti;
+
+   //BWP params
+  NR_BWP_PARMS initial_bwp_dl;
+  NR_BWP_PARMS initial_bwp_ul;
+
+  ////	FAPI-like interface message
+  fapi_nr_tx_request_t tx_request;
+  fapi_nr_ul_config_request_t ul_config_request;
+  fapi_nr_dl_config_request_t dl_config_request;
+
+  ///     Interface module instances
+  nr_ue_if_module_t       *if_module;
+  nr_scheduled_response_t scheduled_response;
+  nr_phy_config_t         phy_config;
 } NR_UE_MAC_INST_t;
 
 typedef enum seach_space_mask_e {

openair2/LAYER2/NR_MAC_UE/mac_vars.c

@@ -90,7 +90,7 @@ const float   table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f
 
 const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
 
-
+/*
  #define mu_pusch 1
 // definition table j Table 6.1.2.1.1-4
  #define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1)
@@ -131,4 +131,5 @@ const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
   {0,2,4},  // row index 14
   {0,4,7},  // row index 15
   {0,8,4}   // row index 16
-  };
\ No newline at end of file
+  };
+*/

openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c

@@ -236,12 +236,12 @@ int8_t nr_ue_decode_mib(
 #ifdef DEBUG_MIB
 		printf("system frame number(6 MSB bits): %d\n",  mac->mib->systemFrameNumber.buf[0]);
 		printf("system frame number(with LSB): %d\n", (int)frame);
-		printf("subcarrier spacing:            %d\n", (int)mac->mib->subCarrierSpacingCommon);
+		printf("subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
 		printf("ssb carrier offset(with MSB):  %d\n", (int)ssb_subcarrier_offset);
-		printf("dmrs type A position:          %d\n", (int)mac->mib->dmrs_TypeA_Position);
+		printf("dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
 		printf("pdcch config sib1:             %d\n", (int)mac->mib->pdcch_ConfigSIB1);
-		printf("cell barred:                   %d\n", (int)mac->mib->cellBarred);
-		printf("intra frequency reselection:   %d\n", (int)mac->mib->intraFreqReselection);
+		printf("cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
+		printf("intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
 		printf("half frame bit(extra bits):    %d\n", (int)half_frame_bit);
 		printf("ssb index(extra bits):         %d\n", (int)ssb_index);
 #endif
@@ -662,9 +662,10 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
         dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
         dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
     	
+	/*
     	dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa;	//	to be set
     	dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106;	//	to be set
-	/*
+
 	printf("nr_ue_scheduler Type0 PDCCH with rnti %x, BWP %d\n",
 	       dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti,
 	       dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP);  
@@ -1124,19 +1125,19 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
   fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu,
   fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
   uint8_t time_domain_ind,
-  long dmrs_typeA_pos
+  long dmrs_typeA_pos //0=pos2,1=pos3
 ){
   uint8_t k_offset=0;
   uint8_t sliv_S=0;
   uint8_t sliv_L=0;
   uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9},  // row index 2
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8},   // row index 3
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6},   // row index 4
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4},   // row index 5
-  {0,(dmrs_typeA_pos == 2)?9:10,(dmrs_typeA_pos == 2)?4:4},   // row index 6
-  {0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4},   // row index 7
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?12:11}, // row index 1
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9},  // row index 2
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8},   // row index 3
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6},   // row index 4
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4},   // row index 5
+  {0,(dmrs_typeA_pos == 0)?9:10,(dmrs_typeA_pos == 0)?4:4},   // row index 6
+  {0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4},   // row index 7
   {0,5,7},  // row index 8
   {0,5,2},  // row index 9
   {0,9,2},  // row index 10
@@ -1148,13 +1149,13 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
   {0,8,4}   // row index 16
   };
   uint8_t table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?6:5},   // row index 1
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9},  // row index 2
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8},   // row index 3
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6},   // row index 4
-  {0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4},   // row index 5
-  {0,(dmrs_typeA_pos == 2)?6:8, (dmrs_typeA_pos == 2)?4:2},   // row index 6
-  {0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4},   // row index 7
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?6:5},   // row index 1
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?10:9},  // row index 2
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?9:8},   // row index 3
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?7:6},   // row index 4
+  {0,(dmrs_typeA_pos == 0)?2:3, (dmrs_typeA_pos == 0)?5:4},   // row index 5
+  {0,(dmrs_typeA_pos == 0)?6:8, (dmrs_typeA_pos == 0)?4:2},   // row index 6
+  {0,(dmrs_typeA_pos == 0)?4:6, (dmrs_typeA_pos == 0)?4:4},   // row index 7
   {0,5,6},  // row index 8
   {0,5,2},  // row index 9
   {0,9,2},  // row index 10
@@ -1179,7 +1180,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
   {0,8,4},  // row index 11
   {0,10,4}, // row index 12
   {0,2,7},  // row index 13
-  {0,(dmrs_typeA_pos == 2)?2:3,(dmrs_typeA_pos == 2)?12:11},  // row index 14
+  {0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11},  // row index 14
   {1,2,4},  // row index 15
   {0,0,0}   // row index 16
   };
@@ -1197,7 +1198,7 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
   {0,8,4},  // row index 11
   {0,10,4}, // row index 12
   {0,2,7},  // row index 13
-  {0,(dmrs_typeA_pos == 2)?2:3,(dmrs_typeA_pos == 2)?12:11},  // row index 14
+  {0,(dmrs_typeA_pos == 0)?2:3,(dmrs_typeA_pos == 0)?12:11},  // row index 14
   {0,0,6},  // row index 15
   {0,2,6}   // row index 16
   };
@@ -1245,9 +1246,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
  * TS 38.214 subclause 5.1.2.1 Resource allocation in time domain (downlink)
  */
   if(dlsch_config_pdu != NULL){
-      k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][0];
-      sliv_S   = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
-      sliv_L   = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
+      k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
+      sliv_S   = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1];
+      sliv_L   = table_5_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2];
       // k_offset = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
       // sliv_S   = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
       // sliv_L   = table_5_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
@@ -1264,9 +1265,9 @@ int8_t nr_ue_process_dci_time_dom_resource_assignment(
  * TS 38.214 subclause 6.1.2.1 Resource allocation in time domain (uplink)
  */
   if(ulsch_config_pdu != NULL){
-      k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][0];
-      sliv_S   = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][1];
-      sliv_L   = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind][2];
+      k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][0];
+      sliv_S   = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][1];
+      sliv_L   = table_6_1_2_1_1_2_time_dom_res_alloc_A[time_domain_ind-1][2];
       // k_offset = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][0];
       // sliv_S   = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][1];
       // sliv_L   = table_6_1_2_1_1_3_time_dom_res_alloc_A_extCP[nr_pdci_info_extracted->time_dom_resource_assignment][2];
@@ -1284,10 +1285,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
     fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
     fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
     
-    const uint16_t n_RB_ULBWP = 106;
-    const uint16_t n_RB_DLBWP = 106;
+    //const uint16_t n_RB_DLBWP = dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP; //make sure this has been set
+    const uint16_t n_RB_DLBWP = mac->initial_bwp_dl.N_RB;
+    const uint16_t n_RB_ULBWP = mac->initial_bwp_ul.N_RB;
 
-    printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d\n",dci_format);
+    printf("\n>>> nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP);
 
     switch(dci_format){
         case format0_0:
@@ -1768,7 +1770,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
                   dlsch_config_pdu_1_0->pdsch_to_harq_feedback_time_ind);
 
             dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
-
+	    dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
+	    
             printf(">>> (nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
             
             dl_config->number_pdus = dl_config->number_pdus + 1;
@@ -1953,7 +1956,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fa
         /* DMRS_SEQ_INI */
             //FIXME!!!
 
-            
+	    dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.N_RB_BWP = n_RB_DLBWP;
+	    
             dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
             printf(">>> (nr_ue_procedures.c) pdu_type=%d\n\n",dl_config->dl_config_list[dl_config->number_pdus].pdu_type);
             

openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c

@@ -277,6 +277,7 @@ int nr_ue_if_module_kill(uint32_t module_id) {
 int nr_ue_dcireq(nr_dcireq_t *dcireq) {
   
   fapi_nr_dl_config_request_t *dl_config=&dcireq->dl_config_req;
+  NR_UE_MAC_INST_t *UE_mac = get_mac_inst(0);
   
   //  Type0 PDCCH search space
   dl_config->number_pdus =  1;
@@ -318,7 +319,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
   dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.duration = search_space_duration;
   dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
 
-  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = 106;
+  dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.N_RB_BWP = UE_mac->initial_bwp_dl.N_RB;
 
   
   return 0;