Commit d31bf6f9 authored by Raymond Knopp's avatar Raymond Knopp

Merge remote-tracking branch 'origin/develop-nr' into nr-polar-encoder-optimizations

Conflicts:
	openair1/PHY/NR_TRANSPORT/nr_pbch.c
parents 1d97d9cb ce264164
dev 1 128-ues 256_QAM_demod 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 512-dataplane-bug-in-l2nfapi_nos1 5g_fapi_scf FR2_NSA Fix_SA_SIB1 LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_PUCCH_bugfixes NR_UE_RA_fixes NR_UE_SA NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_cleanup_PUCCH_resources NR_gNB_SCF_Indication NR_gNB_initial_MIB_fix NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_multiplexing_HARQ_CSI_PUCCH NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm OpInConnect_ISIP PBCHNRTCFIX PUSCH_TA_update RA_CI_test RFquality Saankhya_NRPRACH_HighSpeed Test_SA_5GREC UE_DL_DCI_hotfix add-dmrs-test add-ru-docker-image addoptions_nr_USRPdevice avxllr bandwidth-testing bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old bsr-fix bugfix-free-ra-process bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-rd-july-improvements ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_vm_resource_fix clean-5G-scope-round2 cleanup_softmodem_main constant_power debug-UL-5GRECORDS debug_UL_signal debug_branch_init_sync detached-w16-test develop develop-CBRA-v3 develop-CCE develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aw2sori develop-ci develop-nr develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-wf-du develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_stable dfts_alternatives disable_CSI_measrep dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docker-improvements-2021-april docker-no-cache-option docupdate_tools dongzhanyi-zte-develop dongzhanyi-zte-develop1 dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dual-connectivity edrx enhance-rfsim episys-merge episys/nsa_baseline episys/nsa_development extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feat-mac-sock feature-4g-sched feature-nr-4g-nfapi-modifications feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fedora-gen-kernel-fix fembms-enb-ue fft_bench_hotfix finalize-oaicn-integration firas fix-check fix-ci-tun fix-clock-source fix-compile fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-retransmission-rbg fix-softmodem-restart fix-warnings fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-improvements flexran-repair-mme-mgmt flexran-rtc-repo-is-public fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 gNB-nrUE-USRP generate_push_ptrs git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability integ-w13-test-rt-issue integration-develop-nr-2019w45 integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_w5GC_CBRA_test inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip_nr itti-enhancement l2-fixes ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_offload_t1 ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-coreset-bug-fix nr-dl-mimo-2layer nr-dlsch-multi-thread nr-dlsch-thread nr-dmrs-fixes nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-pdsch-extraction-bugfix nr-physim-update nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-stats-print nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_improve_chanest nr_increase_tp nr_pdcch_testing nr_pdcch_updates nr_pdsch_integration nr_polar_decoder_improvement nr_power_measurement_fixes nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark pdsch-ch-est phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases polar8 prb_based_dl_channel_estimation ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul recursive-cmake reduce_memory_footprint remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rohan_ulsim2RxFix rrc-enb-phy-testmode ru-parallel-beamforming runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai scs_60_iisc sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes smallcleanup softmodem_cleanup split73 t-gnb-tracer test-5GREC test-nsa-benetel test-panos test-x310-perf test_nsa_gtpu_fix test_rt-fix_phy-test testing_2symb_pdcch testing_with_external_txdata thread-pool tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-dci-false-detection ue-fixes ue-fixes-ota ue-pdsch-pusch-parallel ue-race-fix ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest x2-endc-processing x2_handle_sctp_shutdown xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 osa-etsi-ws-try2 osa-etsi-ws-gNB nr-ip-over-lte nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-pdcch develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 develop-nr-2019w28 develop-nr-2019w23 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
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......@@ -144,6 +144,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
nr_init_pdcch_dmrs(gNB, cfg->sch_config.physical_cell_id.value);
nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
/*
lte_gold(fp,gNB->lte_gold_table,fp->Nid_cell);
......
......@@ -22,6 +22,7 @@
/*! \file PHY/NR_TRANSPORT/nr_pbch.c
* \brief Top-level routines for generating the PBCH/BCH physical/transport channel V15.1 03/2018
* \author Guy De Souza
* \thanks Special Thanks to Son Dang for helpfull contributions and testing
* \date 2018
* \version 0.1
* \company Eurecom
......@@ -39,9 +40,11 @@
//#define DEBUG_PBCH_ENCODING
//#define DEBUG_PBCH_DMRS
//extern short nr_mod_table[NR_MOD_TABLE_SIZE_SHORT];
#include "PHY/NR_REFSIG/nr_mod_table.h"
uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
int nr_generate_pbch_dmrs(uint32_t *gold_pbch_dmrs,
int32_t **txdataF,
int16_t amp,
......@@ -152,66 +155,83 @@ void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t encoded)
{
uint8_t encoded,
uint32_t unscrambling_mask) {
uint8_t reset, offset;
uint32_t x1, x2, s=0;
uint32_t *pbch_e = pbch->pbch_e;
uint32_t unscrambling_mask = 0x100006D;
reset = 1;
// x1 is set in lte_gold_generic
x2 = Nid;
// The Gold sequence is shifted by nushift* M, so we skip (nushift*M /32) double words
for (int i=0; i<(uint16_t)ceil(((float)nushift*M)/32); i++) {
s = lte_gold_generic(&x1, &x2, reset);
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
// Scrambling is now done with offset (nushift*M)%32
offset = (nushift*M)&0x1f;
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling params: nushift %d M %d length %d encoded %d offset %d\n", nushift, M, length, encoded, offset);
#endif
for (int i=0; i<length; i++) {
if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
#ifdef DEBUG_PBCH_ENCODING
printf("s: %04x\t", s);
#endif
if (!encoded)
pbch->pbch_a_prime ^= ((unscrambling_mask>>i)&1)? ((pbch->pbch_a_interleaved>>i)&1)<<i : (((pbch->pbch_a_interleaved>>i)&1) ^ ((s>>((i+offset)&0x1f))&1))<<i;
int k = 0;
if (!encoded) {
/// 1st Scrambling
for (int i = 0; i < length; ++i) {
if ((unscrambling_mask>>i)&1)
pbch->pbch_a_prime ^= ((pbch->pbch_a_interleaved>>i)&1)<<i;
else {
if (((k+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
pbch->pbch_a_prime ^= (((pbch->pbch_a_interleaved>>i)&1) ^ ((s>>((k+offset)&0x1f))&1))<<i;
k++; /// k increase only when payload bit is not special bit
}
}
} else {
/// 2nd Scrambling
for (int i = 0; i < length; ++i) {
if (((i+offset)&0x1f)==0) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
else
pbch_e[i>>5] ^= (((s>>((i+offset)&0x1f))&1)<<(i&0x1f));
}
}
}
// This portion of code is temporarily kept until the optimized version is validated
uint8_t nr_pbch_payload_interleaving_pattern[32] = {16, 23, 18, 17, 8, 30, 10, 6, 24, 7, 0, 5, 3, 2, 1, 4,
9, 11, 12, 13, 14, 15, 19, 20, 21, 22, 25, 26, 27, 28, 29, 31};
uint8_t nr_pbch_payload_interleaver(uint8_t i) {
uint8_t j_sfn=6, j_hrf=10, j_ssb=11, j_other=14;
if (24<=i && i<=27) //Sfn bits
return nr_pbch_payload_interleaving_pattern[j_sfn + i -24];
else if (i==28) // Hrf bit
return nr_pbch_payload_interleaving_pattern[j_hrf];
else if (29<=i) // Ssb bits
return nr_pbch_payload_interleaving_pattern[j_ssb + (i-29)];
else
return nr_pbch_payload_interleaving_pattern[(j_other + i)&0x1f];
void nr_init_pbch_interleaver(uint8_t *interleaver) {
uint8_t j_sfn=0, j_hrf=10, j_ssb=11, j_other=14;
memset((void*)interleaver,0, NR_POLAR_PBCH_PAYLOAD_BITS);
for (uint8_t i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
if (!i) // choice bit:1
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_other++);
else if (i<7) //Sfn bits:6
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_sfn++);
else if (i<24) // other:17
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_other++);
else if (i<28) // Sfn:4
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_sfn++);
else if (i==28) // Hrf bit:1
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_hrf);
else // Ssb bits:3
*(interleaver+i) = *(nr_pbch_payload_interleaving_pattern+j_ssb++);
}
/*This pattern takes into account the adjustments for the field specific counters j_sfn, j_hrf, j_ssb and j_other*/
//uint8_t nr_pbch_payload_interleaving_pattern[32] = {1,4,9,11,12,13,14,15,19,20,21,22,25,26,27,28,
// 29,31,16,23,18,17,8,30,10,6,24,7,0,5,3,2};
int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
......@@ -229,50 +249,42 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t idx=0;
uint16_t M;
uint8_t nushift;
uint8_t *xbyte = pbch->pbch_a;
memset((void*) xbyte, 0, 1);
//uint8_t pbch_a_b[32];
uint32_t unscrambling_mask;
// LOG_D(PHY, "PBCH generation started\n");
LOG_I(PHY, "PBCH generation started\n");
memset((void*)pbch, 0, sizeof(NR_gNB_PBCH));
///Payload generation
// Fix byte endian
if (!(sfn&7))
for (int i=0; i<(NR_PBCH_PDU_BITS>>3); i++)
pbch->pbch_a[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_pdu[i];
memset((void*)pbch, 0, sizeof(NR_gNB_PBCH));
pbch->pbch_a=0;
for (int i=0; i<NR_PBCH_PDU_BITS; i++)
pbch->pbch_a |= ((pbch_pdu[2-(i>>3)]>>(7-(i&7)))&1)<<i;
#ifdef DEBUG_PBCH_ENCODING
printf("Byte endian fix:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%02x\n", i, pbch->pbch_a[i]);
for (int i=0; i<3; i++)
printf("pbch_pdu[%d]: 0x%02x\n", i, pbch_pdu[i]);
printf("PBCH payload = 0x%08x\n",pbch->pbch_a);
#endif
// Extra byte generation
for (int i=0; i<4; i++)
(*xbyte) ^= ((sfn>>i)&1)<<i; // 4 lsb of sfn
pbch->pbch_a |= ((sfn>>(3-i))&1)<<(24+i); // resp. 4th, 3rd, 2nd ans 1st lsb of sfn
(*xbyte) ^= n_hf<<4; // half frame index bit
pbch->pbch_a |= n_hf<<28; // half frame index bit
if (Lmax == 64)
for (int i=0; i<3; i++)
(*xbyte) ^= ((ssb_index>>(3+i))&1)<<(5+i); // resp. 4th, 5th and 6th bits of ssb_index
pbch->pbch_a |= ((ssb_index>>(5-i))&1)<<(29+i); // resp. 6th, 5th and 4th bits of ssb_index
else
(*xbyte) ^= ((config->sch_config.ssb_subcarrier_offset.value>>5)&1)<<5; //MSB of k_SSB
#ifdef DEBUG_PBCH_ENCODING
printf("Extra byte:\n");
for (int i=0; i<4; i++)
printf("pbch_a[%d]: 0x%02x\n", i, pbch->pbch_a[i]);
#endif
pbch->pbch_a |= ((config->sch_config.ssb_subcarrier_offset.value>>4)&1)<<29; //MSB of k_SSB (bit index 4)
// Payload interleaving
uint32_t in=0;//, out=0;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
in |= (uint32_t)(pbch->pbch_a[i]<<((3-i)<<3));
LOG_I(PHY,"After extra byte: pbch_a = 0x%08x\n",pbch->pbch_a);
for (int i=0; i<32; i++) {
pbch->pbch_a_interleaved |= ((in>>i)&1)<<(nr_pbch_payload_interleaver(i));//nr_pbch_payload_interleaving_pattern[i]
// Payload interleaving
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++) {
pbch->pbch_a_interleaved |= ((pbch->pbch_a>>i)&1)<<(*(interleaver+i));
#ifdef DEBUG_PBCH_ENCODING
printf("i %d in 0x%08x out 0x%08x ilv %d (in>>i)&1) %d\n", i, in, pbch->pbch_a_interleaved, nr_pbch_payload_interleaver(i), (in>>i)&1);
printf("i %d out 0x%08x ilv %d (in>>i)&1) %d\n", i, pbch->pbch_a_interleaved, *(interleaver+i), (pbch->pbch_a>>i)&1);
#endif
}
......@@ -282,10 +294,11 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
#endif
// Scrambling
unscrambling_mask = (Lmax ==64)? 0x100006D:0x1000041;
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = (((sfn>>2)&1)<<1) ^ ((sfn>>1)&1);
pbch->pbch_a_prime = 0;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0);
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_PAYLOAD_BITS, 0, unscrambling_mask);
#ifdef DEBUG_PBCH_ENCODING
printf("Payload scrambling: nushift %d M %d sfn3 %d sfn2 %d\n", nushift, M, (sfn>>2)&1, (sfn>>1)&1);
printf("pbch_a_prime: 0x%08x\n", pbch->pbch_a_prime);
......@@ -303,7 +316,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
/// Scrambling
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1);
nr_pbch_scrambling(pbch, (uint32_t)config->sch_config.physical_cell_id.value, nushift, M, NR_POLAR_PBCH_E, 1, 0);
#ifdef DEBUG_PBCH_ENCODING
printf("Scrambling:\n");
for (int i=0; i<NR_POLAR_PBCH_E_DWORD; i++)
......
......@@ -75,7 +75,8 @@ void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t encoded);
uint8_t encoded,
uint32_t unscrambling_mask);
/*!
\fn int nr_generate_pbch
......@@ -86,6 +87,7 @@ void nr_pbch_scrambling(NR_gNB_PBCH *pbch,
int nr_generate_pbch(NR_gNB_PBCH *pbch,
t_nrPolar_paramsPtr polar_params,
uint8_t *pbch_pdu,
uint8_t *interleaver,
int32_t **txdataF,
int16_t amp,
uint8_t ssb_start_symbol,
......@@ -102,6 +104,6 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
@param bit index i of the input payload
@returns the bit index of the output
*/
uint8_t nr_pbch_payload_interleaver(uint8_t i);
void nr_init_pbch_interleaver(uint8_t *interleaver);
#endif /*__NR_TRANSPORT__H__*/
......@@ -436,14 +436,14 @@ void nr_pbch_unscrambling(NR_UE_PBCH *pbch,
uint8_t nushift,
uint16_t M,
uint16_t length,
uint8_t bitwise)
uint8_t bitwise,
uint32_t unscrambling_mask)
{
uint8_t reset, offset;
uint32_t x1, x2, s=0;
uint8_t k=0;
int16_t *demod_pbch_e = pbch->llr;
uint32_t unscrambling_mask = 0x100006D;
reset = 1;
// x1 is set in first call to lte_gold_generic
......@@ -469,7 +469,8 @@ void nr_pbch_unscrambling(NR_UE_PBCH *pbch,
#endif
if (bitwise) {
(pbch->pbch_a_interleaved) ^= ((unscrambling_mask>>i)&1)? ((pbch->pbch_a_prime>>i)&1)<<i : (((pbch->pbch_a_prime>>i)&1) ^ ((s>>((i+offset)&0x1f))&1))<<i;
(pbch->pbch_a_interleaved) ^= ((unscrambling_mask>>i)&1)? ((pbch->pbch_a_prime>>i)&1)<<i : (((pbch->pbch_a_prime>>i)&1) ^ ((s>>((k+offset)&0x1f))&1))<<i;
k+=!((unscrambling_mask>>i)&1);
}
else {
......@@ -507,7 +508,7 @@ unsigned char sign(int8_t x) {
}
*/
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,1,29,25,27,22,2,24,3,4,5,6,7,18,21,20,8,9,10,11,19,26,12,13,14,15,16,23,17};
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,7,29,25,27,5,8,24,9,10,11,12,13,1,4,3,14,15,16,17,2,26,18,19,20,21,22,30,23};
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
......@@ -647,7 +648,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//un-scrambling
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? ssb_index&3 : ssb_index&7;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0);
uint32_t unscrambling_mask = (Lmax==64)?0x100006D:0x1000041;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0);
......@@ -668,18 +670,18 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
if(decoderState > 0) return(decoderState);
//printf("polar decoder output 0x%08x\n",nr_ue_pbch_vars->pbch_a_prime);
printf("polar decoder output 0x%08x\n",nr_ue_pbch_vars->pbch_a_prime);
//payload un-scrambling
memset(&nr_ue_pbch_vars->pbch_a_interleaved, 0, sizeof(uint32_t) );
M = (Lmax == 64)? (NR_POLAR_PBCH_PAYLOAD_BITS - 6) : (NR_POLAR_PBCH_PAYLOAD_BITS - 3);
nushift = ((nr_ue_pbch_vars->pbch_a_prime>>6)&1) ^ (((nr_ue_pbch_vars->pbch_a_prime>>24)&1)<<1);
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_PAYLOAD_BITS,1);
nushift = ((nr_ue_pbch_vars->pbch_a_prime>>24)&1) ^ (((nr_ue_pbch_vars->pbch_a_prime>>6)&1)<<1);
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_PAYLOAD_BITS,1,unscrambling_mask);
printf("nushift %d sfn 3rd %d 2nd %d", nushift,((nr_ue_pbch_vars->pbch_a_prime>>6)&1), ((nr_ue_pbch_vars->pbch_a_prime>>24)&1) );
//payload deinterleaving
//uint32_t in=0;
uint32_t out=0;
for (int i=0; i<32; i++) {
out |= ((nr_ue_pbch_vars->pbch_a_interleaved>>i)&1)<<(pbch_deinterleaving_pattern[i]);
#ifdef DEBUG_PBCH
......@@ -687,14 +689,18 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#endif
}
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS>>3; i++)
decoded_output[i] = (uint8_t)((out>>(i<<3))&0xff);
uint32_t payload = 0;
uint8_t xtra_byte = 0;
xtra_byte = (out>>24)&0xff;
for (int i=0; i<NR_POLAR_PBCH_PAYLOAD_BITS; i++)
payload |= ((out>>i)&1)<<(NR_POLAR_PBCH_PAYLOAD_BITS-i-1);
for (int i=0; i<3; i++)
decoded_output[i] = (uint8_t)((payload>>((3-i)<<3))&0xff);
// Fix byte endian
// for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++)
// decoded_output[(NR_POLAR_PBCH_PAYLOAD_BITS>>3)-i-1] = pbch_a[i];
#ifdef DEBUG_PBCH
printf("xtra_byte %x payload %x\n", xtra_byte, payload);
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
// printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
......@@ -707,7 +713,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[0];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = decoded_output[3];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = xtra_byte;
ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
......
......@@ -32,6 +32,9 @@
#include <stdint.h>
#include "PHY/sse_intrin.h"
#define CEILIDIV(a,b) ((a+b-1)/b)
#define ROUNDIDIV(a,b) (((a<<1)+b)/(b<<1))
struct complex {
double x;
......
......@@ -41,7 +41,7 @@
#define MAX_NUM_RU_PER_gNB MAX_NUM_RU_PER_eNB
typedef struct {
uint8_t pbch_a[NR_POLAR_PBCH_PAYLOAD_BITS>>3];
uint32_t pbch_a;
uint32_t pbch_a_interleaved;
uint32_t pbch_a_prime;
uint32_t pbch_e[NR_POLAR_PBCH_E_DWORD];
......@@ -323,6 +323,9 @@ typedef struct PHY_VARS_gNB_s {
/// PBCH DMRS sequence
uint32_t nr_gold_pbch_dmrs[2][64][NR_PBCH_DMRS_LENGTH_DWORD];
/// PBCH interleaver
uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
/// PDCCH DMRS sequence
uint32_t ***nr_gold_pdcch_dmrs;
......
......@@ -146,7 +146,15 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int subframe) {
gNB->pbch_configured = 0;
}
nr_generate_pbch_dmrs(gNB->nr_gold_pbch_dmrs[n_hf][ssb_index],txdataF, AMP_OVER_2, ssb_start_symbol, cfg, fp);
nr_generate_pbch(&gNB->pbch, gNB->nrPolar_params, pbch_pdu, txdataF, AMP_OVER_2, ssb_start_symbol, n_hf, Lmax, ssb_index, frame, cfg, fp);
nr_generate_pbch(&gNB->pbch,
gNB->nrPolar_params,
pbch_pdu,
gNB->nr_pbch_interleaver,
txdataF,
AMP_OVER_2,
ssb_start_symbol,
n_hf,Lmax,ssb_index,
frame, cfg, fp);
}
}
......
......@@ -221,7 +221,7 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
......
......@@ -210,12 +210,14 @@ int8_t nr_ue_decode_mib(
AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n");
//if(mac->mib != NULL){
uint32_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused);
uint32_t frame_number_4lsb = (uint32_t)(extra_bits & 0xf); // extra bits[0:3]
uint32_t half_frame_bit = (uint32_t)(( extra_bits >> 4 ) & 0x1 ); // extra bits[4]
uint32_t ssb_subcarrier_offset_msb = (uint32_t)(( extra_bits >> 5 ) & 0x1 ); // extra bits[5]
uint16_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused);
uint16_t frame_number_4lsb = 0;
for (int i=0; i<4; i++)
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
uint32_t ssb_subcarrier_offset = mac->mib->ssb_SubcarrierOffset;
uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset;
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
......@@ -238,7 +240,7 @@ int8_t nr_ue_decode_mib(
printf("dmrs type A position: %d\n", (int)mac->mib->dmrs_TypeA_Position);
printf("pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1);
printf("cell barred: %d\n", (int)mac->mib->cellBarred);
printf("intra frequcney reselection: %d\n", (int)mac->mib->intraFreqReselection);
printf("intra frequency reselection: %d\n", (int)mac->mib->intraFreqReselection);
printf("half frame bit(extra bits): %d\n", (int)half_frame_bit);
printf("ssb index(extra bits): %d\n", (int)ssb_index);
#endif
......@@ -254,7 +256,6 @@ int8_t nr_ue_decode_mib(
}else{ //NR_MIB__subCarrierSpacingCommon_scs30or120
scs_pdcch = scs_30kHz;
}
scs_pdcch = 2;
channel_bandwidth_t min_channel_bw = bw_40MHz; // deafult for testing
......
......@@ -167,4 +167,8 @@ typedef struct gNB_MAC_INST_s {
time_stats_t schedule_pch;
} gNB_MAC_INST;
void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP);
#endif /*__LAYER2_NR_MAC_GNB_H__ */
......@@ -191,7 +191,7 @@ int otg_enabled;
//static NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
//static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
uint32_t target_dl_mcs = 28; //maximum allowed mcs
uint32_t target_ul_mcs = 20;
uint32_t timing_advance = 0;
......
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