Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
spbro
OpenXG-RAN
Commits
920c866e
Commit
920c866e
authored
2 years ago
by
francescomani
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
fix for msg4 scheduler in case vrb map for selected slot is occupied
parent
4940146f
Branches unavailable
2024.w43
2024.w42
2024.w41
2024.w40
2024.w39
2024.w38
2024.w36
2024.w35
2024.w34
2024.w33
2024.w32
2024.w31
2024.w30
2024.w29
2024.w28
2024.w27
2024.w26
2024.w25
2024.w24
2024.w23
2024.w22
2024.w21
2024.w18
2024.w17
2024.w16
2024.w15
2024.w14
2024.w13
2024.w12
2024.w11
2024.w10
2024.w09
2024.w08
2024.w06
2024.w05
2024.w04
2024.w03
2024.w02
2024.w01
2023.w51
2023.w50
2023.w49
2023.w48
2023.w47
2023.w45
2023.w43
2023.w42
2023.w41
2023.w40
2023.w39
2023.w38
2023.w37
2023.w36
2023.w34
2023.w33
2023.w32
2023.w31
2023.w30
2023.w29
2023.w28
2023.w27
2023.w26
2023.w25
2023.w24
2023.w23
2023.w22
2023.w21
2023.w20
2023.w19
2023.w18
2023.w18b
2023.w16
2023.w15
2023.w14
2023.w13
2023.w12
2023.w11
2023.w11b
2023.w10
2023.w10b
2023.w09
2023.w08
2023.w08b
2023.w07
2023.w06
2023.w05
2023.w03
2023.w02
2022.w51
2022.w50
2022.w49
2022.w48
2022.w47
2022.w46
v2.1.0
v2.0.0
flexran-eol
ARC_1.3
No related merge requests found
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
64 additions
and
56 deletions
+64
-56
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+57
-52
openair2/RRC/NR/L2_nr_interface.c
openair2/RRC/NR/L2_nr_interface.c
+7
-4
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @
920c866e
...
...
@@ -1425,10 +1425,12 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
return
;
}
if
(
UE
->
enc_rval
.
encoded
<=
0
)
return
;
// need to wait until RRCSetup is encoded
NR_UE_sched_ctrl_t
*
sched_ctrl
=
&
UE
->
UE_sched_ctrl
;
uint16_t
mac_sdu_length
=
mac_rrc_nr_data_req
(
module_idP
,
CC_id
,
frameP
,
CCCH
,
ra
->
rnti
,
1
,
NULL
);
if
(
mac_sdu_length
<=
0
)
return
;
// need to wait until RRCSetup is encoded
long
BWPStart
=
0
;
long
BWPSize
=
0
;
NR_Type0_PDCCH_CSS_config_t
*
type0_PDCCH_CSS_config
=
NULL
;
...
...
@@ -1464,6 +1466,58 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
return
;
}
// Checking if the DCI allocation is feasible in current subframe
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
nr_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
if
(
dl_req
->
nPDUs
>
NFAPI_NR_MAX_DL_TTI_PDUS
-
2
)
{
LOG_I
(
NR_MAC
,
"[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d
\n
"
,
slotP
,
ra
->
rnti
);
return
;
}
uint8_t
time_domain_assignment
=
get_dl_tda
(
nr_mac
,
scc
,
slotP
);
NR_tda_info_t
msg4_tda
=
nr_get_pdsch_tda_info
(
dl_bwp
,
time_domain_assignment
);
NR_pdsch_dmrs_t
dmrs_info
=
get_dl_dmrs_params
(
scc
,
dl_bwp
,
&
msg4_tda
,
1
);
uint8_t
mcsTableIdx
=
dl_bwp
->
mcsTableIdx
;
uint8_t
mcsIndex
=
0
;
int
rbStart
=
0
;
int
rbSize
=
0
;
uint8_t
tb_scaling
=
0
;
uint32_t
tb_size
=
0
;
uint8_t
subheader_len
=
(
mac_sdu_length
<
256
)
?
sizeof
(
NR_MAC_SUBHEADER_SHORT
)
:
sizeof
(
NR_MAC_SUBHEADER_LONG
);
uint16_t
pdu_length
=
mac_sdu_length
+
subheader_len
+
7
;
//7 is contetion resolution length
uint16_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
do
{
if
(
rbSize
<
BWPSize
)
rbSize
++
;
else
mcsIndex
++
;
LOG_D
(
NR_MAC
,
"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d
\n
"
,
dmrs_info
.
N_PRB_DMRS
,
dmrs_info
.
N_DMRS_SLOT
);
tb_size
=
nr_compute_tbs
(
nr_get_Qm_dl
(
mcsIndex
,
mcsTableIdx
),
nr_get_code_rate_dl
(
mcsIndex
,
mcsTableIdx
),
rbSize
,
msg4_tda
.
nrOfSymbols
,
dmrs_info
.
N_PRB_DMRS
*
dmrs_info
.
N_DMRS_SLOT
,
0
,
tb_scaling
,
1
)
>>
3
;
}
while
(
tb_size
<
pdu_length
&&
mcsIndex
<=
28
);
AssertFatal
(
tb_size
>=
pdu_length
,
"Cannot allocate Msg4
\n
"
);
int
i
=
0
;
while
((
i
<
rbSize
)
&&
(
rbStart
+
rbSize
<=
BWPSize
))
{
if
(
vrb_map
[
BWPStart
+
rbStart
+
i
]
&
SL_to_bitmap
(
msg4_tda
.
startSymbolIndex
,
msg4_tda
.
nrOfSymbols
))
{
rbStart
+=
i
+
1
;
i
=
0
;
}
else
{
i
++
;
}
}
if
(
rbStart
>
(
BWPSize
-
rbSize
))
{
LOG_E
(
NR_MAC
,
"%s(): cannot find free vrb_map for RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
return
;
}
const
int
delta_PRI
=
0
;
int
r_pucch
=
nr_get_pucch_resource
(
coreset
,
ra
->
UL_BWP
.
pucch_Config
,
CCEIndex
);
...
...
@@ -1500,6 +1554,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_sched_pucch_t
*
pucch
=
&
sched_ctrl
->
sched_pucch
[
alloc
];
harq
->
feedback_slot
=
pucch
->
ul_slot
;
harq
->
feedback_frame
=
pucch
->
frame
;
harq
->
tb_size
=
tb_size
;
uint8_t
*
buf
=
(
uint8_t
*
)
harq
->
transportBlock
;
// Bytes to be transmitted
...
...
@@ -1533,56 +1588,6 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
}
}
uint8_t
time_domain_assignment
=
get_dl_tda
(
nr_mac
,
scc
,
slotP
);
NR_tda_info_t
msg4_tda
=
nr_get_pdsch_tda_info
(
dl_bwp
,
time_domain_assignment
);
NR_pdsch_dmrs_t
dmrs_info
=
get_dl_dmrs_params
(
scc
,
dl_bwp
,
&
msg4_tda
,
1
);
uint8_t
mcsTableIdx
=
dl_bwp
->
mcsTableIdx
;
uint8_t
mcsIndex
=
0
;
int
rbStart
=
0
;
int
rbSize
=
0
;
uint8_t
tb_scaling
=
0
;
uint16_t
*
vrb_map
=
cc
[
CC_id
].
vrb_map
;
// increase PRBs until we get to BWPSize or TBS is bigger than MAC PDU size
do
{
if
(
rbSize
<
BWPSize
)
rbSize
++
;
else
mcsIndex
++
;
LOG_D
(
NR_MAC
,
"Calling nr_compute_tbs with N_PRB_DMRS %d, N_DMRS_SLOT %d
\n
"
,
dmrs_info
.
N_PRB_DMRS
,
dmrs_info
.
N_DMRS_SLOT
);
harq
->
tb_size
=
nr_compute_tbs
(
nr_get_Qm_dl
(
mcsIndex
,
mcsTableIdx
),
nr_get_code_rate_dl
(
mcsIndex
,
mcsTableIdx
),
rbSize
,
msg4_tda
.
nrOfSymbols
,
dmrs_info
.
N_PRB_DMRS
*
dmrs_info
.
N_DMRS_SLOT
,
0
,
tb_scaling
,
1
)
>>
3
;
}
while
(
harq
->
tb_size
<
ra
->
mac_pdu_length
&&
mcsIndex
<=
28
);
AssertFatal
(
harq
->
tb_size
>=
ra
->
mac_pdu_length
,
"Cannot allocate Msg4
\n
"
);
int
i
=
0
;
while
((
i
<
rbSize
)
&&
(
rbStart
+
rbSize
<=
BWPSize
))
{
if
(
vrb_map
[
BWPStart
+
rbStart
+
i
]
&
SL_to_bitmap
(
msg4_tda
.
startSymbolIndex
,
msg4_tda
.
nrOfSymbols
))
{
rbStart
+=
i
+
1
;
i
=
0
;
}
else
{
i
++
;
}
}
if
(
rbStart
>
(
BWPSize
-
rbSize
))
{
LOG_E
(
NR_MAC
,
"%s(): cannot find free vrb_map for RNTI %04x!
\n
"
,
__func__
,
ra
->
rnti
);
return
;
}
// Checking if the DCI allocation is feasible in current subframe
nfapi_nr_dl_tti_request_body_t
*
dl_req
=
&
nr_mac
->
DL_req
[
CC_id
].
dl_tti_request_body
;
if
(
dl_req
->
nPDUs
>
NFAPI_NR_MAX_DL_TTI_PDUS
-
2
)
{
LOG_I
(
NR_MAC
,
"[RAPROC] Subframe %d: FAPI DL structure is full, skip scheduling UE %d
\n
"
,
slotP
,
ra
->
rnti
);
return
;
}
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
const
int
coresetid
=
coreset
->
controlResourceSetId
;
...
...
This diff is collapsed.
Click to expand it.
openair2/RRC/NR/L2_nr_interface.c
View file @
920c866e
...
...
@@ -117,7 +117,8 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
const
rb_id_t
Srb_id
,
const
rnti_t
rnti
,
const
uint8_t
Nb_tb
,
uint8_t
*
const
buffer_pP
){
uint8_t
*
const
buffer_pP
)
{
#ifdef DEBUG_RRC
LOG_D
(
RRC
,
"[eNB %d] mac_rrc_data_req to SRB ID=%ld
\n
"
,
Mod_idP
,
Srb_id
);
...
...
@@ -162,19 +163,21 @@ uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
if
((
Srb_id
&
RAB_OFFSET
)
==
CCCH
)
{
LOG_D
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request (Srb_id %ld)
\n
"
,
Mod_idP
,
frameP
,
Srb_id
);
char
*
payload_pP
;
struct
rrc_gNB_ue_context_s
*
ue_context_p
=
rrc_gNB_get_ue_context
(
RC
.
nrrrc
[
Mod_idP
],
rnti
);
LOG_D
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request (Srb_id %ld)
\n
"
,
Mod_idP
,
frameP
,
Srb_id
);
if
(
ue_context_p
==
NULL
)
{
LOG_E
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request but no ue_context
\n
"
,
Mod_idP
,
frameP
);
if
(
buffer_pP
!=
NULL
)
LOG_E
(
NR_RRC
,
"[gNB %d] Frame %d CCCH request but no ue_context
\n
"
,
Mod_idP
,
frameP
);
return
0
;
}
uint16_t
payload_size
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
payload_size
;
if
(
buffer_pP
==
NULL
)
return
payload_size
;
// check if data is there for MAC
if
(
payload_size
>
0
)
{
payload_pP
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
Payload
;
char
*
payload_pP
=
ue_context_p
->
ue_context
.
Srb0
.
Tx_buffer
.
Payload
;
LOG_D
(
NR_RRC
,
"[gNB %d] CCCH has %d bytes (dest: %p, src %p)
\n
"
,
Mod_idP
,
payload_size
,
buffer_pP
,
payload_pP
);
// Fill buffer
memcpy
((
void
*
)
buffer_pP
,
(
void
*
)
payload_pP
,
payload_size
);
...
...
This diff is collapsed.
Click to expand it.
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment