schedule SRS K2 slots in advance

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c

@@ -192,7 +192,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   schedule_nr_mib(module_idP, frame, slot);
 
   // This schedules SIB1
-  if ( get_softmodem_params()->sa == 1 )
+  if (get_softmodem_params()->sa == 1)
     schedule_nr_sib1(module_idP, frame, slot);
 
 
@@ -216,9 +216,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
   // Schedule CSI measurement reporting
   nr_csi_meas_reporting(module_idP, frame, slot);
 
-  // Schedule SRS: check in slot 0 for the whole frame
-  if (slot == 0)
-    nr_schedule_srs(module_idP, frame);
+  nr_schedule_srs(module_idP, frame, slot);
 
   // This schedule RA procedure if not in phy_test mode
   // Otherwise consider 5G already connected

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c

@@ -222,7 +222,8 @@ void nr_fill_nfapi_srs(int module_id, int CC_id, NR_UE_info_t* UE, sub_frame_t s
 *                Only for periodic scheduling yet.
 *
 *********************************************************************/
-void nr_schedule_srs(int module_id, frame_t frame) {
+void nr_schedule_srs(int module_id, frame_t frame, int slot)
+ {
 
   gNB_MAC_INST *nrmac = RC.nrmac[module_id];
   NR_UEs_t *UE_info = &nrmac->UE_info;
@@ -232,9 +233,11 @@ void nr_schedule_srs(int module_id, frame_t frame) {
     NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
     NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
 
-    sched_ctrl->sched_srs.frame = -1;
-    sched_ctrl->sched_srs.slot = -1;
-    sched_ctrl->sched_srs.srs_scheduled = false;
+    if(sched_ctrl->sched_srs.srs_scheduled && sched_ctrl->sched_srs.frame == frame && sched_ctrl->sched_srs.slot == slot) {
+      sched_ctrl->sched_srs.frame = -1;
+      sched_ctrl->sched_srs.slot = -1;
+      sched_ctrl->sched_srs.srs_scheduled = false;
+    }
 
     if((sched_ctrl->ul_failure == 1 && get_softmodem_params()->phy_test==0) ||
        sched_ctrl->rrc_processing_timer > 0) {
@@ -271,16 +274,28 @@ void nr_schedule_srs(int module_id, frame_t frame) {
         continue;
       }
 
-      uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
-      uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
-      int n_slots_frame = nr_slots_per_frame[current_BWP->scs];
+      const int num_tda = current_BWP->tdaList->list.count;
+      int max_k2 = 0;
+      // avoid last one in the list (for msg3)
+      for (int i = 0; i < num_tda - 1; i++) {
+        int k2 = get_K2(current_BWP->tdaList, i, current_BWP->scs);
+        max_k2 = k2 > max_k2 ? k2 : max_k2;
+      }
+
+      // we are sheduling SRS max_k2 slot in advance for the presence of SRS to be taken into account when scheduling PUSCH
+      const int n_slots_frame = nr_slots_per_frame[current_BWP->scs];
+      const int sched_slot = (slot + max_k2) % n_slots_frame;
+      const int sched_frame = (frame + ((slot + max_k2) / n_slots_frame)) % 1024;
+
+      const uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
+      const uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
 
       // Check if UE will transmit the SRS in this frame
-      if (((frame - offset / n_slots_frame) * n_slots_frame) % period == 0) {
-        LOG_D(NR_MAC,"Scheduling SRS reception for %d.%d\n", frame, offset%n_slots_frame);
-        nr_fill_nfapi_srs(module_id, CC_id, UE, offset%n_slots_frame, srs_resource_set, srs_resource);
-        sched_ctrl->sched_srs.frame = frame;
-        sched_ctrl->sched_srs.slot = offset%n_slots_frame;
+      if ((sched_frame * n_slots_frame + sched_slot - offset) % period == 0) {
+        LOG_D(NR_MAC," %d.%d Scheduling SRS reception for %d.%d\n", frame, slot, sched_frame, sched_slot);
+        nr_fill_nfapi_srs(module_id, CC_id, UE, sched_slot, srs_resource_set, srs_resource);
+        sched_ctrl->sched_srs.frame = sched_frame;
+        sched_ctrl->sched_srs.slot = sched_slot;
         sched_ctrl->sched_srs.srs_scheduled = true;
       }
     }

openair2/LAYER2/NR_MAC_gNB/mac_proto.h

@@ -199,7 +199,7 @@ void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr
                            const NR_UE_UL_BWP_t *current_BWP,
                            uint8_t *ul_ri);
 
-void nr_schedule_srs(int module_id, frame_t frame);
+void nr_schedule_srs(int module_id, frame_t frame, int slot);
 
 void nr_csirs_scheduling(int Mod_idP,
                          frame_t frame,

openair2/RRC/NR/nr_rrc_config.c

@@ -710,18 +710,18 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){
 
   // UL TDA index 0 is basic slot configuration starting in symbol 0 til the last but one symbol
   struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
-  pusch_timedomainresourceallocation->k2  = CALLOC(1,sizeof(long));
+  pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long));
   *pusch_timedomainresourceallocation->k2 = k2;
   pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
-  pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0,13);
+  pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(0, 13);
   asn1cSeqAdd(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation); 
 
   // UL TDA index 1 in case of SRS
   struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation1 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
-  pusch_timedomainresourceallocation1->k2  = CALLOC(1,sizeof(long));
+  pusch_timedomainresourceallocation1->k2 = CALLOC(1,sizeof(long));
   *pusch_timedomainresourceallocation1->k2 = k2;
   pusch_timedomainresourceallocation1->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
-  pusch_timedomainresourceallocation1->startSymbolAndLength = get_SLIV(0,12);
+  pusch_timedomainresourceallocation1->startSymbolAndLength = get_SLIV(0, 12);
   asn1cSeqAdd(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation1);
 
   if(frame_type==TDD) {
@@ -730,28 +730,28 @@ void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay){
       if (ul_symb>1) {
         // UL TDA index 2 for mixed slot (TDD)
         pusch_timedomainresourceallocation = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
-        pusch_timedomainresourceallocation->k2  = CALLOC(1,sizeof(long));
+        pusch_timedomainresourceallocation->k2 = CALLOC(1,sizeof(long));
         *pusch_timedomainresourceallocation->k2 = k2;
         pusch_timedomainresourceallocation->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
-        pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one
+        pusch_timedomainresourceallocation->startSymbolAndLength = get_SLIV(14 - ul_symb, ul_symb - 1); // starting in fist ul symbol til the last but one
         asn1cSeqAdd(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation);
       }
       // UL TDA index 3 for msg3 in the mixed slot (TDD)
       int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
-      int nb_slots_per_period = ((1<<mu) * 10)/nb_periods_per_frame;
+      int nb_slots_per_period = ((1 << mu) * 10) / nb_periods_per_frame;
       struct NR_PUSCH_TimeDomainResourceAllocation *pusch_timedomainresourceallocation_msg3 = CALLOC(1,sizeof(struct NR_PUSCH_TimeDomainResourceAllocation));
-      pusch_timedomainresourceallocation_msg3->k2  = CALLOC(1,sizeof(long));
+      pusch_timedomainresourceallocation_msg3->k2 = CALLOC(1,sizeof(long));
       int no_mix_slot = ul_symb < 3 ? 1 : 0; // we need at least 2 symbols for scheduling Msg3
       *pusch_timedomainresourceallocation_msg3->k2 = nb_slots_per_period - DELTA[mu] + no_mix_slot;
       if(*pusch_timedomainresourceallocation_msg3->k2 < min_fb_delay)
         *pusch_timedomainresourceallocation_msg3->k2 += nb_slots_per_period;
-      AssertFatal(*pusch_timedomainresourceallocation_msg3->k2<33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n",
+      AssertFatal(*pusch_timedomainresourceallocation_msg3->k2 < 33,"Computed k2 for msg3 %ld is larger than the range allowed by RRC (0..32)\n",
                   *pusch_timedomainresourceallocation_msg3->k2);
       pusch_timedomainresourceallocation_msg3->mappingType = NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB;
       if(no_mix_slot)
-        pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(0,13); // full allocation if there is no mixed slot
+        pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(0, 13); // full allocation if there is no mixed slot
       else
-        pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(14-ul_symb,ul_symb-1); // starting in fist ul symbol til the last but one
+        pusch_timedomainresourceallocation_msg3->startSymbolAndLength = get_SLIV(14 - ul_symb, ul_symb - 1); // starting in fist ul symbol til the last but one
       asn1cSeqAdd(&scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list,pusch_timedomainresourceallocation_msg3);
     }
   }