phy_procedures_lte_eNb.c 111 KB
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/*******************************************************************************
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    OpenAirInterface
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    Copyright(c) 1999 - 2014 Eurecom
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    OpenAirInterface is free software: you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation, either version 3 of the License, or
    (at your option) any later version.
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    OpenAirInterface is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with OpenAirInterface.The full GNU General Public License is
   included in this distribution in the file called "COPYING". If not,
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   see <http://www.gnu.org/licenses/>.
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  Contact Information
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  OpenAirInterface Admin: openair_admin@eurecom.fr
  OpenAirInterface Tech : openair_tech@eurecom.fr
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  OpenAirInterface Dev  : openair4g-devel@lists.eurecom.fr
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  Address      : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
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 *******************************************************************************/
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/*! \file phy_procedures_lte_eNB.c
 * \brief Implementation of eNB procedures from 36.213 LTE specifications
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 * \author R. Knopp, F. Kaltenberger, N. Nikaein
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 * \date 2011
 * \version 0.1
 * \company Eurecom
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 * \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr,navid.nikaein@eurecom.fr
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 * \note
 * \warning
 */

#include "PHY/defs.h"
#include "PHY/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"

#ifdef EMOS
#include "SCHED/phy_procedures_emos.h"
#endif

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//#define DEBUG_PHY_PROC (Already defined in cmake)
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//#define DEBUG_ULSCH

#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
#include "UTIL/LOG/log.h"
#include "UTIL/LOG/vcd_signal_dumper.h"

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#include "assertions.h"
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#include "msc.h"
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#if defined(ENABLE_ITTI)
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#   include "intertask_interface.h"
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#endif

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//#define DIAG_PHY

#define NS_PER_SLOT 500000

#define PUCCH 1

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void exit_fun(const char* s);

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extern int exit_openair;

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// Fix per CC openair rf/if device update
// extern openair0_device openair0;
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unsigned char dlsch_input_buffer[2700] __attribute__ ((aligned(32)));
int eNB_sync_buffer0[640*6] __attribute__ ((aligned(32)));
int eNB_sync_buffer1[640*6] __attribute__ ((aligned(32)));
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int *eNB_sync_buffer[2] = {eNB_sync_buffer0, eNB_sync_buffer1};

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extern uint16_t hundred_times_log10_NPRB[100];
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unsigned int max_peak_val;
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int max_sync_pos;
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//DCI_ALLOC_t dci_alloc[8];

#ifdef EMOS
fifo_dump_emos_eNB emos_dump_eNB;
#endif

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#if defined(SMBV) 
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extern const char smbv_fname[];
extern unsigned short config_frames[4];
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extern uint8_t smbv_frame_cnt;
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#endif

#ifdef DIAG_PHY
extern int rx_sig_fifo;
#endif

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uint8_t is_SR_subframe(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id)
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{
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  const int subframe = proc->subframe_rx;
  const int frame = proc->frame_rx;
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  LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking for SR TXOp(sr_ConfigIndex %d)\n",
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        eNB->Mod_id,eNB->ulsch[UE_id]->rnti,frame,subframe,
        eNB->scheduling_request_config[UE_id].sr_ConfigIndex);
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  if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 4) {        // 5 ms SR period
    if ((subframe%5) == eNB->scheduling_request_config[UE_id].sr_ConfigIndex)
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 14) { // 10 ms SR period
    if (subframe==(eNB->scheduling_request_config[UE_id].sr_ConfigIndex-5))
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 34) { // 20 ms SR period
    if ((10*(frame&1)+subframe) == (eNB->scheduling_request_config[UE_id].sr_ConfigIndex-15))
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 74) { // 40 ms SR period
    if ((10*(frame&3)+subframe) == (eNB->scheduling_request_config[UE_id].sr_ConfigIndex-35))
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      return(1);
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  } else if (eNB->scheduling_request_config[UE_id].sr_ConfigIndex <= 154) { // 80 ms SR period
    if ((10*(frame&7)+subframe) == (eNB->scheduling_request_config[UE_id].sr_ConfigIndex-75))
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      return(1);
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  }

  return(0);
}
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void put_harq_pid_in_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
{
  DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->tail_freelist] = harq_pid;
  DLSCH_ptr->tail_freelist = (DLSCH_ptr->tail_freelist + 1) % 10;
}

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void remove_harq_pid_from_freelist(LTE_eNB_DLSCH_t *DLSCH_ptr, int harq_pid)
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{
  if (DLSCH_ptr->head_freelist == DLSCH_ptr->tail_freelist) {
    LOG_E(PHY, "%s:%d: you cannot read this!\n", __FILE__, __LINE__);
    abort();
  }
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  /* basic check, in case several threads deal with the free list at the same time
   * in normal situations it should not happen, that's also why we don't use any
   * locking mechanism to protect the free list
   * to be refined in case things don't work properly
   */
  if (harq_pid != DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist]) {
    LOG_E(PHY, "%s:%d: critical error, get in touch with the authors\n", __FILE__, __LINE__);
    abort();
  }
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  DLSCH_ptr->head_freelist = (DLSCH_ptr->head_freelist + 1) % 10;
}

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int32_t add_ue(int16_t rnti, PHY_VARS_eNB *eNB)
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{
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  uint8_t i;
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  LOG_D(PHY,"[eNB %d/%d] Adding UE with rnti %x\n",
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        eNB->Mod_id,
        eNB->CC_id,
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        (uint16_t)rnti);
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if ((eNB->dlsch[i]==NULL) || (eNB->ulsch[i]==NULL)) {
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      MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed add ue %"PRIx16" (ENOMEM)", rnti);
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      LOG_E(PHY,"Can't add UE, not enough memory allocated\n");
      return(-1);
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    } else {
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      if (eNB->UE_stats[i].crnti==0) {
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        MSC_LOG_EVENT(MSC_PHY_ENB, "0 Add ue %"PRIx16" ", rnti);
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        LOG_D(PHY,"UE_id %d associated with rnti %x\n",i, (uint16_t)rnti);
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        eNB->dlsch[i][0]->rnti = rnti;
        eNB->ulsch[i]->rnti = rnti;
        eNB->UE_stats[i].crnti = rnti;
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	eNB->UE_stats[i].Po_PUCCH1_below = 0;
	eNB->UE_stats[i].Po_PUCCH1_above = (int32_t)pow(10.0,.1*(eNB->frame_parms.ul_power_control_config_common.p0_NominalPUCCH+eNB->rx_total_gain_dB));
	eNB->UE_stats[i].Po_PUCCH        = (int32_t)pow(10.0,.1*(eNB->frame_parms.ul_power_control_config_common.p0_NominalPUCCH+eNB->rx_total_gain_dB));
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	LOG_D(PHY,"Initializing Po_PUCCH: p0_NominalPUCCH %d, gain %d => %d\n",
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	      eNB->frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
	      eNB->rx_total_gain_dB,
	      eNB->UE_stats[i].Po_PUCCH);
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        return(i);
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      }
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    }
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  }
  return(-1);
}

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int mac_phy_remove_ue(module_id_t Mod_idP,rnti_t rntiP) {
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  uint8_t i;
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  int j,CC_id;
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  PHY_VARS_eNB *eNB;
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  for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
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    eNB = PHY_vars_eNB_g[Mod_idP][CC_id];
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    for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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      if ((eNB->dlsch[i]==NULL) || (eNB->ulsch[i]==NULL)) {
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	MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed remove ue %"PRIx16" (ENOMEM)", rnti);
	LOG_E(PHY,"Can't remove UE, not enough memory allocated\n");
	return(-1);
      } else {
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	if (eNB->UE_stats[i].crnti==rntiP) {
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	  MSC_LOG_EVENT(MSC_PHY_ENB, "0 Removed ue %"PRIx16" ", rntiP);
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	  LOG_D(PHY,"eNB %d removing UE %d with rnti %x\n",eNB->Mod_id,i,rntiP);

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	  //LOG_D(PHY,("[PHY] UE_id %d\n",i);
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	  clean_eNb_dlsch(eNB->dlsch[i][0]);
	  clean_eNb_ulsch(eNB->ulsch[i]);
	  //eNB->UE_stats[i].crnti = 0;
	  memset(&eNB->UE_stats[i],0,sizeof(LTE_eNB_UE_stats));
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	  //  mac_exit_wrapper("Removing UE");
	  
	  /* clear the harq pid freelist */
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	  eNB->dlsch[i][0]->head_freelist = 0;
	  eNB->dlsch[i][0]->tail_freelist = 0;
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	  for (j = 0; j < 8; j++)
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	    put_harq_pid_in_freelist(eNB->dlsch[i][0], j);
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	  return(i);
	}
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      }
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    }
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  }
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  MSC_LOG_EVENT(MSC_PHY_ENB, "0 Failed remove ue %"PRIx16" (not found)", rntiP);
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  return(-1);
}

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int8_t find_next_ue_index(PHY_VARS_eNB *eNB)
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{
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  uint8_t i;
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
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    if (eNB->UE_stats[i].crnti==0) {
      /*if ((eNB->dlsch[i]) &&
      (eNB->dlsch[i][0]) &&
      (eNB->dlsch[i][0]->rnti==0))*/
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      LOG_D(PHY,"Next free UE id is %d\n",i);
      return(i);
    }
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  }
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  return(-1);
}

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int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16_t rnti, const int frame, const uint8_t subframe,uint8_t *harq_pid,uint8_t *round,const uint8_t ul_flag)
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{
  LTE_eNB_DLSCH_t *DLSCH_ptr;
  LTE_eNB_ULSCH_t *ULSCH_ptr;
  uint8_t ulsch_subframe,ulsch_frame;
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  uint8_t i;
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  int8_t UE_id = find_ue(rnti,PHY_vars_eNB_g[Mod_id][CC_id]);
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  int sf1=(10*frame)+subframe,sf2,sfdiff,sfdiff_max=7;
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  if (UE_id==-1) {
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    LOG_D(PHY,"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)\n",rnti, Mod_id, CC_id);
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    *round=0;
    return(-1);
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  }

  if (ul_flag == 0)  {// this is a DL request
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    DLSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->dlsch[(uint32_t)UE_id][0];
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    // set to no available process first
    *harq_pid = -1;

    for (i=0; i<DLSCH_ptr->Mdlharq; i++) {
      if (DLSCH_ptr->harq_processes[i]!=NULL) {
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	if (DLSCH_ptr->harq_processes[i]->status == ACTIVE) {
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	  sf2 = (DLSCH_ptr->harq_processes[i]->frame*10) + DLSCH_ptr->harq_processes[i]->subframe;
	  if (sf2<=sf1)
	    sfdiff = sf1-sf2;
	  else // this happens when wrapping around 1024 frame barrier
	    sfdiff = 10240 + sf1-sf2;
	  LOG_D(PHY,"process %d is active, round %d (waiting %d)\n",i,DLSCH_ptr->harq_processes[i]->round,sfdiff);

	  if (sfdiff>sfdiff_max) { // this is an active process that is waiting longer than the others (and longer than 7 ms)
	    sfdiff_max = sfdiff; 
	    *harq_pid = i;
	    *round = DLSCH_ptr->harq_processes[i]->round;
	  }
	}
      } else { // a process is not defined
	LOG_E(PHY,"[eNB %d] DLSCH process %d for rnti %x (UE_id %d) not allocated\n",Mod_id,i,rnti,UE_id);
	return(-1);
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      }
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    }
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    /* if no active harq pid, get the oldest in the freelist, if any */
    if (*harq_pid == 255 && DLSCH_ptr->head_freelist != DLSCH_ptr->tail_freelist) {
      *harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
      *round = 0;
      LOG_D(PHY,"process %d is first free process\n", *harq_pid);
    }

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    LOG_D(PHY,"get_ue_active_harq_pid DL => Frame %d, Subframe %d : harq_pid %d\n",
	  frame,subframe,*harq_pid);
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  } else { // This is a UL request
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    ULSCH_ptr = PHY_vars_eNB_g[Mod_id][CC_id]->ulsch[(uint32_t)UE_id];
    ulsch_subframe = pdcch_alloc2ul_subframe(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,subframe);
    ulsch_frame    = pdcch_alloc2ul_frame(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,frame,subframe);
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    // Note this is for TDD configuration 3,4,5 only
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    *harq_pid = subframe2harq_pid(&PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms,
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                                  ulsch_frame,
                                  ulsch_subframe);
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    *round    = ULSCH_ptr->harq_processes[*harq_pid]->round;
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    LOG_T(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Checking HARQ, round %d\n",Mod_id,*harq_pid,frame,subframe,*round);
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  }
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  return(0);
}

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int16_t get_target_pusch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
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{
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  return PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUSCH;
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}

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int16_t get_target_pucch_rx_power(const module_id_t module_idP, const uint8_t CC_id)
{
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  return PHY_vars_eNB_g[module_idP][CC_id]->frame_parms.ul_power_control_config_common.p0_NominalPUCCH;
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}

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#ifdef EMOS
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void phy_procedures_emos_eNB_TX(unsigned char subframe, PHY_VARS_eNB *eNB)
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{
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}
#endif



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void phy_procedures_eNB_S_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t abstraction_flag,relaying_type_t r_type)
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{
  UNUSED(r_type);
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  int subframe = proc->subframe_rx;
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#ifdef DEBUG_PHY_PROC
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  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_S_RX(%d)\n", eNB->Mod_id,proc->frame_rx, subframe);
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#endif
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  if (abstraction_flag == 0) {
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    lte_eNB_I0_measurements(eNB,
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			    subframe,
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                            0,
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                            eNB->first_run_I0_measurements);
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  }
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#ifdef PHY_ABSTRACTION
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  else {
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    lte_eNB_I0_measurements_emul(eNB,
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                                 0);
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  }
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#endif

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}

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#ifdef EMOS
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void phy_procedures_emos_eNB_RX(unsigned char subframe,PHY_VARS_eNB *eNB)
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{

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  uint8_t aa;
  uint16_t last_subframe_emos;
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  uint16_t pilot_pos1 = 3 - eNB->frame_parms.Ncp, pilot_pos2 = 10 - 2*eNB->frame_parms.Ncp;
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  uint32_t bytes;
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  last_subframe_emos=0;

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#ifdef EMOS_CHANNEL
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  //if (last_slot%2==1) // this is for all UL subframes
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  if (subframe==3)
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    for (aa=0; aa<eNB->frame_parms.nb_antennas_rx; aa++) {
      memcpy(&emos_dump_eNB.channel[aa][last_subframe_emos*2*eNB->frame_parms.N_RB_UL*12],
             &eNB->pusch_vars[0]->drs_ch_estimates[0][aa][eNB->frame_parms.N_RB_UL*12*pilot_pos1],
             eNB->frame_parms.N_RB_UL*12*sizeof(int));
      memcpy(&emos_dump_eNB.channel[aa][(last_subframe_emos*2+1)*eNB->frame_parms.N_RB_UL*12],
             &eNB->pusch_vars[0]->drs_ch_estimates[0][aa][eNB->frame_parms.N_RB_UL*12*pilot_pos2],
             eNB->frame_parms.N_RB_UL*12*sizeof(int));
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    }
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#endif

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  if (subframe==4) {
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    emos_dump_eNB.timestamp = rt_get_time_ns();
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    emos_dump_eNB.frame_tx = eNB->proc[subframe].frame_rx;
    emos_dump_eNB.rx_total_gain_dB = eNB->rx_total_gain_dB;
    emos_dump_eNB.mimo_mode = eNB->transmission_mode[0];
    memcpy(&emos_dump_eNB.measurements,
           &eNB->measurements[0],
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           sizeof(PHY_MEASUREMENTS_eNB));
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    memcpy(&emos_dump_eNB.UE_stats[0],&eNB->UE_stats[0],NUMBER_OF_UE_MAX*sizeof(LTE_eNB_UE_stats));
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    bytes = rtf_put(CHANSOUNDER_FIFO_MINOR, &emos_dump_eNB, sizeof(fifo_dump_emos_eNB));
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    //bytes = rtf_put(CHANSOUNDER_FIFO_MINOR, "test", sizeof("test"));
    if (bytes!=sizeof(fifo_dump_emos_eNB)) {
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      LOG_W(PHY,"[eNB %d] Frame %d, subframe %d, Problem writing EMOS data to FIFO (bytes=%d, size=%d)\n",
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            eNB->Mod_id,eNB->proc[(subframe+1)%10].frame_rx, subframe,bytes,sizeof(fifo_dump_emos_eNB));
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    } else {
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      if (eNB->proc[(subframe+1)%10].frame_tx%100==0) {
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        LOG_I(PHY,"[eNB %d] Frame %d (%d), subframe %d, Writing %d bytes EMOS data to FIFO\n",
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              eNB->Mod_id,eNB->proc[(subframe+1)%10].frame_rx, ((fifo_dump_emos_eNB*)&emos_dump_eNB)->frame_tx, subframe, bytes);
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      }
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    }
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  }
}
#endif


#define AMP_OVER_SQRT2 ((AMP*ONE_OVER_SQRT2_Q15)>>15)
#define AMP_OVER_2 (AMP>>1)
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int QPSK[4]= {AMP_OVER_SQRT2|(AMP_OVER_SQRT2<<16),AMP_OVER_SQRT2|((65536-AMP_OVER_SQRT2)<<16),((65536-AMP_OVER_SQRT2)<<16)|AMP_OVER_SQRT2,((65536-AMP_OVER_SQRT2)<<16)|(65536-AMP_OVER_SQRT2)};
int QPSK2[4]= {AMP_OVER_2|(AMP_OVER_2<<16),AMP_OVER_2|((65536-AMP_OVER_2)<<16),((65536-AMP_OVER_2)<<16)|AMP_OVER_2,((65536-AMP_OVER_2)<<16)|(65536-AMP_OVER_2)};
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unsigned int taus(void);
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void pmch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,PHY_VARS_RN *rn, int abstraction_flag,relaying_type_t r_type) {
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#ifdef Rel10
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  MCH_PDU *mch_pduP;
  MCH_PDU  mch_pdu;
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  //  uint8_t sync_area=255;
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#endif
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  int subframe = proc->subframe_tx;
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  if (abstraction_flag==0) {
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    // This is DL-Cell spec pilots in Control region
    generate_pilots_slot(eNB,
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			 eNB->common_vars.txdataF[0],
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			 AMP,
			 subframe<<1,1);
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  }
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#ifdef Rel10
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  // if mcch is active, send regardless of the node type: eNB or RN
  // when mcch is active, MAC sched does not allow MCCH and MTCH multiplexing
  mch_pduP = mac_xface->get_mch_sdu(eNB->Mod_id,
				    eNB->CC_id,
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				    proc->frame_tx,
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				    subframe);
  
  switch (r_type) {
  case no_relay:
    if ((mch_pduP->Pdu_size > 0) && (mch_pduP->sync_area == 0)) // TEST: only transmit mcch for sync area 0
      LOG_I(PHY,"[eNB%"PRIu8"] Frame %d subframe %d : Got MCH pdu for MBSFN (MCS %"PRIu8", TBS %d) \n",
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	    eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->mcs,
	    eNB->dlsch_MCH->harq_processes[0]->TBS>>3);
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    else {
      LOG_D(PHY,"[DeNB %"PRIu8"] Frame %d subframe %d : Do not transmit MCH pdu for MBSFN sync area %"PRIu8" (%s)\n",
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	    eNB->Mod_id,proc->frame_tx,subframe,mch_pduP->sync_area,
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	    (mch_pduP->Pdu_size == 0)? "Empty MCH PDU":"Let RN transmit for the moment");
      mch_pduP = NULL;
    }
    
    break;
    
  case multicast_relay:
    if ((mch_pduP->Pdu_size > 0) && ((mch_pduP->mcch_active == 1) || mch_pduP->msi_active==1)) {
      LOG_I(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Got the MCH PDU for MBSFN  sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n",
	    rn->Mod_id,rn->frame, subframe,
	    mch_pduP->sync_area,mch_pduP->mcs,mch_pduP->Pdu_size);
    } else if (rn->mch_avtive[subframe%5] == 1) { // SF2 -> SF7, SF3 -> SF8
      mch_pduP= &mch_pdu;
      memcpy(&mch_pduP->payload, // could be a simple copy
	     rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->b,
	     rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3);
      mch_pduP->Pdu_size = (uint16_t) (rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->TBS>>3);
      mch_pduP->mcs = rn->dlsch_rn_MCH[subframe%5]->harq_processes[0]->mcs;
      LOG_I(PHY,"[RN %"PRIu8"] Frame %d subframe %d: Forward the MCH PDU for MBSFN received on SF %d sync area %"PRIu8" (MCS %"PRIu8", TBS %"PRIu16")\n",
	    rn->Mod_id,rn->frame, subframe,subframe%5,
	    rn->sync_area[subframe%5],mch_pduP->mcs,mch_pduP->Pdu_size);
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    } else {
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      mch_pduP=NULL;
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    }
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    rn->mch_avtive[subframe]=0;
    break;
    
  default:
    LOG_W(PHY,"[eNB %"PRIu8"] Frame %d subframe %d: unknown relaying type %d \n",
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	  eNB->Mod_id,proc->frame_tx,subframe,r_type);
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    mch_pduP=NULL;
    break;
  }// switch
  
  if (mch_pduP) {
    fill_eNB_dlsch_MCH(eNB,mch_pduP->mcs,1,0, abstraction_flag);
    // Generate PMCH
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    generate_mch(eNB,proc,(uint8_t*)mch_pduP->payload,abstraction_flag);
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  } else {
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    LOG_D(PHY,"[eNB/RN] Frame %d subframe %d: MCH not generated \n",proc->frame_tx,subframe);
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  }
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#endif
}
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void common_signal_procedures (PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int abstraction_flag) {
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
  int **txdataF = eNB->common_vars.txdataF[0];
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  uint8_t *pbch_pdu=&eNB->pbch_pdu[0];
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  int subframe = proc->subframe_tx;
  int frame = proc->frame_tx;
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  // generate Cell-Specific Reference Signals for both slots
  if (abstraction_flag==0) {
    VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1);
    generate_pilots_slot(eNB,
			 txdataF,
			 AMP,
			 subframe<<1,0);
    // check that 2nd slot is for DL
    if (subframe_select(fp,subframe) == SF_DL)
      generate_pilots_slot(eNB,
			   txdataF,
			   AMP,
			   (subframe<<1)+1,0);
    
    VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,0);
  }    
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  // First half of PSS/SSS (FDD, slot 0)
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  if (subframe == 0) {
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    if ((fp->frame_type == FDD) &&
	(abstraction_flag==0)) {
      generate_pss(txdataF,
		   AMP,
		   fp,
		   (fp->Ncp==NORMAL) ? 6 : 5,
		   0);
      generate_sss(txdataF,
		   AMP,
		   fp,
		   (fp->Ncp==NORMAL) ? 5 : 4,
		   0);
      
    }
    
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    // generate PBCH (Physical Broadcast CHannel) info
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    if ((frame&3) == 0) {
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      pbch_pdu[2] = 0;
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      // FIXME setting pbch_pdu[2] to zero makes the switch statement easier: remove all the or-operators
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      switch (fp->N_RB_DL) {
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      case 6:
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	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (0<<5);
	break;
	
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      case 15:
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	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (1<<5);
	break;
	
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      case 25:
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	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (2<<5);
	break;
	
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      case 50:
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	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (3<<5);
	break;
	
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      case 75:
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	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (4<<5);
	break;
	
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      case 100:
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	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (5<<5);
	break;
	
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      default:
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	// FIXME if we get here, this should be flagged as an error, right?
	pbch_pdu[2] = (pbch_pdu[2]&0x1f) | (2<<5);
	break;
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      }
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      pbch_pdu[2] = (pbch_pdu[2]&0xef) |
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	((fp->phich_config_common.phich_duration << 4)&0x10);
      
      switch (fp->phich_config_common.phich_resource) {
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      case oneSixth:
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	pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (0<<2);
	break;
	
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      case half:
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	pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (1<<2);
	break;
	
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      case one:
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	pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (2<<2);
	break;
	
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      case two:
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	pbch_pdu[2] = (pbch_pdu[2]&0xf3) | (3<<2);
	break;
	
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      default:
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	// unreachable
	break;
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      }
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      pbch_pdu[2] = (pbch_pdu[2]&0xfc) | ((frame>>8)&0x3);
      pbch_pdu[1] = frame&0xfc;
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      pbch_pdu[0] = 0;
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    }
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    /// First half of SSS (TDD, slot 1)
    
    if ((fp->frame_type == TDD)&&
	(abstraction_flag==0)){
      generate_sss(txdataF,
		   AMP,
		   fp,
		   (fp->Ncp==NORMAL) ? 6 : 5,
		   1);
    }
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    /// generate PBCH
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    if (abstraction_flag==0) {
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      generate_pbch(&eNB->pbch,
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                    txdataF,
                    AMP,
                    fp,
                    pbch_pdu,
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                    frame&3);
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    }
#ifdef PHY_ABSTRACTION
    else {
      generate_pbch_emul(eNB,pbch_pdu);
    }
#endif
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  }
  else if ((subframe == 1) &&
	   (fp->frame_type == TDD)&&
	   (abstraction_flag==0)) {
    generate_pss(txdataF,
		 AMP,
		 fp,
		 2,
		 2);
  }
  
  // Second half of PSS/SSS (FDD, slot 10)
  else if ((subframe == 5) && 
	   (fp->frame_type == FDD) &&
	   (abstraction_flag==0)) {
        generate_pss(txdataF,
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                     AMP,
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                     &eNB->frame_parms,
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                     (fp->Ncp==NORMAL) ? 6 : 5,
                     10);
        generate_sss(txdataF,
                     AMP,
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                     &eNB->frame_parms,
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                     (fp->Ncp==NORMAL) ? 5 : 4,
                     10);

  }

  //  Second-half of SSS (TDD, slot 11)
  else if ((subframe == 5) &&
	   (fp->frame_type == TDD) &&
	   (abstraction_flag==0)) {
    generate_sss(txdataF,
		 AMP,
		 fp,
		 (fp->Ncp==NORMAL) ? 6 : 5,
		 11);
  }

  // Second half of PSS (TDD, slot 12)
  else if ((subframe == 6) &&
	   (fp->frame_type == TDD) &&
	   (abstraction_flag==0)) {
    generate_pss(txdataF,
		 AMP,
		 fp,
		 2,
		 12);
  }

}

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void generate_eNB_dlsch_params(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,const int UE_id) {
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  int frame = proc->frame_tx;
  int subframe = proc->subframe_tx;
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  // if we have SI_RNTI, configure dlsch parameters and CCE index
  if (dci_alloc->rnti == SI_RNTI) {
    LOG_D(PHY,"Generating dlsch params for SI_RNTI\n");
    generate_eNB_dlsch_params_from_dci(frame,
				       subframe,
				       &dci_alloc->dci_pdu[0],
				       dci_alloc->rnti,
				       dci_alloc->format,
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				       &eNB->dlsch_SI,
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				       fp,
				       eNB->pdsch_config_dedicated,
				       SI_RNTI,
				       0,
				       P_RNTI,
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				       eNB->UE_stats[0].DL_pmi_single);
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    eNB->dlsch_SI->nCCE[subframe] = dci_alloc->firstCCE;
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    LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (SI)  => %"PRIu8"\n",eNB->Mod_id,frame,subframe,
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	  eNB->dlsch_SI->nCCE[subframe]);
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#if defined(SMBV) 
    
    // configure SI DCI
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    if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
      LOG_D(PHY,"[SMBV] Frame %3d, SI in SF %d DCI %"PRIu32"\n",frame,subframe,i);
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      smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "SI", dci_alloc, i);
    }
    
#endif
    
    
  } else if (dci_alloc->ra_flag == 1) {  // This is format 1A allocation for RA
    // configure dlsch parameters and CCE index
    LOG_D(PHY,"Generating dlsch params for RA_RNTI\n");    
    generate_eNB_dlsch_params_from_dci(frame,
				       subframe,
				       &dci_alloc->dci_pdu[0],
				       dci_alloc->rnti,
				       dci_alloc->format,
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				       &eNB->dlsch_ra,
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				       fp,
				       eNB->pdsch_config_dedicated,
				       SI_RNTI,
				       dci_alloc->rnti,
				       P_RNTI,
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				       eNB->UE_stats[0].DL_pmi_single);
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    eNB->dlsch_ra->nCCE[subframe] = dci_alloc->firstCCE;
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    LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for common DCI (RA)  => %"PRIu8"\n",eNB->Mod_id,frame,subframe,
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	  eNB->dlsch_ra->nCCE[subframe]);
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#if defined(SMBV) 
    
    // configure RA DCI
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    if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
      LOG_D(PHY,"[SMBV] Frame %3d, RA in SF %d DCI %"PRIu32"\n",frame,subframe,i);
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      smbv_configure_common_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), "RA", dci_alloc, i);
    }
    
#endif
    
  }
  
  else if ((dci_alloc->format != format0)&&
	   (dci_alloc->format != format3)&&
	   (dci_alloc->format != format3A)&&
	   (dci_alloc->format != format4)){ // this is a normal DLSCH allocation
    

    
    if (UE_id>=0) {
#if defined(SMBV) 
      // Configure this user
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      if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
	LOG_D(PHY,"[SMBV] Frame %3d, SF %d (SMBV SF %d) Configuring user %d with RNTI %"PRIu16" in TM%"PRIu8"\n",frame,subframe,(smbv_frame_cnt*10) + (subframe),UE_id+1,
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              dci_alloc->rnti,eNB->transmission_mode[(uint8_t)UE_id]);
	smbv_configure_user(smbv_fname,UE_id+1,eNB->transmission_mode[(uint8_t)UE_id],dci_alloc->rnti);
      }
      
#endif

      LOG_D(PHY,"Generating dlsch params for RNTI %x\n",dci_alloc->rnti);      
      generate_eNB_dlsch_params_from_dci(frame,
					 subframe,
					 &dci_alloc->dci_pdu[0],
					 dci_alloc->rnti,
					 dci_alloc->format,
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					 eNB->dlsch[(uint8_t)UE_id],
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					 fp,
					 eNB->pdsch_config_dedicated,
					 SI_RNTI,
					 0,
					 P_RNTI,
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					 eNB->UE_stats[(uint8_t)UE_id].DL_pmi_single);
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      LOG_D(PHY,"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d subframe %d: Generated dlsch params\n",
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	    eNB->Mod_id,dci_alloc->rnti,eNB->dlsch[(uint8_t)UE_id][0]->current_harq_pid,frame,subframe);
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      eNB->dlsch[(uint8_t)UE_id][0]->nCCE[subframe] = dci_alloc->firstCCE;
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      LOG_D(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resource for ue DCI (PDSCH %"PRIx16")  => %"PRIu8"/%u\n",eNB->Mod_id,frame,subframe,
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	    dci_alloc->rnti,eNB->dlsch[(uint8_t)UE_id][0]->nCCE[subframe]);
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#if defined(SMBV) 
      
      // configure UE-spec DCI
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      if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
	LOG_D(PHY,"[SMBV] Frame %3d, PDSCH in SF %d DCI %"PRIu32"\n",frame,subframe,i);
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	smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1,dci_alloc, i);
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      }
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#endif
      
      LOG_D(PHY,"[eNB %"PRIu8"][DCI][PDSCH %"PRIx16"] Frame %d subframe %d UE_id %"PRId8" Generated DCI format %d, aggregation %d\n",
	    eNB->Mod_id, dci_alloc->rnti,
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	    frame, subframe,UE_id,
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	    dci_alloc->format,
	    1<<dci_alloc->L);
    } else {
      LOG_D(PHY,"[eNB %"PRIu8"][PDSCH] Frame %d : No UE_id with corresponding rnti %"PRIx16", dropping DLSCH\n",
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	    eNB->Mod_id,frame,dci_alloc->rnti);
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    }
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  }
  
}
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void generate_eNB_ulsch_params(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,const int UE_id) {
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  int harq_pid;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  int frame = proc->frame_tx;
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  int subframe = proc->subframe_tx;
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  LOG_D(PHY,
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	"[eNB %"PRIu8"][PUSCH %"PRIu8"] Frame %d subframe %d UL Frame %"PRIu32", UL Subframe %"PRIu8", Generated ULSCH (format0) DCI (rnti %"PRIx16", dci %"PRIx8"), aggregation %d\n",
	eNB->Mod_id,
	subframe2harq_pid(fp,
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			  pdcch_alloc2ul_frame(fp,frame,subframe),
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			  pdcch_alloc2ul_subframe(fp,subframe)),
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	frame,
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	subframe,
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	pdcch_alloc2ul_frame(fp,frame,subframe),
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	pdcch_alloc2ul_subframe(fp,subframe),
	dci_alloc->rnti,
	dci_alloc->dci_pdu[0],
	1<<dci_alloc->L);
  
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  generate_eNB_ulsch_params_from_dci(eNB,
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				     proc,
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				     &dci_alloc->dci_pdu[0],
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				     dci_alloc->rnti,
				     format0,
				     UE_id,
				     SI_RNTI,
				     0,
				     P_RNTI,
				     CBA_RNTI,
				     0);  // do_srs
  
  LOG_T(PHY,"[eNB %"PRIu8"] Frame %d subframe %d : CCE resources for UE spec DCI (PUSCH %"PRIx16") => %d\n",
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	eNB->Mod_id,frame,subframe,dci_alloc->rnti,
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	dci_alloc->firstCCE);
  
#if defined(SMBV) 
  
  // configure UE-spec DCI for UL Grant
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  if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
    LOG_D(PHY,"[SMBV] Frame %3d, SF %d UL DCI %"PRIu32"\n",frame,subframe,i);
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    smbv_configure_ue_spec_dci(smbv_fname,(smbv_frame_cnt*10) + (subframe), UE_id+1, &DCI_pdu->dci_alloc[i], i);
  }
  
#endif
  
  
  // get the hard_pid for this subframe 
  harq_pid = subframe2harq_pid(fp,
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			       pdcch_alloc2ul_frame(fp,frame,subframe),
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			       pdcch_alloc2ul_subframe(fp,subframe));
  
  if (harq_pid==255) { // should not happen, log an error and exit, this is a fatal error
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    LOG_E(PHY,"[eNB %"PRIu8"] Frame %d: Bad harq_pid for ULSCH allocation\n",eNB->Mod_id,frame);
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    mac_xface->macphy_exit("FATAL\n"); 
  }
  
  if ((dci_alloc->rnti  >= CBA_RNTI) && (dci_alloc->rnti < P_RNTI))
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    eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->subframe_cba_scheduling_flag = 1;
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  else
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    eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
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}
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902
void pdsch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,LTE_eNB_DLSCH_t *dlsch, LTE_eNB_DLSCH_t *dlsch1,LTE_eNB_UE_stats *ue_stats,int ra_flag,int num_pdcch_symbols,int abstraction_flag) {
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  int frame=proc->frame_tx;
  int subframe=proc->subframe_tx;
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  int harq_pid = dlsch->current_harq_pid;
  LTE_DL_eNB_HARQ_t *dlsch_harq=dlsch->harq_processes[harq_pid];
  int input_buffer_length = dlsch_harq->TBS/8;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  uint8_t *DLSCH_pdu=NULL;
  uint8_t DLSCH_pdu_tmp[768*8];
  uint8_t DLSCH_pdu_rar[256];
  int i;

  LOG_D(PHY,
	"[eNB %"PRIu8"][PDSCH %"PRIx16"/%"PRIu8"] Frame %d, subframe %d: Generating PDSCH/DLSCH with input size = %"PRIu16", G %d, nb_rb %"PRIu16", mcs %"PRIu8", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")\n",
	eNB->Mod_id, dlsch->rnti,harq_pid,
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	frame, subframe, input_buffer_length,
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	get_G(fp,
	      dlsch_harq->nb_rb,
	      dlsch_harq->rb_alloc,
	      get_Qm(dlsch_harq->mcs),
	      dlsch_harq->Nl,
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	      num_pdcch_symbols,frame,subframe),
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	dlsch_harq->nb_rb,
	dlsch_harq->mcs,
	pmi2hex_2Ar1(dlsch_harq->pmi_alloc),
	dlsch_harq->rvidx,
	dlsch_harq->round);
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#if defined(MESSAGE_CHART_GENERATOR_PHY)
      MSC_LOG_TX_MESSAGE(
        MSC_PHY_ENB,MSC_PHY_UE,
        NULL,0,
        "%05u:%02u PDSCH/DLSCH input size = %"PRIu16", G %d, nb_rb %"PRIu16", mcs %"PRIu8", pmi_alloc %"PRIx16", rv %"PRIu8" (round %"PRIu8")",
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        frame, subframe,
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        input_buffer_length,
        get_G(fp,
        		dlsch_harq->nb_rb,
        		dlsch_harq->rb_alloc,
        		get_Qm(dlsch_harq->mcs),
        		dlsch_harq->Nl,
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        		num_pdcch_symbols,frame,subframe),
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        dlsch_harq->nb_rb,
        dlsch_harq->mcs,
        pmi2hex_2Ar1(dlsch_harq->pmi_alloc),
        dlsch_harq->rvidx,
        dlsch_harq->round);
#endif

      if (ue_stats) ue_stats->dlsch_sliding_cnt++;

      if (dlsch_harq->round == 0) {

	if (ue_stats)
	  ue_stats->dlsch_trials[harq_pid][0]++;

	if (eNB->mac_enabled==1) {
	  if (ra_flag == 0) {
	    DLSCH_pdu = mac_xface->get_dlsch_sdu(eNB->Mod_id,
						 eNB->CC_id,
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						 frame,
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						 dlsch->rnti,
						 0);
	  }
	  else {
	    int16_t crnti = mac_xface->fill_rar(eNB->Mod_id,
						eNB->CC_id,
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						frame,
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						DLSCH_pdu_rar,
						fp->N_RB_UL,
						input_buffer_length);
	    DLSCH_pdu = DLSCH_pdu_rar;

	    int UE_id;

	    if (crnti!=0) 
	      UE_id = add_ue(crnti,eNB);
	    else 
	      UE_id = -1;
	    
	    if (UE_id==-1) {
	      LOG_W(PHY,"[eNB] Max user count reached.\n");
	      mac_xface->cancel_ra_proc(eNB->Mod_id,
					eNB->CC_id,
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					frame,
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					crnti);
	    } else {
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	      eNB->UE_stats[(uint32_t)UE_id].mode = RA_RESPONSE;
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	      // Initialize indicator for first SR (to be cleared after ConnectionSetup is acknowledged)
	      eNB->first_sr[(uint32_t)UE_id] = 1;
	      
	      generate_eNB_ulsch_params_from_rar(DLSCH_pdu,
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						 frame,
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						 (subframe),
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						 eNB->ulsch[(uint32_t)UE_id],
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						 fp);
	      
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	      eNB->ulsch[(uint32_t)UE_id]->Msg3_active = 1;
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	      get_Msg3_alloc(fp,
			     subframe,
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			     frame,
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			     &eNB->ulsch[(uint32_t)UE_id]->Msg3_frame,
			     &eNB->ulsch[(uint32_t)UE_id]->Msg3_subframe);
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	      LOG_D(PHY,"[eNB][RAPROC] Frame %d subframe %d, Activated Msg3 demodulation for UE %"PRId8" in frame %"PRIu32", subframe %"PRIu8"\n",
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		    frame,
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		    subframe,
		    UE_id,
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		    eNB->ulsch[(uint32_t)UE_id]->Msg3_frame,
		    eNB->ulsch[(uint32_t)UE_id]->Msg3_subframe);
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	    }
	    if (ue_stats) ue_stats->total_TBS_MAC += dlsch_harq->TBS;
	  }
	}
	else {
	  DLSCH_pdu = DLSCH_pdu_tmp;
	  
	  for (i=0; i<input_buffer_length; i++)
	    DLSCH_pdu[i] = (unsigned char)(taus()&0xff);
	}
	
#if defined(SMBV) 
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1025
        // Configures the data source of allocation (allocation is configured by DCI)
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        if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
          LOG_D(PHY,"[SMBV] Frame %3d, Configuring PDSCH payload in SF %d alloc %"PRIu8"\n",frame,(smbv_frame_cnt*10) + (subframe),smbv_alloc_cnt);
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	  //          smbv_configure_datalist_for_user(smbv_fname, find_ue(dlsch->rnti,eNB)+1, DLSCH_pdu, input_buffer_length);
1029
        }
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#endif
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#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_DLSCH
        LOG_T(PHY,"eNB DLSCH SDU: \n");

        for (i=0; i<dlsch_harq->TBS>>3; i++)
          LOG_T(PHY,"%"PRIx8".",DLSCH_pdu[i]);

        LOG_T(PHY,"\n");
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#endif
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#endif
      } else {
        ue_stats->dlsch_trials[harq_pid][dlsch_harq->round]++;
#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_DLSCH
        LOG_D(PHY,"[eNB] This DLSCH is a retransmission\n");
#endif
#endif
      }
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      if (abstraction_flag==0) {
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	LOG_D(PHY,"Generating DLSCH/PDSCH %d\n",ra_flag);
        // 36-212
        start_meas(&eNB->dlsch_encoding_stats);
        dlsch_encoding(DLSCH_pdu,
                       fp,
                       num_pdcch_symbols,
                       dlsch,
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                       frame,subframe,
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                       &eNB->dlsch_rate_matching_stats,
                       &eNB->dlsch_turbo_encoding_stats,
                       &eNB->dlsch_interleaving_stats);
        stop_meas(&eNB->dlsch_encoding_stats);
        // 36-211
        start_meas(&eNB->dlsch_scrambling_stats);
        dlsch_scrambling(fp,
                         0,
                         dlsch,
                         get_G(fp,
                               dlsch_harq->nb_rb,
                               dlsch_harq->rb_alloc,
                               get_Qm(dlsch_harq->mcs),
                               dlsch_harq->Nl,
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                               num_pdcch_symbols,frame,subframe),
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                         0,
                         subframe<<1);
        stop_meas(&eNB->dlsch_scrambling_stats);
        start_meas(&eNB->dlsch_modulation_stats);
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1084
        dlsch_modulation(eNB->common_vars.txdataF[0],
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			 AMP,
			 subframe,
			 fp,
			 num_pdcch_symbols,
			 dlsch,
			 dlsch1);
	
        stop_meas(&eNB->dlsch_modulation_stats);
      }
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#ifdef PHY_ABSTRACTION
      else {
        start_meas(&eNB->dlsch_encoding_stats);
        dlsch_encoding_emul(eNB,
                            DLSCH_pdu,
                            dlsch);
        stop_meas(&eNB->dlsch_encoding_stats);
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      }
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#endif
      dlsch->active = 0;
}
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void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
1109
			   eNB_rxtx_proc_t *proc,
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			   uint8_t abstraction_flag,
                           relaying_type_t r_type,
			   PHY_VARS_RN *rn)
{
  UNUSED(rn);
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  int frame=proc->frame_tx;
  int subframe=proc->subframe_tx;
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  //  uint16_t input_buffer_length;
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  uint32_t i,aa;
  uint8_t harq_pid;
  DCI_PDU *DCI_pdu;
  DCI_PDU DCI_pdu_tmp;
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  int8_t UE_id=0;
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  uint8_t num_pdcch_symbols=0;
  uint8_t ul_subframe;
  uint32_t ul_frame;
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  DCI_ALLOC_t *dci_alloc=(DCI_ALLOC_t *)NULL;
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#if defined(SMBV) 
  // counts number of allocations in subframe
  // there is at least one allocation for PDCCH
  uint8_t smbv_alloc_cnt = 1;
#endif
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX,1);
  start_meas(&eNB->phy_proc_tx);
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  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
    // If we've dropped the UE, go back to PRACH mode for this UE
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    if ((frame==0)&&(subframe==0)) {
      if (eNB->UE_stats[i].crnti > 0) {
	LOG_I(PHY,"UE %d : rnti %x\n",i,eNB->UE_stats[i].crnti);
      }
    }
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    if (eNB->UE_stats[i].ulsch_consecutive_errors == ULSCH_max_consecutive_errors) {
1146
      LOG_W(PHY,"[eNB %d, CC %d] frame %d, subframe %d, UE %d: ULSCH consecutive error count reached %u, triggering UL Failure\n",
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            eNB->Mod_id,eNB->CC_id,frame,subframe, i, eNB->UE_stats[i].ulsch_consecutive_errors);
      eNB->UE_stats[i].ulsch_consecutive_errors=0;
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      mac_xface->UL_failure_indication(eNB->Mod_id,
				       eNB->CC_id,
				       frame,
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				       eNB->UE_stats[i].crnti,
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				       subframe);
				       
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    }
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  }
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// Get scheduling info for next subframe
// This is called only for the CC_id = 0 and triggers scheduling for all CC_id's
  if (eNB->mac_enabled==1) {
    if (eNB->CC_id == 0) {
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      mac_xface->eNB_dlsch_ulsch_scheduler(eNB->Mod_id,0,frame,subframe);//,1);
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    }
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  }
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// clear the transmit data array for the current subframe
  if (abstraction_flag==0) {
    for (aa=0; aa<fp->nb_antennas_tx_eNB; aa++) {      
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      memset(&eNB->common_vars.txdataF[0][aa][subframe*fp->ofdm_symbol_size*(fp->symbols_per_tti)],
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             0,fp->ofdm_symbol_size*(fp->symbols_per_tti)*sizeof(int32_t));
    }
  }
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1177
  if (is_pmch_subframe(frame,subframe,fp)) {
1178
    pmch_procedures(eNB,proc,rn,abstraction_flag,r_type);
1179 1180 1181
  }
  else {
    // this is not a pmch subframe, so generate PSS/SSS/PBCH
1182
    common_signal_procedures(eNB,proc,abstraction_flag);
1183
  }
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1185
#if defined(SMBV) 
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  // PBCH takes one allocation
1188
  if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
1189
    if (subframe==0)
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      smbv_alloc_cnt++;
  }
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1193
#endif
1194

1195
  if (eNB->mac_enabled==1) {
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    // Parse DCI received from MAC
    VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,1);
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    DCI_pdu = mac_xface->get_dci_sdu(eNB->Mod_id,
				     eNB->CC_id,
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				     frame,
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				     subframe);
  }
  else {
    DCI_pdu = &DCI_pdu_tmp;
1205
#ifdef EMOS_CHANNEL
1206
    fill_dci_emos(DCI_pdu,eNB);
1207
#else
1208
    fill_dci(DCI_pdu,eNB,proc);
1209
#endif
1210
  }
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  // clear existing ulsch dci allocations before applying info from MAC  (this is table
1213
  ul_subframe = pdcch_alloc2ul_subframe(fp,subframe);
1214
  ul_frame = pdcch_alloc2ul_frame(fp,frame,subframe);
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  if ((subframe_select(fp,ul_subframe)==SF_UL) ||
      (fp->frame_type == FDD)) {
    harq_pid = subframe2harq_pid(fp,ul_frame,ul_subframe);
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1220
    // clear DCI allocation maps for new subframe
1221
    for (i=0; i<NUMBER_OF_UE_MAX; i++)
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      if (eNB->ulsch[i]) {
        eNB->ulsch[i]->harq_processes[harq_pid]->dci_alloc=0;
        eNB->ulsch[i]->harq_processes[harq_pid]->rar_alloc=0;
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      }
  }
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  // clear previous allocation information for all UEs
1229
  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
1230
    eNB->dlsch[i][0]->subframe_tx[subframe] = 0;
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  }
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1234
  num_pdcch_symbols = DCI_pdu->num_pdcch_symbols;
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  LOG_D(PHY,"num_pdcch_symbols %"PRIu8",(dci common %"PRIu8", dci uespec %"PRIu8"\n",num_pdcch_symbols,
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        DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);

1238
#if defined(SMBV) 
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  // Sets up PDCCH and DCI table
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  if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4) && ((DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci)>0)) {
    LOG_D(PHY,"[SMBV] Frame %3d, SF %d PDCCH, number of DCIs %d\n",frame,subframe,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci);
1242
    dump_dci(fp,&DCI_pdu->dci_alloc[0]);
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    smbv_configure_pdcch(smbv_fname,(smbv_frame_cnt*10) + (subframe),num_pdcch_symbols,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci);
  }
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#endif

1247 1248
  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,DCI_pdu->num_pdcch_symbols);

1249
  // loop over all DCIs for this subframe to generate DLSCH allocations
1250 1251 1252 1253 1254
  for (i=0; i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci ; i++) {
    LOG_D(PHY,"[eNB] Subframe %d: DCI %d/%d : rnti %x, CCEind %d\n",subframe,i,DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci,DCI_pdu->dci_alloc[i].rnti,DCI_pdu->dci_alloc[i].firstCCE);
    VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,DCI_pdu->dci_alloc[i].rnti);
    VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,DCI_pdu->dci_alloc[i].format);
    VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,DCI_pdu->dci_alloc[i].firstCCE);
1255
    dci_alloc = &DCI_pdu->dci_alloc[i];
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    if ((dci_alloc->rnti<= P_RNTI) && 
	(dci_alloc->ra_flag!=1)) {
      if (eNB->mac_enabled==1)
	UE_id = find_ue((int16_t)dci_alloc->rnti,eNB);
1261 1262
      else
	UE_id = i;
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    }
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    else UE_id=0;
    
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    generate_eNB_dlsch_params(eNB,proc,dci_alloc,UE_id);
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  }
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  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_DCI_INFO,(frame*10)+subframe);

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  // Apply physicalConfigDedicated if needed
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  // This is for UEs that have received this IE, which changes these DL and UL configuration, we apply after a delay for the eNodeB UL parameters
  phy_config_dedicated_eNB_step2(eNB);
  
  // Now loop again over the DCIs for UL configuration
1277
  for (i=0; i<DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci ; i++) {
1278 1279 1280
    if (dci_alloc->format == format0) {  // this is a ULSCH allocation
      if (eNB->mac_enabled==1)
	UE_id = find_ue((int16_t)dci_alloc->rnti,eNB);
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      else
	UE_id = i;
1283
      
1284
      if (UE_id<0) { // should not happen, log an error and exit, this is a fatal error
1285
	LOG_E(PHY,"[eNB %"PRIu8"] Frame %d: Unknown UE_id for rnti %"PRIx16"\n",eNB->Mod_id,frame,dci_alloc->rnti);
1286
	mac_xface->macphy_exit("FATAL\n"); 
1287
      }
1288
      generate_eNB_ulsch_params(eNB,proc,dci_alloc,UE_id);
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    }
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  }
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  // if we have DCI to generate do it now
  if ((DCI_pdu->Num_common_dci + DCI_pdu->Num_ue_spec_dci)>0) {
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  } else { // for emulation!!
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    eNB->num_ue_spec_dci[(subframe)&1]=0;
    eNB->num_common_dci[(subframe)&1]=0;
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  }
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  if (abstraction_flag == 0) {
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    if (DCI_pdu->Num_ue_spec_dci+DCI_pdu->Num_common_dci > 0)
1308
      LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_top (pdcch) (common %"PRIu8",ue_spec %"PRIu8")\n",eNB->Mod_id,frame, subframe,
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            DCI_pdu->Num_common_dci,DCI_pdu->Num_ue_spec_dci);

    num_pdcch_symbols = generate_dci_top(DCI_pdu->Num_ue_spec_dci,
                                         DCI_pdu->Num_common_dci,
                                         DCI_pdu->dci_alloc,
                                         0,
                                         AMP,
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                                         fp,
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                                         eNB->common_vars.txdataF[0],
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                                         subframe);
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  }
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1322
#ifdef PHY_ABSTRACTION // FIXME this ifdef seems suspicious
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  else {
1324
    LOG_D(PHY,"[eNB %"PRIu8"] Frame %d, subframe %d: Calling generate_dci_to_emul\n",eNB->Mod_id,frame, subframe);
1325
    num_pdcch_symbols = generate_dci_top_emul(eNB,DCI_pdu->Num_ue_spec_dci,DCI_pdu->Num_common_dci,DCI_pdu->dci_alloc,subframe);
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  }
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#endif

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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX,0);
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  // Check for SI activity
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1334
  if (eNB->dlsch_SI->active == 1) {
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1336
    pdsch_procedures(eNB,proc,eNB->dlsch_SI,(LTE_eNB_DLSCH_t*)NULL,(LTE_eNB_UE_stats*)NULL,0,num_pdcch_symbols,abstraction_flag);
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1338
#if defined(SMBV) 
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    // Configures the data source of allocation (allocation is configured by DCI)
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    if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
      LOG_D(PHY,"[SMBV] Frame %3d, Configuring SI payload in SF %d alloc %"PRIu8"\n",frame,(smbv_frame_cnt*10) + (subframe),smbv_alloc_cnt);
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      smbv_configure_datalist_for_alloc(smbv_fname, smbv_alloc_cnt++, (smbv_frame_cnt*10) + (subframe), DLSCH_pdu, input_buffer_length);
    }
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#endif
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  }
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  // Check for RA activity
1350
  if (eNB->dlsch_ra->active == 1) {
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#if defined(SMBV) 
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    // Configures the data source of allocation (allocation is configured by DCI)
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    if (smbv_is_config_frame(frame) && (smbv_frame_cnt < 4)) {
      LOG_D(PHY,"[SMBV] Frame %3d, Configuring RA payload in SF %d alloc %"PRIu8"\n",frame,(smbv_frame_cnt*10) + (subframe),smbv_alloc_cnt);
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      smbv_configure_datalist_for_alloc(smbv_fname, smbv_alloc_cnt++, (smbv_frame_cnt*10) + (subframe), dlsch_input_buffer, input_buffer_length);
    }
    
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#endif
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    LOG_D(PHY,"[eNB %"PRIu8"][RAPROC] Frame %d, subframe %d: Calling generate_dlsch (RA),Msg3 frame %"PRIu32", Msg3 subframe %"PRIu8"\n",
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	  eNB->Mod_id,
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	  frame, subframe,
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	  eNB->ulsch[(uint32_t)UE_id]->Msg3_frame,
	  eNB->ulsch[(uint32_t)UE_id]->Msg3_subframe);
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    pdsch_procedures(eNB,proc,eNB->dlsch_ra,(LTE_eNB_DLSCH_t*)NULL,(LTE_eNB_UE_stats*)NULL,1,num_pdcch_symbols,abstraction_flag);
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    eNB->dlsch_ra->active = 0;
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  }
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  // Now scan UE specific DLSCH
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  for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++)
  {
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    if ((eNB->dlsch[(uint8_t)UE_id][0])&&
        (eNB->dlsch[(uint8_t)UE_id][0]->rnti>0)&&
        (eNB->dlsch[(uint8_t)UE_id][0]->active == 1)) {
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      pdsch_procedures(eNB,proc,eNB->dlsch[(uint8_t)UE_id][0],eNB->dlsch[(uint8_t)UE_id][1],&eNB->UE_stats[(uint32_t)UE_id],0,num_pdcch_symbols,abstraction_flag);
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    }
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    else if ((eNB->dlsch[(uint8_t)UE_id][0])&&
             (eNB->dlsch[(uint8_t)UE_id][0]->rnti>0)&&
             (eNB->dlsch[(uint8_t)UE_id][0]->active == 0)) {
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      // clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later)
1392
      eNB->dlsch[(uint8_t)UE_id][0]->subframe_tx[subframe]=0;
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    }
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  }
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  // if we have PHICH to generate
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  if (is_phich_subframe(fp,subframe))
1401
  {
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    generate_phich_top(eNB,
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		       proc,
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                       AMP,
                       0,
                       abstraction_flag);
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  }
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#ifdef EMOS
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  phy_procedures_emos_eNB_TX(subframe, eNB);
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#endif
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#if !(defined(EXMIMO) || defined(OAI_USRP) || defined (CPRIGW))
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  if (abstraction_flag==0)
  {
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    start_meas(&eNB->ofdm_mod_stats);
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    do_OFDM_mod(eNB->common_vars.txdataF[0],
                eNB->common_vars.txdata[0],
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                frame,subframe<<1,
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                fp);
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    do_OFDM_mod(eNB->common_vars.txdataF[0],
                eNB->common_vars.txdata[0],
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                frame,1+(subframe<<1),
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                fp);
    stop_meas(&eNB->ofdm_mod_stats);
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  }
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#endif
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  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX,0);
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  stop_meas(&eNB->phy_proc_tx);
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}

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void process_Msg3(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,uint8_t UE_id, uint8_t harq_pid)
1439
{
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  // this prepares the demodulation of the first PUSCH of a new user, containing Msg3
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  int subframe = proc->subframe_rx;
  int frame = proc->frame_rx;
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  LOG_D(PHY,"[eNB %d][RAPROC] frame %d : subframe %d : process_Msg3 UE_id %d (active %d, subframe %d, frame %d)\n",
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        eNB->Mod_id,
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        frame,subframe,
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        UE_id,eNB->ulsch[(uint32_t)UE_id]->Msg3_active,
        eNB->ulsch[(uint32_t)UE_id]->Msg3_subframe,
        eNB->ulsch[(uint32_t)UE_id]->Msg3_frame);
  eNB->ulsch[(uint32_t)UE_id]->Msg3_flag = 0;
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  if ((eNB->ulsch[(uint32_t)UE_id]->Msg3_active == 1) &&
      (eNB->ulsch[(uint32_t)UE_id]->Msg3_subframe == subframe) &&
      (eNB->ulsch[(uint32_t)UE_id]->Msg3_frame == (uint32_t)frame))   {
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    //    harq_pid = 0;
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    eNB->ulsch[(uint32_t)UE_id]->Msg3_active = 0;
    eNB->ulsch[(uint32_t)UE_id]->Msg3_flag = 1;
    eNB->ulsch[(uint32_t)UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag=1;
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    LOG_D(PHY,"[eNB %d][RAPROC] frame %d, subframe %d: Setting subframe_scheduling_flag (Msg3) for UE %d\n",
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          eNB->Mod_id,
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          frame,subframe,UE_id);
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  }
}


// This function retrieves the harq_pid of the corresponding DLSCH process
// and updates the error statistics of the DLSCH based on the received ACK
// info from UE along with the round index.  It also performs the fine-grain
// rate-adaptation based on the error statistics derived from the ACK/NAK process

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void process_HARQ_feedback(uint8_t UE_id,
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                           PHY_VARS_eNB *eNB,
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			   eNB_rxtx_proc_t *proc,
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                           uint8_t pusch_flag,
                           uint8_t *pucch_payload,
                           uint8_t pucch_sel,
                           uint8_t SR_payload)
{
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  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
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  uint8_t dl_harq_pid[8],dlsch_ACK[8],dl_subframe;
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  LTE_eNB_DLSCH_t *dlsch             =  eNB->dlsch[(uint32_t)UE_id][0];
  LTE_eNB_UE_stats *ue_stats         =  &eNB->UE_stats[(uint32_t)UE_id];
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  LTE_DL_eNB_HARQ_t *dlsch_harq_proc;
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  uint8_t subframe_m4,M,m;
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  int mp;
  int all_ACKed=1,nb_alloc=0,nb_ACK=0;
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  int frame = proc->frame_rx;
  int subframe = proc->subframe_rx;
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  int harq_pid = subframe2harq_pid( fp,frame,subframe);
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  if (fp->frame_type == FDD) { //FDD
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    subframe_m4 = (subframe<4) ? subframe+6 : subframe-4;
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    dl_harq_pid[0] = dlsch->harq_ids[subframe_m4];
    M=1;
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1501
    if (pusch_flag == 1) {
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      dlsch_ACK[0] = eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0];
1503
      if (dlsch->subframe_tx[subframe_m4]==1)
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      LOG_D(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d on PUSCH for subframe %d\n",eNB->Mod_id,
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	    frame,dlsch_ACK[0],subframe_m4);
    }
    else {
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      dlsch_ACK[0] = pucch_payload[0];
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      LOG_D(PHY,"[eNB %d] Frame %d: Received ACK/NAK %d on PUCCH for subframe %d\n",eNB->Mod_id,
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	    frame,dlsch_ACK[0],subframe_m4);
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      /*
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      if (dlsch_ACK[0]==0)
	AssertFatal(0,"Exiting on NAK on PUCCH\n");
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      */
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    }
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#if defined(MESSAGE_CHART_GENERATOR_PHY)
    MSC_LOG_RX_MESSAGE(
      MSC_PHY_ENB,MSC_PHY_UE,
      NULL,0,
      "%05u:%02u %s received %s  rnti %x harq id %u  tx SF %u",
      frame,subframe,
      (pusch_flag == 1)?"PUSCH":"PUCCH",
      (dlsch_ACK[0])?"ACK":"NACK",
      dlsch->rnti,
      dl_harq_pid[0],
      subframe_m4
      );
#endif
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  } else { // TDD Handle M=1,2 cases only

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    M=ul_ACK_subframe2_M(fp,
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                         subframe);

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    // Now derive ACK information for TDD
    if (pusch_flag == 1) { // Do PUSCH ACK/NAK first
      // detect missing DAI
      //FK: this code is just a guess
      //RK: not exactly, yes if scheduled from PHICH (i.e. no DCI format 0)
      //    otherwise, it depends on how many of the PDSCH in the set are scheduled, we can leave it like this,
      //    but we have to adapt the code below.  For example, if only one out of 2 are scheduled, only 1 bit o_ACK is used

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      dlsch_ACK[0] = eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0];
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      dlsch_ACK[1] = (eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode == bundling)
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                     ?eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[0]:eNB->ulsch[(uint8_t)UE_id]->harq_processes[harq_pid]->o_ACK[1];
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    }
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    else {  // PUCCH ACK/NAK
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      if ((SR_payload == 1)&&(pucch_sel!=2)) {  // decode Table 7.3 if multiplexing and SR=1
        nb_ACK = 0;

        if (M == 2) {
          if ((pucch_payload[0] == 1) && (pucch_payload[1] == 1)) // b[0],b[1]
            nb_ACK = 1;
          else if ((pucch_payload[0] == 1) && (pucch_payload[1] == 0))
            nb_ACK = 2;
        } else if (M == 3) {
          if ((pucch_payload[0] == 1) && (pucch_payload[1] == 1))
            nb_ACK = 1;
          else if ((pucch_payload[0] == 1) && (pucch_payload[1] == 0))
            nb_ACK = 2;
          else if ((pucch_payload[0] == 0) && (pucch_payload[1] == 1))
            nb_ACK = 3;
        }
      } else if (pucch_sel == 2) { // bundling or M=1
        dlsch_ACK[0] = pucch_payload[0];
        dlsch_ACK[1] = pucch_payload[0];
      } else { // multiplexing with no SR, this is table 10.1
        if (M==1)
          dlsch_ACK[0] = pucch_payload[0];
        else if (M==2) {
          if (((pucch_sel == 1) && (pucch_payload[0] == 1) && (pucch_payload[1] == 1)) ||
              ((pucch_sel == 0) && (pucch_payload[0] == 0) && (pucch_payload[1] == 1)))
            dlsch_ACK[0] = 1;
          else
            dlsch_ACK[0] = 0;

          if (((pucch_sel == 1) && (pucch_payload[0] == 1) && (pucch_payload[1] == 1)) ||
              ((pucch_sel == 1) && (pucch_payload[0] == 0) && (pucch_payload[1] == 0)))
            dlsch_ACK[1] = 1;
          else
            dlsch_ACK[1] = 0;
        }
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      }
1586
    }
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  }

  // handle case where positive SR was transmitted with multiplexing
  if ((SR_payload == 1)&&(pucch_sel!=2)&&(pusch_flag == 0)) {
1591
    nb_alloc = 0;
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    for (m=0; m<M; m++) {
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      dl_subframe = ul_ACK_subframe2_dl_subframe(fp,
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                    subframe,
                    m);

      if (dlsch->subframe_tx[dl_subframe]==1)
        nb_alloc++;
1600
    }
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1602 1603
    if (nb_alloc == nb_ACK)
      all_ACKed = 1;
1604
    else
1605
      all_ACKed = 0;
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  }


1609
  for (m=0,mp=-1; m<M; m++) {
1610

1611
    dl_subframe = ul_ACK_subframe2_dl_subframe(fp,
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                  subframe,
                  m);
1614

1615 1616
    if (dlsch->subframe_tx[dl_subframe]==1) {
      if (pusch_flag == 1)
1617
        mp++;
1618
      else
1619
        mp = m;
1620

1621
      dl_harq_pid[m]     = dlsch->harq_ids[dl_subframe];
1622

1623
      if ((pucch_sel != 2)&&(pusch_flag == 0)) { // multiplexing
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        if ((SR_payload == 1)&&(all_ACKed == 1))
          dlsch_ACK[m] = 1;
        else
          dlsch_ACK[m] = 0;
1628
      }
1629

1630
      if (dl_harq_pid[m]<dlsch->Mdlharq) {
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        dlsch_harq_proc = dlsch->harq_processes[dl_harq_pid[m]];
#ifdef DEBUG_PHY_PROC
1633
        LOG_D(PHY,"[eNB %d][PDSCH %x/%d] subframe %d, status %d, round %d (mcs %d, rv %d, TBS %d)\n",eNB->Mod_id,
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              dlsch->rnti,dl_harq_pid[m],dl_subframe,
              dlsch_harq_proc->status,dlsch_harq_proc->round,
              dlsch->harq_processes[dl_harq_pid[m]]->mcs,
              dlsch->harq_processes[dl_harq_pid[m]]->rvidx,
              dlsch->harq_processes[dl_harq_pid[m]]->TBS);

        if (dlsch_harq_proc->status==DISABLED)
          LOG_E(PHY,"dlsch_harq_proc is disabled? \n");

1643
#endif
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        if ((dl_harq_pid[m]<dlsch->Mdlharq) &&
            (dlsch_harq_proc->status == ACTIVE)) {
          // dl_harq_pid of DLSCH is still active

          if ( dlsch_ACK[mp]==0) {
            // Received NAK
#ifdef DEBUG_PHY_PROC
1652
            LOG_D(PHY,"[eNB %d][PDSCH %x/%d] M = %d, m= %d, mp=%d NAK Received in round %d, requesting retransmission\n",eNB->Mod_id,
1653
                  dlsch->rnti,dl_harq_pid[m],M,m,mp,dlsch_harq_proc->round);
1654
#endif
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            if (dlsch_harq_proc->round == 0)
              ue_stats->dlsch_NAK_round0++;

            ue_stats->dlsch_NAK[dl_harq_pid[m]][dlsch_harq_proc->round]++;


            // then Increment DLSCH round index
            dlsch_harq_proc->round++;

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            if (dlsch_harq_proc->round == dlsch->Mlimit) {
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              // This was the last round for DLSCH so reset round and increment l2_error counter
#ifdef DEBUG_PHY_PROC
1669
              LOG_W(PHY,"[eNB %d][PDSCH %x/%d] DLSCH retransmissions exhausted, dropping packet\n",eNB->Mod_id,
1670
                    dlsch->rnti,dl_harq_pid[m]);
1671
#endif
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#if defined(MESSAGE_CHART_GENERATOR_PHY)
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              MSC_LOG_EVENT(MSC_PHY_ENB, "0 HARQ DLSCH Failed RNTI %"PRIx16" round %u",
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                            dlsch->rnti,
                            dlsch_harq_proc->round);
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#endif
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              dlsch_harq_proc->round = 0;
              ue_stats->dlsch_l2_errors[dl_harq_pid[m]]++;
              dlsch_harq_proc->status = SCH_IDLE;
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              put_harq_pid_in_freelist(dlsch, dl_harq_pid[m]);
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              dlsch->harq_ids[dl_subframe] = dlsch->Mdlharq;
            }
          } else {
#ifdef DEBUG_PHY_PROC
1686
            LOG_D(PHY,"[eNB %d][PDSCH %x/%d] ACK Received in round %d, resetting process\n",eNB->Mod_id,
1687
                  dlsch->rnti,dl_harq_pid[m],dlsch_harq_proc->round);
1688
#endif
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            ue_stats->dlsch_ACK[dl_harq_pid[m]][dlsch_harq_proc->round]++;

            // Received ACK so set round to 0 and set dlsch_harq_pid IDLE
            dlsch_harq_proc->round  = 0;
            dlsch_harq_proc->status = SCH_IDLE;
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            put_harq_pid_in_freelist(dlsch, dl_harq_pid[m]);
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            dlsch->harq_ids[dl_subframe] = dlsch->Mdlharq;

            ue_stats->total_TBS = ue_stats->total_TBS +
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                                  eNB->dlsch[(uint8_t)UE_id][0]->harq_processes[dl_harq_pid[m]]->TBS;
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            /*
              ue_stats->total_transmitted_bits = ue_stats->total_transmitted_bits +
1701
              eNB->dlsch[(uint8_t)UE_id][0]->harq_processes[dl_harq_pid[m]]->TBS;
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            */
          }

          // Do fine-grain rate-adaptation for DLSCH
          if (ue_stats->dlsch_NAK_round0 > dlsch->error_threshold) {
            if (ue_stats->dlsch_mcs_offset == 1)
              ue_stats->dlsch_mcs_offset=0;
            else
              ue_stats->dlsch_mcs_offset=-1;
          }

#ifdef DEBUG_PHY_PROC
          LOG_D(PHY,"[process_HARQ_feedback] Frame %d Setting round to %d for pid %d (subframe %d)\n",frame,
                dlsch_harq_proc->round,dl_harq_pid[m],subframe);
1716
#endif
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          // Clear NAK stats and adjust mcs offset
          // after measurement window timer expires
          if (ue_stats->dlsch_sliding_cnt == dlsch->ra_window_size) {
            if ((ue_stats->dlsch_mcs_offset == 0) && (ue_stats->dlsch_NAK_round0 < 2))
              ue_stats->dlsch_mcs_offset = 1;

            if ((ue_stats->dlsch_mcs_offset == 1) && (ue_stats->dlsch_NAK_round0 > 2))
              ue_stats->dlsch_mcs_offset = 0;

            if ((ue_stats->dlsch_mcs_offset == 0) && (ue_stats->dlsch_NAK_round0 > 2))
              ue_stats->dlsch_mcs_offset = -1;

            if ((ue_stats->dlsch_mcs_offset == -1) && (ue_stats->dlsch_NAK_round0 < 2))
              ue_stats->dlsch_mcs_offset = 0;

            ue_stats->dlsch_NAK_round0 = 0;
            ue_stats->dlsch_sliding_cnt = 0;
          }


        }
1739
      }
1740
    }
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  }
}

1744
void get_n1_pucch_eNB(PHY_VARS_eNB *eNB,
1745
		      eNB_rxtx_proc_t *proc,
1746 1747 1748 1749 1750 1751
                      uint8_t UE_id,
                      int16_t *n1_pucch0,
                      int16_t *n1_pucch1,
                      int16_t *n1_pucch2,
                      int16_t *n1_pucch3)
{
1752

1753
  LTE_DL_FRAME_PARMS *frame_parms=&eNB->frame_parms;
1754
  uint8_t nCCE0,nCCE1;
1755
  int sf;
1756 1757
  int frame = proc->frame_rx;
  int subframe = proc->subframe_rx;
1758 1759

  if (frame_parms->frame_type == FDD ) {
1760
    sf = (subframe<4) ? (subframe+6) : (subframe-4);
1761

1762 1763
    if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[sf]>0) {
      *n1_pucch0 = frame_parms->pucch_config_common.n1PUCCH_AN + eNB->dlsch[(uint32_t)UE_id][0]->nCCE[sf];
1764
      *n1_pucch1 = -1;
1765
    } else {
1766 1767 1768
      *n1_pucch0 = -1;
      *n1_pucch1 = -1;
    }
1769
  } else {
1770

1771 1772 1773
    switch (frame_parms->tdd_config) {
    case 1:  // DL:S:UL:UL:DL:DL:S:UL:UL:DL
      if (subframe == 2) {  // ACK subframes 5 and 6
1774 1775
        /*  if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[6]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[6];
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          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
          }
          else
          *n1_pucch1 = -1;*/

1781 1782
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[5]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[5];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;
      } else if (subframe == 3) { // ACK subframe 9

1790 1791
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[9]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[9];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 +frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;

      } else if (subframe == 7) { // ACK subframes 0 and 1
        //harq_ack[0].nCCE;
        //harq_ack[1].nCCE;
1801 1802
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[0]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[0];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;
      } else if (subframe == 8) { // ACK subframes 4
        //harq_ack[4].nCCE;
1810 1811
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[4]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[4];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;

        *n1_pucch1 = -1;
      } else {
        LOG_D(PHY,"[eNB %d] frame %d: phy_procedures_lte.c: get_n1pucch, illegal subframe %d for tdd_config %d\n",
1819
              eNB->Mod_id,
1820 1821 1822
              frame,
              subframe,frame_parms->tdd_config);
        return;
1823
      }
1824

1825
      break;
1826

1827 1828
    case 3:  // DL:S:UL:UL:UL:DL:DL:DL:DL:DL
      if (subframe == 2) {  // ACK subframes 5,6 and 1 (S in frame-2), forget about n-11 for the moment (S-subframe)
1829 1830
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[6]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[6];
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          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch1 = -1;

1835 1836
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[5]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[5];
1837 1838 1839 1840 1841
          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0+ frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;
      } else if (subframe == 3) { // ACK subframes 7 and 8
        LOG_D(PHY,"get_n1_pucch_eNB : subframe 3, subframe_tx[7] %d, subframe_tx[8] %d\n",
1842
              eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[7],eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[8]);
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1844 1845
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[8]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[8];
1846 1847 1848 1849 1850
          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
          LOG_D(PHY,"nCCE1 %d, n1_pucch1 %d\n",nCCE1,*n1_pucch1);
        } else
          *n1_pucch1 = -1;

1851 1852
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[7]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[7];
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          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 +frame_parms->pucch_config_common.n1PUCCH_AN;
          LOG_D(PHY,"nCCE0 %d, n1_pucch0 %d\n",nCCE0,*n1_pucch0);
        } else
          *n1_pucch0 = -1;
      } else if (subframe == 4) { // ACK subframes 9 and 0
1858 1859
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[0]>0) {
          nCCE1 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[0];
1860 1861 1862 1863
          *n1_pucch1 = get_Np(frame_parms->N_RB_DL,nCCE1,1) + nCCE1 + frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch1 = -1;

1864 1865
        if (eNB->dlsch[(uint32_t)UE_id][0]->subframe_tx[9]>0) {
          nCCE0 = eNB->dlsch[(uint32_t)UE_id][0]->nCCE[9];
1866 1867 1868 1869 1870
          *n1_pucch0 = get_Np(frame_parms->N_RB_DL,nCCE0,0) + nCCE0 +frame_parms->pucch_config_common.n1PUCCH_AN;
        } else
          *n1_pucch0 = -1;
      } else {
        LOG_D(PHY,"[eNB %d] Frame %d: phy_procedures_lte.c: get_n1pucch, illegal subframe %d for tdd_config %d\n",
1871
              eNB->Mod_id,frame,subframe,frame_parms->tdd_config);
1872
        return;
1873
      }
1874

1875
      break;
1876 1877
    }  // switch tdd_config

1878 1879 1880
    // Don't handle the case M>2
    *n1_pucch2 = -1;
    *n1_pucch3 = -1;
1881 1882 1883
  }
}

1884
void prach_procedures(PHY_VARS_eNB *eNB,uint8_t abstraction_flag)
1885
{
1886

1887
  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
1888 1889 1890 1891
  uint16_t preamble_energy_list[64],preamble_delay_list[64];
  uint16_t preamble_max,preamble_energy_max;
  uint16_t i;
  int8_t UE_id;
1892 1893
  int subframe = eNB->proc.subframe_prach;
  int frame = eNB->proc.frame_prach;
1894
  uint8_t CC_id = eNB->CC_id;
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1896 1897
  memset(&preamble_energy_list[0],0,64*sizeof(uint16_t));
  memset(&preamble_delay_list[0],0,64*sizeof(uint16_t));
1898

1899
  if (abstraction_flag == 0) {
1900
    LOG_D(PHY,"[eNB %d][RAPROC] Frame %d, Subframe %d : PRACH RX Signal Power : %d dBm\n",eNB->Mod_id, 
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          frame,subframe,dB_fixed(signal_energy(&eNB->common_vars.rxdata[0][0][subframe*fp->samples_per_tti],512)) - eNB->rx_total_gain_dB);
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1903

1904
    rx_prach(eNB,
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             preamble_energy_list,
             preamble_delay_list,
             frame,
             0);
  } else {
    for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {

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      LOG_D(PHY,"[RAPROC] UE_id %d (%p), generate_prach %d, UE RSI %d, eNB RSI %d preamble index %d\n",
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            UE_id,PHY_vars_UE_g[UE_id][CC_id],PHY_vars_UE_g[UE_id][CC_id]->generate_prach,
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            PHY_vars_UE_g[UE_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex,
1915
            fp->prach_config_common.rootSequenceIndex,
1916 1917
            PHY_vars_UE_g[UE_id][CC_id]->prach_PreambleIndex);

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1918
      if ((PHY_vars_UE_g[UE_id][CC_id]->generate_prach==1) &&
1919
          (PHY_vars_UE_g[UE_id][CC_id]->frame_parms.prach_config_common.rootSequenceIndex ==
1920
           fp->prach_config_common.rootSequenceIndex) ) {
1921 1922 1923
        preamble_energy_list[PHY_vars_UE_g[UE_id][CC_id]->prach_PreambleIndex] = 800;
        preamble_delay_list[PHY_vars_UE_g[UE_id][CC_id]->prach_PreambleIndex] = 5;

1924
      }
1925
    }
1926
  }
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1928 1929 1930
  preamble_energy_max = preamble_energy_list[0];
  preamble_max = 0;

1931
  for (i=1; i<64; i++) {
1932 1933 1934 1935
    if (preamble_energy_max < preamble_energy_list[i]) {
      preamble_energy_max = preamble_energy_list[i];
      preamble_max = i;
    }
1936 1937 1938
  }

#ifdef DEBUG_PHY_PROC
1939
  LOG_D(PHY,"[RAPROC] Most likely preamble %d, energy %d dB delay %d\n",
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        preamble_max,
        preamble_energy_list[preamble_max],
        preamble_delay_list[preamble_max]);
1943 1944
#endif

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1945
  if (preamble_energy_list[preamble_max] > 580) {
1946

1947
    UE_id = find_next_ue_index(eNB);
1948
 
1949
    if (UE_id>=0) {
1950
      eNB->UE_stats[(uint32_t)UE_id].UE_timing_offset = preamble_delay_list[preamble_max]&0x1FFF; //limit to 13 (=11+2) bits
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1952
      eNB->UE_stats[(uint32_t)UE_id].sector = 0;
1953
      LOG_D(PHY,"[eNB %d/%d][RAPROC] Frame %d, subframe %d Initiating RA procedure (UE_id %d) with preamble %d, energy %d.%d dB, delay %d\n",
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            eNB->Mod_id,
            eNB->CC_id,
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            frame,
            subframe,
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	    UE_id,
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            preamble_max,
            preamble_energy_max/10,
            preamble_energy_max%10,
            preamble_delay_list[preamble_max]);
1963

1964
      if (eNB->mac_enabled==1) {
1965 1966
        uint8_t update_TA=4;

1967
        switch (fp->N_RB_DL) {
1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984
        case 6:
          update_TA = 16;
          break;

        case 25:
          update_TA = 4;
          break;

        case 50:
          update_TA = 2;
          break;

        case 100:
          update_TA = 1;
          break;
        }

1985 1986
      mac_xface->initiate_ra_proc(eNB->Mod_id,
                                  eNB->CC_id,
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                                  frame,
                                  preamble_max,
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                                  preamble_delay_list[preamble_max]*update_TA,
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1990
				  0,subframe,0);
1991 1992
      }      

1993
    } else {
1994
      MSC_LOG_EVENT(MSC_PHY_ENB, "0 RA Failed add user, too many");
1995
      LOG_I(PHY,"[eNB %d][RAPROC] frame %d, subframe %d: Unable to add user, max user count reached\n",
1996
            eNB->Mod_id,frame, subframe);
1997
    }
1998 1999 2000
  }
}

2001
void pucch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_pid,const uint8_t abstraction_flag) {
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2002

2003
  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
2004
  uint8_t SR_payload = 0,*pucch_payload=NULL,pucch_payload0[2]= {0,0},pucch_payload1[2]= {0,0};
2005 2006 2007
  int16_t n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3;
  uint8_t do_SR = 0;
  uint8_t pucch_sel = 0;
2008
  int32_t metric0=0,metric1=0,metric0_SR=0;
2009 2010
  ANFBmode_t bundling_flag;
  PUCCH_FMT_t format;
2011 2012
  const int subframe = proc->subframe_rx;
  const int frame = proc->frame_rx;
2013

2014 2015 2016
  if ((eNB->dlsch[UE_id][0]) &&
      (eNB->dlsch[UE_id][0]->rnti>0) &&
      (eNB->ulsch[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag==0)) { 
2017

2018
      // check SR availability
2019 2020 2021
    do_SR = is_SR_subframe(eNB,proc,UE_id);
    //      do_SR = 0;
    
2022 2023
      // Now ACK/NAK
      // First check subframe_tx flag for earlier subframes
2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070
    get_n1_pucch_eNB(eNB,
		     proc,
		     UE_id,
		     &n1_pucch0,
		     &n1_pucch1,
		     &n1_pucch2,
		     &n1_pucch3);
    
    LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d, subframe %d Checking for PUCCH (%d,%d,%d,%d) SR %d\n",
	  eNB->Mod_id,eNB->dlsch[UE_id][0]->rnti,
	  frame,subframe,
	  n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,do_SR);
    
    if ((n1_pucch0==-1) && (n1_pucch1==-1) && (do_SR==0)) {  // no TX PDSCH that have to be checked and no SR for this UE_id
    } else {
      // otherwise we have some PUCCH detection to do
      
      // Null out PUCCH PRBs for noise measurement
      switch(fp->N_RB_UL) {
      case 6:
	eNB->rb_mask_ul[0] |= (0x1 | (1<<5)); //position 5
	break;
      case 15:
	eNB->rb_mask_ul[0] |= (0x1 | (1<<14)); // position 14
	break;
      case 25:
	eNB->rb_mask_ul[0] |= (0x1 | (1<<24)); // position 24
	break;
      case 50:
	eNB->rb_mask_ul[0] |= 0x1;
	eNB->rb_mask_ul[1] |= (1<<17); // position 49 (49-32)
	break;
      case 75:
	eNB->rb_mask_ul[0] |= 0x1;
	eNB->rb_mask_ul[2] |= (1<<10); // position 74 (74-64)
	break;
      case 100:
	eNB->rb_mask_ul[0] |= 0x1;
	eNB->rb_mask_ul[3] |= (1<<3); // position 99 (99-96)
	break;
      default:
	LOG_E(PHY,"Unknown number for N_RB_UL %d\n",fp->N_RB_UL);
	break;
      }
      
      if (do_SR == 1) {
	eNB->UE_stats[UE_id].sr_total++;
2071

2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082
	if (abstraction_flag == 0)
	  metric0_SR = rx_pucch(eNB,
				pucch_format1,
				UE_id,
				eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,
				0, // n2_pucch
				0, // shortened format, should be use_srs flag, later
				&SR_payload,
				subframe,
				PUCCH1_THRES);
	
2083
#ifdef PHY_ABSTRACTION
2084 2085 2086 2087 2088 2089 2090 2091 2092 2093
	else {
	  metric0_SR = rx_pucch_emul(eNB,
				     UE_id,
				     pucch_format1,
				     0,
				     &SR_payload);
	  LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR (UE SR %d/%d)\n",eNB->Mod_id,
		eNB->ulsch[UE_id]->rnti,frame,subframe,SR_payload,eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex);
	}
	
2094
#endif
2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117
	
	if (SR_payload == 1) {
	  LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Got SR for PUSCH, transmitting to MAC\n",eNB->Mod_id,
		eNB->ulsch[UE_id]->rnti,frame,subframe);
	  eNB->UE_stats[UE_id].sr_received++;
	  
	  if (eNB->first_sr[UE_id] == 1) { // this is the first request for uplink after Connection Setup, so clear HARQ process 0 use for Msg4
	    /* is this test necessary? */
	    if (eNB->dlsch[UE_id][0]->harq_processes[0]->status != SCH_IDLE)
	      put_harq_pid_in_freelist(eNB->dlsch[UE_id][0], 0);
	    eNB->first_sr[UE_id] = 0;
	    eNB->dlsch[UE_id][0]->harq_processes[0]->round=0;
	    eNB->dlsch[UE_id][0]->harq_processes[0]->status=SCH_IDLE;
	    LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d First SR\n",
		  eNB->Mod_id,
		  eNB->ulsch[UE_id]->rnti,frame,subframe);
	  }
	  
	  if (eNB->mac_enabled==1) {
	    mac_xface->SR_indication(eNB->Mod_id,
				     eNB->CC_id,
				     frame,
				     eNB->dlsch[UE_id][0]->rnti,subframe);
2118
	  }
2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154
	}
      }// do_SR==1
      
      if ((n1_pucch0==-1) && (n1_pucch1==-1)) { // just check for SR
      } else if (fp->frame_type==FDD) { // FDD
	// if SR was detected, use the n1_pucch from SR, else use n1_pucch0
	//          n1_pucch0 = (SR_payload==1) ? eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex:n1_pucch0;
	
	LOG_D(PHY,"Demodulating PUCCH for ACK/NAK: n1_pucch0 %d (%d), SR_payload %d\n",n1_pucch0,eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,SR_payload);
	
	if (abstraction_flag == 0) {
	  
	  
	  
	  metric0 = rx_pucch(eNB,
			     pucch_format1a,
			     UE_id,
			     (uint16_t)n1_pucch0,
			     0, //n2_pucch
			     0, // shortened format
			     pucch_payload0,
			     subframe,
			     PUCCH1a_THRES);
	  
	  if (metric0 < metric0_SR)
	    metric0=rx_pucch(eNB,
			     pucch_format1a,
			     UE_id,
			     eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,
			     0, //n2_pucch
			     0, // shortened format
			     pucch_payload0,
			     subframe,
			     PUCCH1a_THRES);
	}
	else {
2155
#ifdef PHY_ABSTRACTION
2156 2157 2158 2159 2160
	  metric0 = rx_pucch_emul(eNB,UE_id,
				  pucch_format1a,
				  0,
				  pucch_payload0,
				  subframe);
2161
#endif
2162 2163
	}
	
2164
#ifdef DEBUG_PHY_PROC
2165 2166 2167 2168 2169
	LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d pucch1a (FDD) payload %d (metric %d)\n",
	      eNB->Mod_id,
	      eNB->dlsch[UE_id][0]->rnti,
	      frame,subframe,
	      pucch_payload0[0],metric0);
2170
#endif
2171 2172
	
	process_HARQ_feedback(UE_id,eNB,proc,
2173 2174 2175 2176
                                0,// pusch_flag
                                pucch_payload0,
                                2,
                                SR_payload);
2177

2178 2179
        } // FDD
        else {  //TDD
2180

2181
          bundling_flag = eNB->pucch_config_dedicated[UE_id].tdd_AckNackFeedbackMode;
2182

2183
          // fix later for 2 TB case and format1b
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2184

2185
          if ((fp->frame_type==FDD) ||
2186
              (bundling_flag==bundling)    ||
2187
              ((fp->frame_type==TDD)&&(fp->tdd_config==1)&&((subframe!=2)||(subframe!=7)))) {
2188
            format = pucch_format1a;
2189
	  } else {
2190
            format = pucch_format1b;
2191
	  }
2192

2193 2194 2195
          // if SR was detected, use the n1_pucch from SR
          if (SR_payload==1) {
#ifdef DEBUG_PHY_PROC
2196
            LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d with SR\n",eNB->Mod_id,
2197
                  eNB->dlsch[UE_id][0]->rnti,
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                  frame,subframe,
                  n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,format);
#endif
2201

2202
            if (abstraction_flag == 0)
2203
              metric0_SR = rx_pucch(eNB,
2204 2205
				    format,
				    UE_id,
2206
				    eNB->scheduling_request_config[UE_id].sr_PUCCH_ResourceIndex,
2207 2208 2209 2210 2211 2212
				    0, //n2_pucch
				    0, // shortened format
				    pucch_payload0,
				    subframe,
				    PUCCH1a_THRES);
            else {
2213
#ifdef PHY_ABSTRACTION
2214
              metric0 = rx_pucch_emul(eNB,UE_id,
2215 2216 2217 2218
                                      format,
                                      0,
                                      pucch_payload0,
                                      subframe);
2219
#endif
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            }
          } else { //using n1_pucch0/n1_pucch1 resources
#ifdef DEBUG_PHY_PROC
2223
            LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d Checking ACK/NAK (%d,%d,%d,%d) format %d\n",eNB->Mod_id,
2224
                  eNB->dlsch[UE_id][0]->rnti,
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                  frame,subframe,
                  n1_pucch0,n1_pucch1,n1_pucch2,n1_pucch3,format);
#endif
            metric0=0;
            metric1=0;
2230

2231 2232 2233
            // Check n1_pucch0 metric
            if (n1_pucch0 != -1) {
              if (abstraction_flag == 0)
2234
                metric0 = rx_pucch(eNB,
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                                   format,
                                   UE_id,
                                   (uint16_t)n1_pucch0,
                                   0, // n2_pucch
                                   0, // shortened format
                                   pucch_payload0,
                                   subframe,
                                   PUCCH1a_THRES);
              else {
2244
#ifdef PHY_ABSTRACTION
2245
                metric0 = rx_pucch_emul(eNB,UE_id,
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                                        format,
                                        0,
                                        pucch_payload0,
                                        subframe);
2250
#endif
2251 2252
              }
            }
2253

2254 2255 2256
            // Check n1_pucch1 metric
            if (n1_pucch1 != -1) {
              if (abstraction_flag == 0)
2257
                metric1 = rx_pucch(eNB,
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                                   format,
                                   UE_id,
                                   (uint16_t)n1_pucch1,
                                   0, //n2_pucch
                                   0, // shortened format
                                   pucch_payload1,
                                   subframe,
                                   PUCCH1a_THRES);
              else {
#ifdef PHY_ABSTRACTION
2268
                metric1 = rx_pucch_emul(eNB,UE_id,
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                                        format,
                                        1,
                                        pucch_payload1,
                                        subframe);
2273

2274

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#endif
              }
            }
          }
2279

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          if (SR_payload == 1) {
            pucch_payload = pucch_payload0;
2282

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            if (bundling_flag == bundling)
              pucch_sel = 2;
          } else if (bundling_flag == multiplexing) { // multiplexing + no SR
            pucch_payload = (metric1>metric0) ? pucch_payload1 : pucch_payload0;
            pucch_sel     = (metric1>metric0) ? 1 : 0;
          } else { // bundling + no SR
            if (n1_pucch1 != -1)
              pucch_payload = pucch_payload1;
            else if (n1_pucch0 != -1)
              pucch_payload = pucch_payload0;

            pucch_sel = 2;  // indicate that this is a bundled ACK/NAK
          }
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#ifdef DEBUG_PHY_PROC
2298
          LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d ACK/NAK metric 0 %d, metric 1 %d, sel %d, (%d,%d)\n",eNB->Mod_id,
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                eNB->dlsch[UE_id][0]->rnti,
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                frame,subframe,
                metric0,metric1,pucch_sel,pucch_payload[0],pucch_payload[1]);
2302
#endif
2303
          process_HARQ_feedback(UE_id,eNB,proc,
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                                0,// pusch_flag
                                pucch_payload,
                                pucch_sel,
                                SR_payload);
        }
2309
      }
2310

2311 2312
    }
}
2313

2314
void cba_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,int UE_id,int harq_pid,const uint8_t abstraction_flag) {
2315

2316 2317
  uint8_t access_mode;
  int num_active_cba_groups;
2318 2319
  const int subframe = proc->subframe_rx;
  const int frame = proc->frame_rx;
2320 2321
  uint16_t rnti=0;
  int ret=0;
2322
  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
2323

2324
  num_active_cba_groups = eNB->ulsch[UE_id]->num_active_cba_groups;
2325
  
2326
  if ((eNB->ulsch[UE_id]) &&
2327
      (num_active_cba_groups > 0) &&
2328 2329
      (eNB->ulsch[UE_id]->cba_rnti[UE_id%num_active_cba_groups]>0) &&
      (eNB->ulsch[UE_id]->harq_processes[harq_pid]->subframe_cba_scheduling_flag==1)) {
2330 2331 2332 2333
    rnti=0;
    
#ifdef DEBUG_PHY_PROC
    LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d Checking PUSCH/ULSCH CBA Reception for UE %d with cba rnti %x mode %s\n",
2334
	  eNB->Mod_id,harq_pid,
2335
	  frame,subframe,
2336
	  UE_id, (uint16_t)eNB->ulsch[UE_id]->cba_rnti[UE_id%num_active_cba_groups],mode_string[eNB->UE_stats[UE_id].mode]);
2337 2338 2339
#endif
    
    if (abstraction_flag==0) {
2340
      rx_ulsch(eNB,proc,
2341
	       eNB->UE_stats[UE_id].sector,  // this is the effective sector id
2342
	       UE_id,
2343
	       eNB->ulsch,
2344 2345 2346 2347 2348
	       0);
    }
    
#ifdef PHY_ABSTRACTION
    else {
2349
      rx_ulsch_emul(eNB,proc,
2350
		    subframe,
2351
		    eNB->UE_stats[UE_id].sector,  // this is the effective sector id
2352
		    UE_id);
2353 2354 2355 2356 2357
    }
    
#endif
    
    if (abstraction_flag == 0) {
2358
      ret = ulsch_decoding(eNB,proc,
2359 2360
			   UE_id,
			   0, // control_only_flag
2361 2362
			   eNB->ulsch[UE_id]->harq_processes[harq_pid]->V_UL_DAI,
			   eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb>20 ? 1 : 0);
2363 2364 2365 2366
    }
    
#ifdef PHY_ABSTRACTION
    else {
2367
      ret = ulsch_decoding_emul(eNB,
2368 2369 2370 2371 2372 2373
				UE_id,
				&rnti);
    }
    
#endif
    
2374
    if (eNB->ulsch[UE_id]->harq_processes[harq_pid]->cqi_crc_status == 1) {
2375 2376
#ifdef DEBUG_PHY_PROC
      
2377
      print_CQI(eNB->ulsch[UE_id]->harq_processes[harq_pid]->o,eNB->ulsch[UE_id]->harq_processes[harq_pid]->uci_format,0,fp->N_RB_DL);
2378 2379
#endif
      access_mode = UNKNOWN_ACCESS;
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      extract_CQI(eNB->ulsch[UE_id]->harq_processes[harq_pid]->o,
		  eNB->ulsch[UE_id]->harq_processes[harq_pid]->uci_format,
		  &eNB->UE_stats[UE_id],
2383
		  fp->N_RB_DL,
2384
		  &rnti, &access_mode);
2385
      eNB->UE_stats[UE_id].rank = eNB->ulsch[UE_id]->harq_processes[harq_pid]->o_RI[0];
2386 2387
    }
    
2388 2389
      eNB->ulsch[UE_id]->harq_processes[harq_pid]->subframe_cba_scheduling_flag=0;
      eNB->ulsch[UE_id]->harq_processes[harq_pid]->status= SCH_IDLE;
2390 2391 2392
      
      if ((num_active_cba_groups > 0) &&
          (UE_id + num_active_cba_groups < NUMBER_OF_UE_MAX) &&
2393 2394
          (eNB->ulsch[UE_id+num_active_cba_groups]->cba_rnti[UE_id%num_active_cba_groups] > 0 ) &&
          (eNB->ulsch[UE_id+num_active_cba_groups]->num_active_cba_groups> 0)) {
2395 2396
#ifdef DEBUG_PHY_PROC
        LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d harq_pid %d resetting the subframe_scheduling_flag for Ue %d cba groups %d members\n",
2397
              eNB->Mod_id,harq_pid,frame,subframe,UE_id,harq_pid,
2398
              UE_id+num_active_cba_groups, UE_id%eNB->ulsch[UE_id]->num_active_cba_groups);
2399
#endif
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        eNB->ulsch[UE_id+num_active_cba_groups]->harq_processes[harq_pid]->subframe_cba_scheduling_flag=1;
        eNB->ulsch[UE_id+num_active_cba_groups]->harq_processes[harq_pid]->status= CBA_ACTIVE;
        eNB->ulsch[UE_id+num_active_cba_groups]->harq_processes[harq_pid]->TBS=eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS;
2403
      }
2404

2405
      if (ret == (1+MAX_TURBO_ITERATIONS)) {
2406 2407 2408 2409
        eNB->UE_stats[UE_id].ulsch_round_errors[harq_pid][eNB->ulsch[UE_id]->harq_processes[harq_pid]->round]++;
        eNB->ulsch[UE_id]->harq_processes[harq_pid]->phich_active = 1;
        eNB->ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK = 0;
        eNB->ulsch[UE_id]->harq_processes[harq_pid]->round++;
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      } // ulsch in error
      else {
        LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d ULSCH received, setting round to 0, PHICH ACK\n",
2413
              eNB->Mod_id,harq_pid,
2414
              frame,subframe);
2415

2416 2417 2418 2419
        eNB->ulsch[UE_id]->harq_processes[harq_pid]->phich_active = 1;
        eNB->ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK = 1;
        eNB->ulsch[UE_id]->harq_processes[harq_pid]->round = 0;
        eNB->UE_stats[UE_id].ulsch_consecutive_errors = 0;
2420 2421 2422 2423
#ifdef DEBUG_PHY_PROC
#ifdef DEBUG_ULSCH
        LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",
              frame,subframe,
2424
              harq_pid,eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS>>3);
2425

2426 2427
        for (j=0; j<eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS>>3; j++)
          LOG_T(PHY,"%x.",eNB->ulsch[UE_id]->harq_processes[harq_pid]->b[j]);
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        LOG_T(PHY,"\n");
#endif
#endif

        if (access_mode > UNKNOWN_ACCESS) {
          LOG_D(PHY,"[eNB %d] Frame %d, Subframe %d : received ULSCH SDU from CBA transmission, UE (%d,%x), CBA (group %d, rnti %x)\n",
2435
                eNB->Mod_id, frame,subframe,
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                UE_id, eNB->ulsch[UE_id]->rnti,
                UE_id % eNB->ulsch[UE_id]->num_active_cba_groups, eNB->ulsch[UE_id]->cba_rnti[UE_id%num_active_cba_groups]);
2438

2439
          // detect if there is a CBA collision
2440 2441 2442
          if (eNB->cba_last_reception[UE_id%num_active_cba_groups] == 0 ) {
            mac_xface->rx_sdu(eNB->Mod_id,
                              eNB->CC_id,
2443
                              frame,subframe,
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                              eNB->ulsch[UE_id]->rnti,
                              eNB->ulsch[UE_id]->harq_processes[harq_pid]->b,
                              eNB->ulsch[UE_id]->harq_processes[harq_pid]->TBS>>3,
2447 2448 2449
                              harq_pid,
                              NULL);

2450
            eNB->cba_last_reception[UE_id%num_active_cba_groups]+=1;//(subframe);
2451
          } else {
2452
            if (eNB->cba_last_reception[UE_id%num_active_cba_groups] == 1 )
2453
              LOG_N(PHY,"[eNB%d] Frame %d subframe %d : first CBA collision detected \n ",
2454
                    eNB->Mod_id,frame,subframe);
2455

2456
            LOG_N(PHY,"[eNB%d] Frame %d subframe %d : CBA collision set SR for UE %d in group %d \n ",
2457 2458
                  eNB->Mod_id,frame,subframe,
                  eNB->cba_last_reception[UE_id%num_active_cba_groups],UE_id%num_active_cba_groups );
2459

2460
            eNB->cba_last_reception[UE_id%num_active_cba_groups]+=1;
2461

2462 2463
            mac_xface->SR_indication(eNB->Mod_id,
                                     eNB->CC_id,
2464
                                     frame,
2465
                                     eNB->dlsch[UE_id][0]->rnti,subframe);
2466
          }
2467 2468 2469
        } // UNKNOWN_ACCESS
      } // ULSCH CBA not in error
  }
2470

2471
}
2472

2473 2474


2475
void phy_procedures_eNB_common_RX(PHY_VARS_eNB *eNB,const uint8_t abstraction_flag) {
2476 2477 2478 2479 2480

  int i,l;
  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
  void *rxp[fp->nb_antennas_rx]; 
  unsigned int rxs;
2481
  eNB_proc_t *proc = &eNB->proc;
2482 2483
  int subframe = proc->subframe_rx;
  int frame = proc->frame_rx;
2484
  int symbol_number, symbol_mask, symbol_mask_full, prach_rx, packet_type;
2485

2486 2487 2488
  if (subframe==9) { 
    subframe=0;
    frame++;
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    frame&=1023;
2490 2491
  }
  else subframe++;
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  //  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_COMMON_RX,1);
  start_meas(&eNB->phy_proc_rx);
#ifdef DEBUG_PHY_PROC
2496
  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_RX(%d)\n",eNB->Mod_id,frame, subframe);
2497 2498 2499 2500
#endif

  if (abstraction_flag==0) { // grab signal in chunks of 500 us (1 slot)
    
2501

2502 2503
      if ((eNB->node_function == NGFI_RRU_IF4) || 
	  (eNB->node_function == eNodeB_3GPP)) { // acquisition from RF and front-end processing
2504
	for (i=0; i<fp->nb_antennas_rx; i++)
2505
	  rxp[i] = (void*)&eNB->common_vars.rxdata[0][i][subframe*fp->samples_per_tti];
2506 2507

	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1 );
2508
	rxs = eNB->rfdevice.trx_read_func(&eNB->rfdevice,
2509 2510
				     &proc->timestamp_rx,
				     rxp,
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2511
				     fp->samples_per_tti,
2512 2513 2514
				     fp->nb_antennas_rx);
	proc->frame_rx    = (proc->timestamp_rx / (fp->samples_per_tti*10))&1023;
	proc->subframe_rx = (proc->timestamp_rx / fp->samples_per_tti)%10;
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	if (proc->first_rx == 0) {
	  AssertFatal(proc->subframe_rx == subframe, "Received Timestamp doesn't correspond to the time we think it is (proc->subframe_rx %d, subframe %d)",proc->subframe_rx,subframe);
	  AssertFatal(proc->frame_rx == frame, "Received Timestamp doesn't correspond to the time we think it is (proc->frame_rx %d frame %d)",proc->frame_rx,frame);
	}
2519 2520
	else
	  proc->first_rx = 0;
2521

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2522 2523
	//	printf("timestamp_rx %lu, frame %d(%d), subframe %d(%d)\n",proc->timestamp_rx,proc->frame_rx,frame,proc->subframe_rx,subframe);

2524
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_TS, proc->timestamp_rx&0xffffffff );
2525 2526
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX_ENB, frame );
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_RX_ENB, subframe );
2527

2528

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2529 2530
	if (rxs != fp->samples_per_tti)
	  exit_fun( "problem receiving samples" );
2531
	
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2532 2533
	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 0 );

2534 2535
	// now do common RX processing for first slot in subframe
	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_SLOT_FEP,1);
2536
	remove_7_5_kHz(eNB,subframe<<1);
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2537 2538
	remove_7_5_kHz(eNB,1+(subframe<<1));
	for (l=0; l<fp->symbols_per_tti/2; l++) {
2539 2540 2541 2542 2543 2544 2545 2546 2547 2548
	  slot_fep_ul(fp,
		      &eNB->common_vars,
		      l,
		      subframe<<1,
		      0,
		      0
		      );
	  slot_fep_ul(fp,
		      &eNB->common_vars,
		      l,
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2549
		      1+(subframe<<1),
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		      0,
		      0
		      );
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	}
    	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_SLOT_FEP,0);

2556
	if (eNB->node_function == NGFI_RRU_IF4) {
2557 2558
    /// **** send_IF4 of rxdataF to RCC **** ///
    /// Handle routing to prach thread for sending prach
2559 2560 2561
	}

      }
2562 2563 2564
      else if (eNB->node_function == NGFI_RCC_IF4) {
        /// **** recv_IF4 of rxdataF from RRU **** ///
        /// **** recv_IF4 of prachF from RRU **** ///
2565 2566 2567
	      // get frame/subframe information from IF4 interface
	      // timed loop (200 us)
	
2568 2569 2570 2571 2572 2573
        //symbol_mask = 0;
        //symbol_mask_full = (1<<fp->symbols_per_tti)-1;
        //if (is_prach_subframe(fp,frame,subframe)>0)
          //prach_rx = 0;
        //else
          //prach_rx = 1;
2574
          
2575 2576 2577 2578 2579 2580 2581 2582
        //do {
				  //recv_IF4(eNB, proc, &packet_type, &symbol_number);
				  //if (is_prach_subframe(fp,frame,subframe)>0 && packet_type == PRACH) {
					  //// wake up prach_rx
					  //prach_rx = 1;
					//}
					//if (packet_type == IF4_PULFFT)
					  //symbol_mask = symbol_mask | (1<<symbol_number);
2583
					
2584
				//} while( (symbol_mask != symbol_mask_full) || (prach_rx == 0));    
2585
					 	
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	    // Tobi aka mr monaco: ETH
	
	    
2589 2590 2591 2592 2593 2594 2595
      }
      else { // should not get here
	AssertFatal(1==0, "Unknown eNB->node_function %d",eNB->node_function);
      }
 
  
    // check if we have to detect PRACH first
2596
    if (is_prach_subframe(fp,frame,subframe)>0) {
2597 2598
      // wake up thread for PRACH RX
      if (pthread_mutex_lock(&proc->mutex_prach) != 0) {
2599
	LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB PRACH thread %d (IC %d)\n", proc->instance_cnt_prach );
2600 2601 2602 2603 2604
	exit_fun( "error locking mutex_prach" );
	return;
      }
      
      int cnt_prach = ++proc->instance_cnt_prach;
2605 2606 2607
      // set timing for prach thread
      proc->frame_prach = frame;
      proc->subframe_prach = subframe;
2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618

      pthread_mutex_unlock( &proc->mutex_prach );
      
      if (cnt_prach == 0) {
	// the thread was presumably waiting where it should and can now be woken up
	if (pthread_cond_signal(&proc->cond_prach) != 0) {
	  LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB PRACH thread %d\n", proc->thread_index);
	  exit_fun( "ERROR pthread_cond_signal" );
	  return;
	}
      } else {
2619
	LOG_W( PHY,"[eNB] Frame %d, eNB PRACH thread busy!!\n", frame);
2620 2621 2622 2623 2624 2625 2626
	exit_fun( "PRACH thread busy" );
	return;
      }


    }
    
2627

2628 2629 2630 2631 2632 2633 2634 2635
    
  }

  else {  // grab transport channel information from network interface

  }
}

2636
void phy_procedures_eNB_uespec_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,const uint8_t abstraction_flag,const relaying_type_t r_type)
2637
{
2638
  //RX processing for ue-specific resources (i
2639
  UNUSED(r_type);
2640
  uint32_t ret=0,i,j,k;
2641 2642 2643 2644 2645
  uint32_t harq_pid, harq_idx, round;
  uint8_t nPRS;
  int sync_pos;
  uint16_t rnti=0;
  uint8_t access_mode;
2646
  LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
2647

2648 2649
  const int subframe = proc->subframe_rx;
  const int frame = proc->frame_rx;
2650

2651
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX,1);
2652
  start_meas(&eNB->phy_proc_rx);
2653
#ifdef DEBUG_PHY_PROC
2654
  LOG_D(PHY,"[eNB %d] Frame %d: Doing phy_procedures_eNB_RX(%d)\n",eNB->Mod_id,frame, subframe);
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Lionel Gauthier committed
2655
#endif
2656 2657


2658 2659 2660 2661
  eNB->rb_mask_ul[0]=0;
  eNB->rb_mask_ul[1]=0;
  eNB->rb_mask_ul[2]=0;
  eNB->rb_mask_ul[3]=0;
2662 2663 2664



2665
  // Check for active processes in current subframe
2666
  harq_pid = subframe2harq_pid(fp,
2667 2668 2669 2670
                               frame,subframe);

  // reset the cba flag used for collision detection
  for (i=0; i < NUM_MAX_CBA_GROUP; i++) {
2671
    eNB->cba_last_reception[i]=0;
2672 2673 2674 2675 2676
  }

  // Do PUCCH processing first

  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
2677
    pucch_procedures(eNB,proc,i,harq_pid,abstraction_flag);
2678
  }
2679

2680
  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
2681

2682
    // check for Msg3
2683
    if (eNB->mac_enabled==1) {
2684
      if (eNB->UE_stats[i].mode == RA_RESPONSE) {
2685
	process_Msg3(eNB,proc,i,harq_pid);
2686 2687
      }
    }
2688 2689


2690 2691 2692
    eNB->pusch_stats_rb[i][(frame*10)+subframe] = -63;
    eNB->pusch_stats_round[i][(frame*10)+subframe] = 0;
    eNB->pusch_stats_mcs[i][(frame*10)+subframe] = -63;
2693

2694 2695 2696
    if ((eNB->ulsch[i]) &&
        (eNB->ulsch[i]->rnti>0) &&
        (eNB->ulsch[i]->harq_processes[harq_pid]->subframe_scheduling_flag==1)) {
2697
      // UE is has ULSCH scheduling
2698
      round = eNB->ulsch[i]->harq_processes[harq_pid]->round;
2699
 
2700
      for (int rb=0;
2701
           rb<=eNB->ulsch[i]->harq_processes[harq_pid]->nb_rb;
2702
	   rb++) {
2703
	int rb2 = rb+eNB->ulsch[i]->harq_processes[harq_pid]->first_rb;
2704
	eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31));
2705
      }
2706

2707

2708
      if (eNB->ulsch[i]->Msg3_flag == 1) {
2709
        LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for Msg3 in Sector %d\n",
2710
              eNB->Mod_id,
2711 2712
              frame,
              subframe,
2713
              eNB->UE_stats[i].sector);
2714 2715
	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_MSG3,1);
      } else {
2716

2717
        LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d Mode %s\n",
2718
              eNB->Mod_id,
2719 2720 2721
              frame,
              subframe,
              i,
2722
              mode_string[eNB->UE_stats[i].mode]);
2723
      }
2724 2725


2726
      nPRS = fp->pusch_config_common.ul_ReferenceSignalsPUSCH.nPRS[subframe<<1];
2727

2728
      eNB->ulsch[i]->cyclicShift = (eNB->ulsch[i]->harq_processes[harq_pid]->n_DMRS2 + fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift +
2729
          nPRS)%12;
2730

2731
      if (fp->frame_type == FDD ) {
2732
        int sf = (subframe<4) ? (subframe+6) : (subframe-4);
2733

2734 2735
        if (eNB->dlsch[i][0]->subframe_tx[sf]>0) { // we have downlink transmission
          eNB->ulsch[i]->harq_processes[harq_pid]->O_ACK = 1;
2736
        } else {
2737
          eNB->ulsch[i]->harq_processes[harq_pid]->O_ACK = 0;
2738
        }
2739
      }
2740

2741 2742
      LOG_D(PHY,
            "[eNB %d][PUSCH %d] Frame %d Subframe %d Demodulating PUSCH: dci_alloc %d, rar_alloc %d, round %d, first_rb %d, nb_rb %d, mcs %d, TBS %d, rv %d, cyclic_shift %d (n_DMRS2 %d, cyclicShift_common %d, nprs %d), O_ACK %d \n",
2743
            eNB->Mod_id,harq_pid,frame,subframe,
2744 2745 2746 2747 2748 2749 2750 2751 2752 2753
            eNB->ulsch[i]->harq_processes[harq_pid]->dci_alloc,
            eNB->ulsch[i]->harq_processes[harq_pid]->rar_alloc,
            eNB->ulsch[i]->harq_processes[harq_pid]->round,
            eNB->ulsch[i]->harq_processes[harq_pid]->first_rb,
            eNB->ulsch[i]->harq_processes[harq_pid]->nb_rb,
            eNB->ulsch[i]->harq_processes[harq_pid]->mcs,
            eNB->ulsch[i]->harq_processes[harq_pid]->TBS,
            eNB->ulsch[i]->harq_processes[harq_pid]->rvidx,
            eNB->ulsch[i]->cyclicShift,
            eNB->ulsch[i]->harq_processes[harq_pid]->n_DMRS2,
2754
            fp->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift,
2755
            nPRS,
2756 2757 2758 2759
            eNB->ulsch[i]->harq_processes[harq_pid]->O_ACK);
      eNB->pusch_stats_rb[i][(frame*10)+subframe] = eNB->ulsch[i]->harq_processes[harq_pid]->nb_rb;
      eNB->pusch_stats_round[i][(frame*10)+subframe] = eNB->ulsch[i]->harq_processes[harq_pid]->round;
      eNB->pusch_stats_mcs[i][(frame*10)+subframe] = eNB->ulsch[i]->harq_processes[harq_pid]->mcs;
2760
      start_meas(&eNB->ulsch_demodulation_stats);
2761

2762
      if (abstraction_flag==0) {
2763
        rx_ulsch(eNB,proc,
2764
                 eNB->UE_stats[i].sector,  // this is the effective sector id
2765
                 i,
2766
                 eNB->ulsch,
2767 2768
                 0);
      }
2769

2770 2771
#ifdef PHY_ABSTRACTION
      else {
2772
        rx_ulsch_emul(eNB,proc,
2773
                      subframe,
2774
                      eNB->UE_stats[i].sector,  // this is the effective sector id
2775 2776
                      i);
      }
2777

2778
#endif
2779
      stop_meas(&eNB->ulsch_demodulation_stats);
2780

2781

2782
      start_meas(&eNB->ulsch_decoding_stats);
2783

2784
      if (abstraction_flag == 0) {
2785
        ret = ulsch_decoding(eNB,proc,
2786 2787
                             i,
                             0, // control_only_flag
2788 2789
                             eNB->ulsch[i]->harq_processes[harq_pid]->V_UL_DAI,
			     eNB->ulsch[i]->harq_processes[harq_pid]->nb_rb>20 ? 1 : 0);
2790
      }
2791

2792 2793
#ifdef PHY_ABSTRACTION
      else {
2794
        ret = ulsch_decoding_emul(eNB,proc,
2795 2796 2797
                                  i,
                                  &rnti);
      }
2798

2799
#endif
2800
      stop_meas(&eNB->ulsch_decoding_stats);
2801

2802
      LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
2803
            eNB->Mod_id,harq_pid,
2804
            frame,subframe,
2805 2806 2807 2808 2809 2810 2811 2812 2813
            eNB->ulsch[i]->rnti,
            dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
            dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
            eNB->UE_stats[i].UL_rssi[0],
            eNB->UE_stats[i].UL_rssi[1],
            eNB->measurements->n0_power_dB[0],
            eNB->measurements->n0_power_dB[1],
            eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[0],
            eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[1],
2814
            ret);
2815

2816
      //compute the expected ULSCH RX power (for the stats)
2817
      eNB->ulsch[(uint32_t)i]->harq_processes[harq_pid]->delta_TF =
2818
        get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0); // 0 means bw_factor is not considered
2819

2820
      eNB->UE_stats[i].ulsch_decoding_attempts[harq_pid][eNB->ulsch[i]->harq_processes[harq_pid]->round]++;
2821 2822
#ifdef DEBUG_PHY_PROC
      LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d harq_pid %d Clearing subframe_scheduling_flag\n",
2823
            eNB->Mod_id,harq_pid,frame,subframe,i,harq_pid);
2824
#endif
2825
      eNB->ulsch[i]->harq_processes[harq_pid]->subframe_scheduling_flag=0;
2826

2827
      if (eNB->ulsch[i]->harq_processes[harq_pid]->cqi_crc_status == 1) {
2828
#ifdef DEBUG_PHY_PROC
2829
        //if (((frame%10) == 0) || (frame < 50))
2830
        print_CQI(eNB->ulsch[i]->harq_processes[harq_pid]->o,eNB->ulsch[i]->harq_processes[harq_pid]->uci_format,0,fp->N_RB_DL);
2831
#endif
2832 2833 2834
        extract_CQI(eNB->ulsch[i]->harq_processes[harq_pid]->o,
                    eNB->ulsch[i]->harq_processes[harq_pid]->uci_format,
                    &eNB->UE_stats[i],
2835
                    fp->N_RB_DL,
2836
                    &rnti, &access_mode);
2837
        eNB->UE_stats[i].rank = eNB->ulsch[i]->harq_processes[harq_pid]->o_RI[0];
2838

2839
      }
2840

2841
      if (eNB->ulsch[i]->Msg3_flag == 1)
2842
	VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_ULSCH_MSG3,0);
2843

2844
      if (ret == (1+MAX_TURBO_ITERATIONS)) {
2845

2846 2847 2848 2849
        eNB->UE_stats[i].ulsch_round_errors[harq_pid][eNB->ulsch[i]->harq_processes[harq_pid]->round]++;
        eNB->ulsch[i]->harq_processes[harq_pid]->phich_active = 1;
        eNB->ulsch[i]->harq_processes[harq_pid]->phich_ACK = 0;
        eNB->ulsch[i]->harq_processes[harq_pid]->round++;
2850

2851
        LOG_D(PHY,"[eNB][PUSCH %d] Increasing to round %d\n",harq_pid,eNB->ulsch[i]->harq_processes[harq_pid]->round);
2852

2853
        if (eNB->ulsch[i]->Msg3_flag == 1) {
2854
          LOG_D(PHY,"[eNB %d/%d][RAPROC] frame %d, subframe %d, UE %d: Error receiving ULSCH (Msg3), round %d/%d\n",
2855 2856
                eNB->Mod_id,
                eNB->CC_id,
2857
                frame,subframe, i,
2858
                eNB->ulsch[i]->harq_processes[harq_pid]->round-1,
2859
                fp->maxHARQ_Msg3Tx-1);
2860 2861

	  LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
2862
		eNB->Mod_id,harq_pid,
2863
		frame,subframe,
2864 2865 2866 2867 2868 2869 2870 2871 2872
		eNB->ulsch[i]->rnti,
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
		eNB->UE_stats[i].UL_rssi[0],
		eNB->UE_stats[i].UL_rssi[1],
		eNB->measurements->n0_power_dB[0],
		eNB->measurements->n0_power_dB[1],
		eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[0],
		eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[1],
2873 2874
		ret);

2875
          if (eNB->ulsch[i]->harq_processes[harq_pid]->round ==
2876
              fp->maxHARQ_Msg3Tx) {
2877
            LOG_D(PHY,"[eNB %d][RAPROC] maxHARQ_Msg3Tx reached, abandoning RA procedure for UE %d\n",
2878
                  eNB->Mod_id, i);
2879
            eNB->UE_stats[i].mode = PRACH;
2880 2881 2882
	    if (eNB->mac_enabled==1) {
	      mac_xface->cancel_ra_proc(eNB->Mod_id,
					eNB->CC_id,
2883
					frame,
2884
					eNB->UE_stats[i].crnti);
2885
	    }
2886
            mac_phy_remove_ue(eNB->Mod_id,eNB->UE_stats[i].crnti);
2887

2888 2889
            eNB->ulsch[(uint32_t)i]->Msg3_active = 0;
            //eNB->ulsch[i]->harq_processes[harq_pid]->phich_active = 0;
2890

2891 2892
          } else {
            // activate retransmission for Msg3 (signalled to UE PHY by PHICH (not MAC/DCI)
2893
            eNB->ulsch[(uint32_t)i]->Msg3_active = 1;
2894

2895
            get_Msg3_alloc_ret(fp,
2896
                               subframe,
2897
                               frame,
2898 2899
                               &eNB->ulsch[i]->Msg3_frame,
                               &eNB->ulsch[i]->Msg3_subframe);
2900 2901 2902
          }
          LOG_D(PHY,"[eNB] Frame %d, Subframe %d: Msg3 in error, i = %d \n", frame,subframe,i);
        } // This is Msg3 error
2903

2904 2905
        else { //normal ULSCH
          LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d Error receiving ULSCH, round %d/%d (ACK %d,%d)\n",
2906
                eNB->Mod_id,harq_pid,
2907
                frame,subframe, i,
2908 2909 2910 2911
                eNB->ulsch[i]->harq_processes[harq_pid]->round-1,
                eNB->ulsch[i]->Mlimit,
                eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[0],
                eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[1]);
2912 2913 2914 2915 2916 2917 2918

#if defined(MESSAGE_CHART_GENERATOR_PHY)
          MSC_LOG_RX_DISCARDED_MESSAGE(
            MSC_PHY_ENB,MSC_PHY_UE,
            NULL,0,
            "%05u:%02u ULSCH received rnti %x harq id %u round %d",
            frame,subframe,
2919 2920
            eNB->ulsch[i]->rnti,harq_pid,
            eNB->ulsch[i]->harq_processes[harq_pid]->round-1
2921
            );
2922
#endif
2923

2924
          if (eNB->ulsch[i]->harq_processes[harq_pid]->round== eNB->ulsch[i]->Mlimit) {
2925
            LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d UE %d ULSCH Mlimit %d reached\n",
2926
                  eNB->Mod_id,harq_pid,
2927
                  frame,subframe, i,
2928
                  eNB->ulsch[i]->Mlimit);
2929

2930 2931 2932 2933
            eNB->ulsch[i]->harq_processes[harq_pid]->round=0;
            eNB->ulsch[i]->harq_processes[harq_pid]->phich_active=0;
            eNB->UE_stats[i].ulsch_errors[harq_pid]++;
            eNB->UE_stats[i].ulsch_consecutive_errors++;
2934 2935

	    // indicate error to MAC
2936 2937
	    mac_xface->rx_sdu(eNB->Mod_id,
			      eNB->CC_id,
2938
			      frame,subframe,
2939
			      eNB->ulsch[i]->rnti,
2940 2941 2942
			      NULL,
			      0,
			      harq_pid,
2943
			      &eNB->ulsch[i]->Msg3_flag);
2944 2945 2946 2947
          }
        }
      }  // ulsch in error
      else {
2948
        if (eNB->ulsch[i]->Msg3_flag == 1) {
2949
	  LOG_D(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d ULSCH received, setting round to 0, PHICH ACK\n",
2950
		eNB->Mod_id,harq_pid,
2951 2952
		frame,subframe);
	  LOG_D(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d RNTI %x RX power (%d,%d) RSSI (%d,%d) N0 (%d,%d) dB ACK (%d,%d), decoding iter %d\n",
2953
		eNB->Mod_id,harq_pid,
2954
		frame,subframe,
2955 2956 2957 2958 2959 2960 2961 2962 2963
		eNB->ulsch[i]->rnti,
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
		dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
		eNB->UE_stats[i].UL_rssi[0],
		eNB->UE_stats[i].UL_rssi[1],
		eNB->measurements->n0_power_dB[0],
		eNB->measurements->n0_power_dB[1],
		eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[0],
		eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[1],
2964 2965 2966 2967 2968 2969 2970 2971
		ret);
	}
#if defined(MESSAGE_CHART_GENERATOR_PHY)
        MSC_LOG_RX_MESSAGE(
          MSC_PHY_ENB,MSC_PHY_UE,
          NULL,0,
          "%05u:%02u ULSCH received rnti %x harq id %u",
          frame,subframe,
2972
          eNB->ulsch[i]->rnti,harq_pid
2973
          );
2974
#endif
2975
        for (j=0; j<fp->nb_antennas_rx; j++)
2976
          //this is the RSSI per RB
2977
          eNB->UE_stats[i].UL_rssi[j] =
2978
	    
2979 2980
            dB_fixed(eNB->pusch_vars[i]->ulsch_power[j]*
                     (eNB->ulsch[i]->harq_processes[harq_pid]->nb_rb*12)/
2981
                     fp->ofdm_symbol_size) -
2982 2983
            eNB->rx_total_gain_dB -
            hundred_times_log10_NPRB[eNB->ulsch[i]->harq_processes[harq_pid]->nb_rb-1]/100 -
2984
            get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 0)/100;
2985
	    
2986 2987 2988 2989
        eNB->ulsch[i]->harq_processes[harq_pid]->phich_active = 1;
        eNB->ulsch[i]->harq_processes[harq_pid]->phich_ACK = 1;
        eNB->ulsch[i]->harq_processes[harq_pid]->round = 0;
        eNB->UE_stats[i].ulsch_consecutive_errors = 0;
2990

2991
        if (eNB->ulsch[i]->Msg3_flag == 1) {
2992
	  if (eNB->mac_enabled==1) {
2993

2994
	    LOG_I(PHY,"[eNB %d][RAPROC] Frame %d Terminating ra_proc for harq %d, UE %d\n",
2995
		  eNB->Mod_id,
2996 2997
		  frame,harq_pid,i);
	    
2998 2999
	    mac_xface->rx_sdu(eNB->Mod_id,
			      eNB->CC_id,
3000
			      frame,subframe,
3001 3002 3003
			      eNB->ulsch[i]->rnti,
			      eNB->ulsch[i]->harq_processes[harq_pid]->b,
			      eNB->ulsch[i]->harq_processes[harq_pid]->TBS>>3,
3004
			      harq_pid,
3005
			      &eNB->ulsch[i]->Msg3_flag);
3006 3007
	    
	    // one-shot msg3 detection by MAC: empty PDU (e.g. CRNTI)
3008 3009
	    if (eNB->ulsch[i]->Msg3_flag == 0 ) {
	      eNB->UE_stats[i].mode = PRACH;
3010 3011
	      mac_xface->cancel_ra_proc(eNB->Mod_id,
					eNB->CC_id,
3012
					frame,
3013 3014 3015
					eNB->UE_stats[i].crnti);
	      mac_phy_remove_ue(eNB->Mod_id,eNB->UE_stats[i].crnti);
	      eNB->ulsch[(uint32_t)i]->Msg3_active = 0;
3016 3017 3018
	    } // Msg3_flag == 0
	    
	  } // mac_enabled==1
3019

3020 3021
          eNB->UE_stats[i].mode = PUSCH;
          eNB->ulsch[i]->Msg3_flag = 0;
3022

3023
	  LOG_D(PHY,"[eNB %d][RAPROC] Frame %d : RX Subframe %d Setting UE %d mode to PUSCH\n",eNB->Mod_id,frame,subframe,i);
3024

3025
          for (k=0; k<8; k++) { //harq_processes
3026 3027 3028 3029
            for (j=0; j<eNB->dlsch[i][0]->Mlimit; j++) {
              eNB->UE_stats[i].dlsch_NAK[k][j]=0;
              eNB->UE_stats[i].dlsch_ACK[k][j]=0;
              eNB->UE_stats[i].dlsch_trials[k][j]=0;
3030
            }
3031

3032 3033 3034
            eNB->UE_stats[i].dlsch_l2_errors[k]=0;
            eNB->UE_stats[i].ulsch_errors[k]=0;
            eNB->UE_stats[i].ulsch_consecutive_errors=0;
3035

3036 3037 3038 3039 3040
            for (j=0; j<eNB->ulsch[i]->Mlimit; j++) {
              eNB->UE_stats[i].ulsch_decoding_attempts[k][j]=0;
              eNB->UE_stats[i].ulsch_decoding_attempts_last[k][j]=0;
              eNB->UE_stats[i].ulsch_round_errors[k][j]=0;
              eNB->UE_stats[i].ulsch_round_fer[k][j]=0;
3041
            }
3042 3043
          }

3044 3045 3046
          eNB->UE_stats[i].dlsch_sliding_cnt=0;
          eNB->UE_stats[i].dlsch_NAK_round0=0;
          eNB->UE_stats[i].dlsch_mcs_offset=0;
3047 3048 3049
        } // Msg3_flag==1
	else {  // Msg3_flag == 0

3050
#ifdef DEBUG_PHY_PROC
3051 3052
#ifdef DEBUG_ULSCH
          LOG_D(PHY,"[eNB] Frame %d, Subframe %d : ULSCH SDU (RX harq_pid %d) %d bytes:",frame,subframe,
3053
                harq_pid,eNB->ulsch[i]->harq_processes[harq_pid]->TBS>>3);
3054

3055 3056
          for (j=0; j<eNB->ulsch[i]->harq_processes[harq_pid]->TBS>>3; j++)
            LOG_T(PHY,"%x.",eNB->ulsch[i]->harq_processes[harq_pid]->b[j]);
3057 3058 3059

          LOG_T(PHY,"\n");
#endif
3060
#endif
3061

3062
	  if (eNB->mac_enabled==1) {
3063

3064 3065
	    mac_xface->rx_sdu(eNB->Mod_id,
			      eNB->CC_id,
3066
			      frame,subframe,
3067 3068 3069
			      eNB->ulsch[i]->rnti,
			      eNB->ulsch[i]->harq_processes[harq_pid]->b,
			      eNB->ulsch[i]->harq_processes[harq_pid]->TBS>>3,
3070 3071
			      harq_pid,
			      NULL);
3072

3073
#ifdef LOCALIZATION
3074 3075
	    start_meas(&eNB->localization_stats);
	    aggregate_eNB_UE_localization_stats(eNB,
3076 3077 3078
						i,
						frame,
						subframe,
3079 3080
						get_hundred_times_delta_IF_eNB(eNB,i,harq_pid, 1)/100);
	    stop_meas(&eNB->localization_stats);
3081
#endif
3082 3083 3084
	    
	  } // mac_enabled==1
        } // Msg3_flag == 0
3085

3086 3087
        // estimate timing advance for MAC
        if (abstraction_flag == 0) {
3088
          sync_pos = lte_est_timing_advance_pusch(eNB,i);
3089
          eNB->UE_stats[i].timing_advance_update = sync_pos - fp->nb_prefix_samples/4; //to check
3090
        }
3091

3092 3093
#ifdef DEBUG_PHY_PROC
        LOG_D(PHY,"[eNB %d] frame %d, subframe %d: user %d: timing advance = %d\n",
3094
              eNB->Mod_id,
3095 3096
              frame, subframe,
              i,
3097
              eNB->UE_stats[i].timing_advance_update);
3098
#endif
3099 3100


3101 3102 3103
      }  // ulsch not in error

      // process HARQ feedback
3104
#ifdef DEBUG_PHY_PROC
3105
      LOG_D(PHY,"[eNB %d][PDSCH %x] Frame %d subframe %d, Processing HARQ feedback for UE %d (after PUSCH)\n",eNB->Mod_id,
3106
            eNB->dlsch[i][0]->rnti,
3107 3108
            frame,subframe,
            i);
3109
#endif
3110
      process_HARQ_feedback(i,
3111
                            eNB,proc,
3112 3113 3114 3115 3116 3117 3118
                            1, // pusch_flag
                            0,
                            0,
                            0);

#ifdef DEBUG_PHY_PROC
      LOG_D(PHY,"[eNB %d] Frame %d subframe %d, sect %d: received ULSCH harq_pid %d for UE %d, ret = %d, CQI CRC Status %d, ACK %d,%d, ulsch_errors %d/%d\n",
3119
            eNB->Mod_id,frame,subframe,
3120
            eNB->UE_stats[i].sector,
3121 3122 3123
            harq_pid,
            i,
            ret,
3124 3125 3126 3127 3128
            eNB->ulsch[i]->harq_processes[harq_pid]->cqi_crc_status,
            eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[0],
            eNB->ulsch[i]->harq_processes[harq_pid]->o_ACK[1],
            eNB->UE_stats[i].ulsch_errors[harq_pid],
            eNB->UE_stats[i].ulsch_decoding_attempts[harq_pid][0]);
3129 3130 3131 3132
#endif
      
      // dump stats to VCD
      if (i==0) {
3133 3134 3135
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_MCS0+harq_pid,eNB->pusch_stats_mcs[0][(frame*10)+subframe]);
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_RB0+harq_pid,eNB->pusch_stats_rb[0][(frame*10)+subframe]);
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_ROUND0+harq_pid,eNB->pusch_stats_round[0][(frame*10)+subframe]);
3136
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_RSSI0+harq_pid,dB_fixed(eNB->pusch_vars[0]->ulsch_power[0]));
3137 3138
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_RES0+harq_pid,ret);
	VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_UE0_SFN0+harq_pid,(frame*10)+subframe);
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3139
      }
3140
    } // ulsch[0] && ulsch[0]->rnti>0 && ulsch[0]->subframe_scheduling_flag == 1
3141

3142

3143
    // update ULSCH statistics for tracing
3144
    if ((frame % 100 == 0) && (subframe == 4)) {
3145
      for (harq_idx=0; harq_idx<8; harq_idx++) {
3146 3147 3148 3149 3150 3151 3152 3153
        for (round=0; round<eNB->ulsch[i]->Mlimit; round++) {
          if ((eNB->UE_stats[i].ulsch_decoding_attempts[harq_idx][round] -
               eNB->UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round]) != 0) {
            eNB->UE_stats[i].ulsch_round_fer[harq_idx][round] =
              (100*(eNB->UE_stats[i].ulsch_round_errors[harq_idx][round] -
                    eNB->UE_stats[i].ulsch_round_errors_last[harq_idx][round]))/
              (eNB->UE_stats[i].ulsch_decoding_attempts[harq_idx][round] -
               eNB->UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round]);
3154
          } else {
3155
            eNB->UE_stats[i].ulsch_round_fer[harq_idx][round] = 0;
3156 3157
          }

3158 3159 3160 3161
          eNB->UE_stats[i].ulsch_decoding_attempts_last[harq_idx][round] =
            eNB->UE_stats[i].ulsch_decoding_attempts[harq_idx][round];
          eNB->UE_stats[i].ulsch_round_errors_last[harq_idx][round] =
            eNB->UE_stats[i].ulsch_round_errors[harq_idx][round];
3162
        }
3163 3164
      }
    }
3165

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3166
    if ((frame % 100 == 0) && (subframe==4)) {
3167 3168
      eNB->UE_stats[i].dlsch_bitrate = (eNB->UE_stats[i].total_TBS -
          eNB->UE_stats[i].total_TBS_last);
3169

3170
      eNB->UE_stats[i].total_TBS_last = eNB->UE_stats[i].total_TBS;
3171
    }
3172

3173
    // CBA (non-LTE)
3174
    cba_procedures(eNB,proc,i,harq_pid,abstraction_flag);
3175 3176
  } // loop i=0 ... NUMBER_OF_UE_MAX-1

3177
  if (abstraction_flag == 0) {
3178
    lte_eNB_I0_measurements(eNB,
3179 3180
			    subframe,
			    0,
3181 3182
			    eNB->first_run_I0_measurements);
    eNB->first_run_I0_measurements = 0;
3183
  }
3184

3185
#ifdef PHY_ABSTRACTION
3186
    else {
3187
      lte_eNB_I0_measurements_emul(eNB,
3188
                                   0);
3189
    }
3190

3191
#endif
3192 3193


3194
    //}
3195 3196

#ifdef EMOS
3197
  phy_procedures_emos_eNB_RX(subframe,eNB);
3198 3199
#endif

3200
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_RX,0);
3201
  stop_meas(&eNB->phy_proc_rx);
3202

3203 3204 3205 3206
}

#undef DEBUG_PHY_PROC

3207 3208 3209 3210
#ifdef Rel10
int phy_procedures_RN_eNB_TX(unsigned char last_slot, unsigned char next_slot, relaying_type_t r_type)
{

3211
  int do_proc=0;// do nothing
3212 3213

  switch(r_type) {
3214
  case no_relay:
3215
    do_proc= no_relay; // perform the normal eNB operation
3216
    break;
3217

3218
  case multicast_relay:
3219
    if (((next_slot >>1) < 6) || ((next_slot >>1) > 8))
3220
      do_proc = 0; // do nothing
3221 3222 3223
    else // SF#6, SF#7 and SF#8
      do_proc = multicast_relay; // do PHY procedures eNB TX

3224
    break;
3225

3226 3227
  default: // should'not be here
    LOG_W(PHY,"Not supported relay type %d, do nothing\n", r_type);
3228
    do_proc=0;
3229 3230
    break;
  }
3231

3232 3233
  return do_proc;
}
3234
#endif
3235
/*
3236 3237
void phy_procedures_eNB_lte(unsigned char subframe,PHY_VARS_eNB **eNB,uint8_t abstraction_flag,
                            relaying_type_t r_type, PHY_VARS_RN *rn)
3238
{
3239
#if defined(ENABLE_ITTI)
3240 3241 3242 3243 3244
  MessageDef   *msg_p;
  const char   *msg_name;
  instance_t    instance;
  unsigned int  Mod_id;
  int           result;
3245
#endif
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3246

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3247 3248 3249

  int CC_id=0;

3250

3251
  VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX_ENB, eNB[0]->proc[subframe].frame_tx);
3252
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_LTE,1);
3253
  start_meas(&eNB[0]->phy_proc);
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3254

3255
#if defined(ENABLE_ITTI)
3256

3257
  do {
3258 3259
    // Checks if a message has been sent to PHY sub-task
    itti_poll_msg (TASK_PHY_ENB, &msg_p);
3260

3261 3262 3263 3264
    if (msg_p != NULL) {
      msg_name = ITTI_MSG_NAME (msg_p);
      instance = ITTI_MSG_INSTANCE (msg_p);
      Mod_id = instance;
3265

3266
      switch (ITTI_MSG_ID(msg_p)) {
3267

3268
        // Messages from eNB app
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3269
      case PHY_CONFIGURATION_REQ:
3270
        LOG_I(PHY, "[eNB %d] Received %s\n", instance, msg_name);
3271
        // TODO
3272

3273
        break;
3274

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3275
      default:
3276 3277
        LOG_E(PHY, "[ENB %d] Received unexpected message %s\n", Mod_id, msg_name);
        break;
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3278
      }
3279 3280 3281 3282

      result = itti_free (ITTI_MSG_ORIGIN_ID(msg_p), msg_p);
      AssertFatal (result == EXIT_SUCCESS, "Failed to free memory (%d)!\n", result);
    }
3283
  } while(msg_p != NULL);
3284

3285 3286
#endif

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3287

3288
  for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
3289 3290 3291
    if ((((eNB[CC_id]->frame_parms.frame_type == TDD)&&
          (subframe_select(&eNB[CC_id]->frame_parms,eNB[CC_id]->proc[0].subframe_tx)==SF_DL))||
         (eNB[CC_id]->frame_parms.frame_type == FDD))) {
3292 3293
#ifdef Rel10

3294
      if (phy_procedures_RN_eNB_TX(eNB[CC_id]->proc[0].subframe_rx, eNB[CC_id]->proc[0].subframe_tx, r_type) != 0 )
3295
#endif
3296
        phy_procedures_eNB_TX(subframe,eNB[CC_id],abstraction_flag,r_type,rn);
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3297
    }
3298

3299 3300 3301
    if ((((eNB[CC_id]->frame_parms.frame_type == TDD )&&
          (subframe_select(&eNB[CC_id]->frame_parms,eNB[CC_id]->proc[0].subframe_rx)==SF_UL)) ||
         (eNB[CC_id]->frame_parms.frame_type == FDD))) {
3302
      phy_procedures_eNB_RX(subframe,eNB[CC_id],abstraction_flag,r_type);
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3303
    }
3304

3305
    if (subframe_select(&eNB[CC_id]->frame_parms,eNB[CC_id]->proc[0].subframe_tx)==SF_S) {
3306 3307
#ifdef Rel10

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3308
      if (phy_procedures_RN_eNB_TX(subframe, subframe, r_type) != 0 )
3309
#endif
3310
        phy_procedures_eNB_TX(subframe,eNB[CC_id],abstraction_flag,r_type,rn);
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3311
    }
3312

3313
    if ((subframe_select(&eNB[CC_id]->frame_parms,eNB[CC_id]->proc[0].subframe_rx)==SF_S)) {
3314
      phy_procedures_eNB_S_RX(subframe,eNB[CC_id],abstraction_flag,r_type);
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3315
    }
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3316

3317 3318
    eNB[CC_id]->proc[0].frame_tx++;
    eNB[CC_id]->proc[0].frame_rx++;
3319

3320 3321
    if (eNB[CC_id]->proc[0].frame_tx>=MAX_FRAME_NUMBER) // defined in impl_defs_top.h
      eNB[CC_id]->proc[0].frame_tx-=MAX_FRAME_NUMBER;
3322

3323 3324
    if (eNB[CC_id]->proc[0].frame_rx>=MAX_FRAME_NUMBER)
      eNB[CC_id]->proc[0].frame_rx-=MAX_FRAME_NUMBER;
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3325
  }
3326

3327
  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_LTE,0);
3328
  stop_meas(&eNB[0]->phy_proc);
3329
}
3330
*/