main.c 17.8 KB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560
/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.0  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */

/*! \file main.c
 * \brief top init of Layer 2
 * \author  Navid Nikaein and Raymond Knopp
 * \date 2010 - 2014
 * \version 1.0
 * \email: navid.nikaein@eurecom.fr
 * @ingroup _mac

 */

#ifdef USER_MODE
#include "LAYER2/register.h"
#else
#ifdef KERNEL2_6
//#include <linux/config.h>
#include <linux/slab.h>
#endif

#ifdef KERNEL2_4
#include <linux/malloc.h>
#include <linux/wrapper.h>
#endif


#endif //USER_MODE

#include "defs.h"
#include "proto.h"
#include "extern.h"
#include "assertions.h"
#include "PHY_INTERFACE/extern.h"
#include "PHY_INTERFACE/defs.h"
#include "PHY/defs.h"
#include "SCHED/defs.h"
#include "LAYER2/PDCP_v10.1.0/pdcp.h"
#include "RRC/LITE/defs.h"
#include "UTIL/LOG/log.h"
#include "RRC/L2_INTERFACE/openair_rrc_L2_interface.h"
#ifdef PHY_EMUL
#include "SIMULATION/simulation_defs.h"
#endif //PHY_EMUL

#include "SCHED/defs.h"

void dl_phy_sync_success(module_id_t   module_idP,
                         frame_t       frameP,
                         unsigned char eNB_index,
                         uint8_t            first_sync)   //init as MR
{
  LOG_D(MAC,"[UE %d] Frame %d: PHY Sync to eNB_index %d successful \n", module_idP, frameP, eNB_index);
#if ! defined(ENABLE_USE_MME)

  if (first_sync==1) {
    layer2_init_UE(module_idP);
    openair_rrc_ue_init(module_idP,eNB_index);
  } else
#endif
  {
    rrc_in_sync_ind(module_idP,frameP,eNB_index);
  }

}

void mrbch_phy_sync_failure(module_id_t module_idP, frame_t frameP, uint8_t free_eNB_index) //init as CH
{

  LOG_I(MAC,"[eNB %d] Frame %d: PHY Sync failure \n",module_idP,frameP);
  layer2_init_eNB(module_idP, free_eNB_index);
  openair_rrc_eNB_init(module_idP);
}

char layer2_init_eNB(module_id_t module_idP, unsigned char eNB_index)
{

  return 0;

}

char layer2_init_UE(module_id_t module_idP)
{

  return 0;
}

void mac_UE_out_of_sync_ind(module_id_t module_idP, frame_t frameP, uint16_t eNB_index)
{

  //  Mac_rlc_xface->mac_out_of_sync_ind(Mod_id, frameP, eNB_index);
}


int mac_top_init(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active, uint8_t HO_active)
{

  module_id_t    Mod_id,i,j;
  RA_TEMPLATE *RA_template;
  UE_TEMPLATE *UE_template;
  int size_bytes1,size_bytes2,size_bits1,size_bits2;
  int CC_id;
  int list_el;
  UE_list_t *UE_list;

  LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST);

  if (NB_UE_INST>0) {
    UE_mac_inst = (UE_MAC_INST*)malloc16(NB_UE_INST*sizeof(UE_MAC_INST));

    if (UE_mac_inst == NULL) {
      LOG_C(MAC,"[MAIN] Can't ALLOCATE %d Bytes for %d UE_MAC_INST with size %d \n",NB_UE_INST*sizeof(UE_MAC_INST),NB_UE_INST,sizeof(UE_MAC_INST));
      mac_xface->macphy_exit("[MAC][MAIN] not enough memory for UEs \n");
    }

    LOG_D(MAC,"[MAIN] ALLOCATE %d Bytes for %d UE_MAC_INST @ %p\n",NB_UE_INST*sizeof(UE_MAC_INST),NB_UE_INST,UE_mac_inst);

    bzero(UE_mac_inst,NB_UE_INST*sizeof(UE_MAC_INST));

    for(i=0; i<NB_UE_INST; i++) {
      ue_init_mac(i);
    }
  } else {
    UE_mac_inst = NULL;
  }

  LOG_I(MAC,"[MAIN] Init function start:Nb_eNB_INST=%d\n",NB_eNB_INST);

  if (NB_eNB_INST>0) {
    eNB_mac_inst = (eNB_MAC_INST*)malloc16(NB_eNB_INST*sizeof(eNB_MAC_INST));

    if (eNB_mac_inst == NULL) {
      LOG_D(MAC,"[MAIN] can't ALLOCATE %d Bytes for %d eNB_MAC_INST with size %d \n",NB_eNB_INST*sizeof(eNB_MAC_INST*),NB_eNB_INST,sizeof(eNB_MAC_INST));
      mac_xface->macphy_exit("[MAC][MAIN] not enough memory for eNB \n");
    } else {
      LOG_D(MAC,"[MAIN] ALLOCATE %d Bytes for %d eNB_MAC_INST @ %p\n",sizeof(eNB_MAC_INST),NB_eNB_INST,eNB_mac_inst);
      bzero(eNB_mac_inst,NB_eNB_INST*sizeof(eNB_MAC_INST));
    }
  } else {
    eNB_mac_inst = NULL;
  }

  // Initialize Linked-List for Active UEs
  for(Mod_id=0; Mod_id<NB_eNB_INST; Mod_id++) {
    UE_list = &eNB_mac_inst[Mod_id].UE_list;

    UE_list->num_UEs=0;
    UE_list->head=-1;
    UE_list->head_ul=-1;
    UE_list->avail=0;

    for (list_el=0; list_el<NUMBER_OF_UE_MAX-1; list_el++) {
      UE_list->next[list_el]=list_el+1;
      UE_list->next_ul[list_el]=list_el+1;
    }

    UE_list->next[list_el]=-1;
    UE_list->next_ul[list_el]=-1;

#ifdef PHY_EMUL
    Mac_rlc_xface->Is_cluster_head[Mod_id]=2;//0: MR, 1: CH, 2: not CH neither MR
#endif
    /*#ifdef Rel10
    int n;
    for (n=0;n<4096;n++)
    eNB_mac_inst[Mod_id].MCH_pdu.payload[n] = taus();
    //    Mac_rlc_xface->Node_id[Mod_id]=NODE_ID[Mod_id];
    #endif*/
  }

  //  Mac_rlc_xface->frame=Mac_rlc_xface->frame;


  if (Is_rrc_registered == 1) {
    LOG_I(MAC,"[MAIN] calling RRC\n");
#ifndef CELLULAR //nothing to be done yet for cellular
    openair_rrc_top_init(eMBMS_active, uecap_xer, cba_group_active,HO_active);
#endif
  } else {
    LOG_I(MAC,"[MAIN] Running without an RRC\n");
  }

#ifndef USER_MODE
#ifndef PHY_EMUL
  LOG_I(MAC,"[MAIN] add openair2 proc\n");
  ////  add_openair2_stats();
#endif
#endif

  //init_transport_channels(2);

  // Set up DCIs for TDD 5MHz Config 1..6

  for (i=0; i<NB_eNB_INST; i++)
    for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
      LOG_D(MAC,"[MAIN][eNB %d] CC_id %d initializing RA_template\n",i, CC_id);
      LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", i);

      RA_template = (RA_TEMPLATE *)&eNB_mac_inst[i].common_channels[CC_id].RA_template[0];

      for (j=0; j<NB_RA_PROC_MAX; j++) {
        if (mac_xface->frame_parms->frame_type == TDD) {
          switch (mac_xface->frame_parms->N_RB_DL) {
          case 6:
            size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
            size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
            size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
            size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
            break;

          case 25:
            size_bytes1 = sizeof(DCI1A_5MHz_TDD_1_6_t);
            size_bytes2 = sizeof(DCI1A_5MHz_TDD_1_6_t);
            size_bits1 = sizeof_DCI1A_5MHz_TDD_1_6_t;
            size_bits2 = sizeof_DCI1A_5MHz_TDD_1_6_t;
            break;

          case 50:
            size_bytes1 = sizeof(DCI1A_10MHz_TDD_1_6_t);
            size_bytes2 = sizeof(DCI1A_10MHz_TDD_1_6_t);
            size_bits1 = sizeof_DCI1A_10MHz_TDD_1_6_t;
            size_bits2 = sizeof_DCI1A_10MHz_TDD_1_6_t;
            break;

          case 100:
            size_bytes1 = sizeof(DCI1A_20MHz_TDD_1_6_t);
            size_bytes2 = sizeof(DCI1A_20MHz_TDD_1_6_t);
            size_bits1 = sizeof_DCI1A_20MHz_TDD_1_6_t;
            size_bits2 = sizeof_DCI1A_20MHz_TDD_1_6_t;
            break;

          default:
            size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
            size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
            size_bits1 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
            size_bits2 = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
            break;
          }

        } else {
          switch (mac_xface->frame_parms->N_RB_DL) {
          case 6:
            size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
            size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
            size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
            size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
            break;

          case 25:
            size_bytes1 = sizeof(DCI1A_5MHz_FDD_t);
            size_bytes2 = sizeof(DCI1A_5MHz_FDD_t);
            size_bits1 = sizeof_DCI1A_5MHz_FDD_t;
            size_bits2 = sizeof_DCI1A_5MHz_FDD_t;
            break;

          case 50:
            size_bytes1 = sizeof(DCI1A_10MHz_FDD_t);
            size_bytes2 = sizeof(DCI1A_10MHz_FDD_t);
            size_bits1 = sizeof_DCI1A_10MHz_FDD_t;
            size_bits2 = sizeof_DCI1A_10MHz_FDD_t;
            break;

          case 100:
            size_bytes1 = sizeof(DCI1A_20MHz_FDD_t);
            size_bytes2 = sizeof(DCI1A_20MHz_FDD_t);
            size_bits1 = sizeof_DCI1A_20MHz_FDD_t;
            size_bits2 = sizeof_DCI1A_20MHz_FDD_t;
            break;

          default:
            size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
            size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
            size_bits1 = sizeof_DCI1A_1_5MHz_FDD_t;
            size_bits2 = sizeof_DCI1A_1_5MHz_FDD_t;
            break;
          }
        }

        memcpy((void *)&RA_template[j].RA_alloc_pdu1[0],(void *)&RA_alloc_pdu,size_bytes1);
        memcpy((void *)&RA_template[j].RA_alloc_pdu2[0],(void *)&DLSCH_alloc_pdu1A,size_bytes2);
        RA_template[j].RA_dci_size_bytes1 = size_bytes1;
        RA_template[j].RA_dci_size_bytes2 = size_bytes2;
        RA_template[j].RA_dci_size_bits1  = size_bits1;
        RA_template[j].RA_dci_size_bits2  = size_bits2;

        RA_template[j].RA_dci_fmt1        = format1A;
        RA_template[j].RA_dci_fmt2        = format1A;
      }

      memset (&eNB_mac_inst[i].eNB_stats,0,sizeof(eNB_STATS));
      UE_template = (UE_TEMPLATE *)&eNB_mac_inst[i].UE_list.UE_template[CC_id][0];

      for (j=0; j<NUMBER_OF_UE_MAX; j++) {
        UE_template[j].rnti=0;
        // initiallize the eNB to UE statistics
        memset (&eNB_mac_inst[i].UE_list.eNB_UE_stats[CC_id][j],0,sizeof(eNB_UE_STATS));
      }
    }


  //ICIC init param
#ifdef ICIC
  uint8_t SB_size;
  SB_size=mac_xface->get_SB_size(mac_xface->frame_parms->N_RB_DL);

  srand (time(NULL));

  for(j=0; j<NB_eNB_INST; j++)
    for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
      eNB_mac_inst[j][CC_id].sbmap_conf.first_subframe=0;
      eNB_mac_inst[j][CC_id].sbmap_conf.periodicity=10;
      eNB_mac_inst[j][CC_id].sbmap_conf.sb_size=SB_size;
      eNB_mac_inst[j][CC_id].sbmap_conf.nb_active_sb=1;

      for(i=0; i<NUMBER_OF_SUBBANDS; i++) {
        eNB_mac_inst[j][CC_id].sbmap_conf.sbmap[i]=1;
      }

      eNB_mac_inst[j][CC_id].sbmap_conf.sbmap[rand()%NUMBER_OF_SUBBANDS]=0;

    }

#endif
  //end ALU's algo

  LOG_I(MAC,"[MAIN][INIT] Init function finished\n");

  return(0);

}


int mac_init_global_param(void)
{


  Mac_rlc_xface = NULL;
  LOG_I(MAC,"[MAIN] CALLING RLC_MODULE_INIT...\n");

  if (rlc_module_init()!=0) {
    return(-1);
  }

  LOG_I(MAC,"[MAIN] RLC_MODULE_INIT OK, malloc16 for mac_rlc_xface...\n");

  Mac_rlc_xface = (MAC_RLC_XFACE*)malloc16(sizeof(MAC_RLC_XFACE));
  bzero(Mac_rlc_xface,sizeof(MAC_RLC_XFACE));

  if(Mac_rlc_xface == NULL) {
    LOG_E(MAC,"[MAIN] FATAL EROOR: Could not allocate memory for Mac_rlc_xface !!!\n");
    return (-1);

  }

  LOG_I(MAC,"[MAIN] malloc16 OK, mac_rlc_xface @ %p\n",(void *)Mac_rlc_xface);

  //  mac_xface->macphy_data_ind=macphy_data_ind;
  mac_xface->mrbch_phy_sync_failure=mrbch_phy_sync_failure;
  mac_xface->dl_phy_sync_success=dl_phy_sync_success;
  mac_xface->out_of_sync_ind=rrc_out_of_sync_ind;

  //  Mac_rlc_xface->macphy_exit=  mac_xface->macphy_exit;
  //  Mac_rlc_xface->frame = 0;
  //  Mac_rlc_xface->mac_config_req=mac_config_req;
  //  Mac_rlc_xface->mac_meas_req=mac_meas_req;
  //  Mac_rlc_xface->rrc_rlc_config_req=rrc_rlc_config_req;
  //  Mac_rlc_xface->rrc_rlc_data_req=rrc_rlc_data_req;
  //  Mac_rlc_xface->rrc_rlc_register_rrc=rrc_rlc_register_rrc;

  //  Mac_rlc_xface->rrc_mac_config_req=rrc_mac_config_req;

  //  LOG_I(MAC,"[MAIN] INIT_GLOBAL_PARAM: Mac_rlc_xface=%p,rrc_rlc_register_rrc =%p\n",Mac_rlc_xface,Mac_rlc_xface->rrc_rlc_register_rrc);

  //  Mac_rlc_xface->mac_rlc_data_req=mac_rlc_data_req;
  //  Mac_rlc_xface->mac_rlc_data_ind=mac_rlc_data_ind;
  //  Mac_rlc_xface->mac_rlc_status_ind=mac_rlc_status_ind;
  //  Mac_rlc_xface->pdcp_data_req=pdcp_data_req;
  //  Mac_rlc_xface->mrbch_phy_sync_failure=mrbch_phy_sync_failure;
  //  Mac_rlc_xface->dl_phy_sync_success=dl_phy_sync_success;

  LOG_I(MAC,"[MAIN] RLC interface setup and init\n");
  rrc_init_global_param();

#ifdef USER_MODE
  pdcp_layer_init ();
#else
  pdcp_module_init ();
#endif

  LOG_I(MAC,"[MAIN] Init Global Param Done\n");

  return 0;
}


void mac_top_cleanup(void)
{

#ifndef USER_MODE
  pdcp_module_cleanup ();
#endif

  if (NB_UE_INST>0) {
    free (UE_mac_inst);
  }

  if (NB_eNB_INST>0) {
    free(eNB_mac_inst);
  }

  free( Mac_rlc_xface);
}

int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer,uint8_t cba_group_active, uint8_t HO_active)
{



  LOG_I(MAC,"[MAIN] MAC_INIT_GLOBAL_PARAM IN...\n");
  //    NB_NODE=2;
  //    NB_INST=2;

  Is_rrc_registered=0;
  mac_init_global_param();
  Is_rrc_registered=1;

  mac_xface->macphy_init = mac_top_init;
#ifndef USER_MODE
  mac_xface->macphy_exit = openair_sched_exit;
#else
  mac_xface->macphy_exit=(void (*)(const char*)) exit;
#endif
  LOG_I(MAC,"[MAIN] init eNB MAC functions  \n");
  mac_xface->eNB_dlsch_ulsch_scheduler = eNB_dlsch_ulsch_scheduler;
  mac_xface->get_dci_sdu               = get_dci_sdu;
  mac_xface->fill_rar                  = fill_rar;
  mac_xface->initiate_ra_proc          = initiate_ra_proc;
  mac_xface->cancel_ra_proc            = cancel_ra_proc;
  mac_xface->set_msg3_subframe         = set_msg3_subframe;
  mac_xface->SR_indication             = SR_indication;
  mac_xface->UL_failure_indication     = UL_failure_indication;
  mac_xface->rx_sdu                    = rx_sdu;
  mac_xface->get_dlsch_sdu             = get_dlsch_sdu;
  mac_xface->get_eNB_UE_stats          = get_UE_stats;
  mac_xface->get_transmission_mode     = get_transmission_mode;
  mac_xface->get_rballoc               = get_rballoc;
  mac_xface->get_nb_rb                 = conv_nprb;
  mac_xface->get_prb                   = get_prb;
  //  mac_xface->get_SB_size               = Get_SB_size;
  mac_xface->get_subframe_direction    = get_subframe_direction;
  mac_xface->Msg3_transmitted          = Msg3_tx;
  mac_xface->Msg1_transmitted          = Msg1_tx;
  mac_xface->ra_failed                 = ra_failed;
  mac_xface->ra_succeeded              = ra_succeeded;
  mac_xface->mac_phy_remove_ue         = mac_phy_remove_ue;

  LOG_I(MAC,"[MAIN] init UE MAC functions \n");
  mac_xface->ue_decode_si              = ue_decode_si;
  mac_xface->ue_decode_p               = ue_decode_p;
  mac_xface->ue_send_sdu               = ue_send_sdu;
#ifdef Rel10
  mac_xface->ue_send_mch_sdu           = ue_send_mch_sdu;
  mac_xface->ue_query_mch              = ue_query_mch;
#endif
  mac_xface->ue_get_SR                 = ue_get_SR;
  mac_xface->ue_get_sdu                = ue_get_sdu;
  mac_xface->ue_get_rach               = ue_get_rach;
  mac_xface->ue_process_rar            = ue_process_rar;
  mac_xface->ue_scheduler              = ue_scheduler;
  mac_xface->process_timing_advance    = process_timing_advance;


  LOG_I(MAC,"[MAIN] PHY Frame configuration \n");
  mac_xface->frame_parms = frame_parms;

  mac_xface->get_ue_active_harq_pid = get_ue_active_harq_pid;
  mac_xface->get_PL                 = get_PL;
  mac_xface->get_RSRP               = get_RSRP;
  mac_xface->get_RSRQ               = get_RSRQ;
  mac_xface->get_RSSI               = get_RSSI;
  mac_xface->get_n_adj_cells        = get_n_adj_cells;
  mac_xface->get_rx_total_gain_dB   = get_rx_total_gain_dB;
  mac_xface->get_Po_NOMINAL_PUSCH   = get_Po_NOMINAL_PUSCH;
  mac_xface->get_num_prach_tdd      = get_num_prach_tdd;
  mac_xface->get_fid_prach_tdd      = get_fid_prach_tdd;
  mac_xface->get_deltaP_rampup      = get_deltaP_rampup;
  mac_xface->computeRIV             = computeRIV;
  mac_xface->get_TBS_DL             = get_TBS_DL;
  mac_xface->get_TBS_UL             = get_TBS_UL;
  mac_xface->get_nCCE_max           = get_nCCE_mac;
  mac_xface->get_nCCE_offset        = get_nCCE_offset;
  mac_xface->get_ue_mode            = get_ue_mode;
  mac_xface->phy_config_sib1_eNB    = phy_config_sib1_eNB;
  mac_xface->phy_config_sib1_ue     = phy_config_sib1_ue;

  mac_xface->phy_config_sib2_eNB        = phy_config_sib2_eNB;
  mac_xface->phy_config_sib2_ue         = phy_config_sib2_ue;
  mac_xface->phy_config_afterHO_ue      = phy_config_afterHO_ue;
#ifdef Rel10
  mac_xface->phy_config_sib13_eNB        = phy_config_sib13_eNB;
  mac_xface->phy_config_sib13_ue         = phy_config_sib13_ue;
#endif
#ifdef CBA
  mac_xface->phy_config_cba_rnti         = phy_config_cba_rnti ;
#endif
  mac_xface->estimate_ue_tx_power        = estimate_ue_tx_power;
  mac_xface->phy_config_meas_ue          = phy_config_meas_ue;
  mac_xface->phy_reset_ue    = phy_reset_ue;

  mac_xface->phy_config_dedicated_eNB    = phy_config_dedicated_eNB;
  mac_xface->phy_config_dedicated_ue     = phy_config_dedicated_ue;
  mac_xface->phy_config_harq_ue          = phy_config_harq_ue;

  mac_xface->get_lte_frame_parms        = get_lte_frame_parms;
  mac_xface->get_mu_mimo_mode           = get_mu_mimo_mode;

  mac_xface->get_hundred_times_delta_TF = get_hundred_times_delta_IF_mac;
  mac_xface->get_target_pusch_rx_power     = get_target_pusch_rx_power;
  mac_xface->get_target_pucch_rx_power     = get_target_pucch_rx_power;

  mac_xface->get_prach_prb_offset       = get_prach_prb_offset;
  mac_xface->is_prach_subframe          = is_prach_subframe;

#ifdef Rel10
  mac_xface->get_mch_sdu                 = get_mch_sdu;
  mac_xface->phy_config_dedicated_scell_eNB= phy_config_dedicated_scell_eNB;
  mac_xface->phy_config_dedicated_scell_ue= phy_config_dedicated_scell_ue;

#endif

  mac_xface->get_PHR = get_PHR;
  LOG_D(MAC,"[MAIN] ALL INIT OK\n");

  mac_xface->macphy_init(eMBMS_active,uecap_xer,cba_group_active,HO_active);

  //Mac_rlc_xface->Is_cluster_head[0] = 1;
  //Mac_rlc_xface->Is_cluster_head[1] = 0;


  return(1);
}