Commit 362f584d authored by Raymond Knopp's avatar Raymond Knopp

integration of remaining nFAPI messages

parent f962c2e3
......@@ -56,6 +56,8 @@ typedef struct {
int *nb_CC;
/// Number of MACRLC instances in this node
int nb_macrlc_inst;
/// Number of component carriers per instance in this node
int *nb_mac_CC;
/// Number of L1 instances in this node
int nb_L1_inst;
/// Number of Component Carriers per instance in this node
......
......@@ -623,7 +623,7 @@ static inline void itti_receive_msg_internal_event_fd(task_id_t task_id, uint8_t
read_ret = read (itti_desc.threads[thread_id].task_event_fd, &sem_counter, sizeof(sem_counter));
AssertFatal (read_ret == sizeof(sem_counter), "Read from task message FD (%d) failed (%d/%d)!\n", thread_id, (int) read_ret, (int) sizeof(sem_counter));
printf("sem_counter %d task %d\n", (int)sem_counter, task_id);
if (lfds611_queue_dequeue (itti_desc.tasks[task_id].message_queue, (void **) &message) == 0) {
/* No element in list -> this should not happen */
AssertFatal (0, "No message in queue for task %d while there are %d events and some for the messages queue!\n", task_id, epoll_ret);
......@@ -631,9 +631,13 @@ static inline void itti_receive_msg_internal_event_fd(task_id_t task_id, uint8_t
AssertFatal(message != NULL, "Message from message queue is NULL!\n");
*received_msg = message->msg;
printf("ITTI: message %s\n", ITTI_MSG_NAME(message->msg));
result = itti_free (ITTI_MSG_ORIGIN_ID(*received_msg), message);
AssertFatal (result == EXIT_SUCCESS, "Failed to free memory (%d)!\n", result);
/* Mark that the event has been processed */
itti_desc.threads[thread_id].events[i].events &= ~EPOLLIN;
return;
......
This diff is collapsed.
......@@ -2130,11 +2130,11 @@ uint8_t generate_dci_top(uint8_t num_pdcch_symbols,
if (dci_alloc[i].L == (uint8_t)L) {
#ifdef DEBUG_DCI_ENCODING
//#ifdef DEBUG_DCI_ENCODING
LOG_I(PHY,"Generating DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_dci,dci_alloc[i].firstCCE,dci_alloc[i].dci_length,dci_alloc[i].L,
*(unsigned int*)dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]);
#endif
//#endif
if (dci_alloc[i].firstCCE>=0) {
e_ptr = generate_dci0(dci_alloc[i].dci_pdu,
......
This diff is collapsed.
......@@ -398,14 +398,10 @@ typedef struct {
uint8_t subframe;
/// Frame for reception
uint32_t frame;
/// Subframe cba scheduling indicator (i.e. CBA Transmission opportunity indicator)
uint8_t subframe_cba_scheduling_flag;
/// PHICH active flag
uint8_t phich_active;
/// PHICH ACK
uint8_t phich_ACK;
/// Last TPC command
uint8_t TPC;
/// First Allocated RB
uint16_t first_rb;
/// First Allocated RB - previous scheduling
......@@ -413,7 +409,9 @@ typedef struct {
/// is done after a new scheduling
uint16_t previous_first_rb;
/// Current Number of RBs
uint16_t nb_rb;
uint16_t nb_rb;
/// Current Modulation order
uint8_t Qm;
/// Transport block size
uint32_t TBS;
/// The payload + CRC size in bits
......@@ -468,8 +466,6 @@ typedef struct {
uint8_t srs_active;
/// Index of current HARQ round for this ULSCH
uint8_t round;
/// MCS format for this ULSCH
uint8_t mcs;
/// Redundancy-version of the current sub-frame
uint8_t rvidx;
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
......@@ -513,6 +509,9 @@ typedef enum {
pucch_format1=0,
pucch_format1a,
pucch_format1b,
pucch_format1b_csA2,
pucch_format1b_csA3,
pucch_format1b_csA4,
pucch_format2,
pucch_format2a,
pucch_format2b,
......@@ -547,14 +546,24 @@ typedef struct {
uint16_t rnti;
/// Type (SR,HARQ,CQI,HARQ_SR,HARQ_CQI,SR_CQI,HARQ_SR_CQI)
UCI_type_t type;
/// SRS active flag
uint8_t srs_active;
/// PUCCH format to use
PUCCH_FMT_t pucch_fmt;
/// antenna indicator
/// number of PUCCH antenna ports
uint8_t num_antenna_ports;
/// number of PUCCH resources
uint8_t num_pucch_resources;
/// two antenna n1_pucch
uint16_t n_pucch_1[2];
/// two antenna n2_pucch
/// two antenna n1_pucch 1_0
uint16_t n_pucch_1[4][2];
/// two antenna n1_pucch 1_0 for SR
uint16_t n_pucch_1_0_sr[2];
/// two antenna n2_pucch
uint16_t n_pucch_2[2];
/// two antenna n3_pucch
uint16_t n_pucch_3[2];
/// TDD Bundling/multiplexing flag
uint8_t tdd_bundling;
#ifdef Rel14
/// non BL/CE, CEmodeA, CEmodeB
UE_type_t ue_type;
......@@ -573,7 +582,7 @@ typedef struct {
// Indicates if the resource blocks allocated for this grant overlap with the SRS configuration.
uint8_t Nsrs;
#endif
} LTE_eNB_UCI_t;
} LTE_eNB_UCI;
typedef struct {
/// HARQ process mask, indicates which processes are currently active
......
......@@ -353,10 +353,10 @@ int rx_pdsch(PHY_VARS_UE *ue,
}
#ifdef DEBUG_PHY
//#ifdef DEBUG_PHY
LOG_D(PHY,"[DLSCH] nb_rb %d log2_maxh = %d (%d,%d)\n",nb_rb,pdsch_vars[eNB_id]->log2_maxh,avg[0],avgs);
LOG_D(PHY,"[DLSCH] mimo_mode = %d\n", dlsch0_harq->mimo_mode);
#endif
//#endif
aatx = frame_parms->nb_antenna_ports_eNB;
aarx = frame_parms->nb_antennas_rx;
......@@ -3327,9 +3327,9 @@ void dlsch_scale_channel(int **dl_ch_estimates_ext,
// Determine scaling amplitude based the symbol
ch_amp = ((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
LOG_D(PHY,"Scaling PDSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n",symbol_mod,ch_amp,pilots,nb_rb,frame_parms->Ncp,symbol);
ch_amp = ((pilots) ? (dlsch_ue[0]->sqrt_rho_b) : (dlsch_ue[0]->sqrt_rho_a));
LOG_D(PHY,"Scaling PDSCH Chest in OFDM symbol %d by %d, pilots %d nb_rb %d NCP %d symbol %d\n",symbol_mod,ch_amp,pilots,nb_rb,frame_parms->Ncp,symbol);
// printf("Scaling PDSCH Chest in OFDM symbol %d by %d\n",symbol_mod,ch_amp);
ch_amp128 = _mm_set1_epi16(ch_amp); // Q3.13
......
......@@ -124,7 +124,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
}
#ifdef DEBUG_SCRAMBLING
printf("scrambling: rnti %x, q %d, Ns %d, Nid_cell %d, length %d\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell, G);
printf("scrambling: i0 %d rnti %x, q %d, Ns %d, Nid_cell %d, G %d x2 %x\n",dlsch->i0,dlsch->rnti,q,Ns,frame_parms->Nid_cell, G, x2);
#endif
s = lte_gold_scram(&x1, &x2, 1);
......@@ -206,7 +206,7 @@ void dlsch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
x2 = ((Ns>>1)<<9) + frame_parms->Nid_cell_mbsfn; //this is c_init in 36.211 Sec 6.3.1
#ifdef DEBUG_SCRAMBLING
printf("unscrambling: rnti %x, q %d, Ns %d, Nid_cell %d length %d\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell,G);
printf("unscrambling: rnti %x, q %d, Ns %d, Nid_cell %d G %d, x2 %x\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell,G,x2);
#endif
s = lte_gold_scram(&x1, &x2, 1);
......
......@@ -200,14 +200,14 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type) {
if (packet_type > IF4p5_PRACH)
rxF = &prach_rxsigF_br[packet_type - IF4p5_PRACH - 1][0][0];
else
#else
#endif
rxF = &prach_rxsigF[0][0];
#endif
AssertFatal(rxF!=NULL,"rxF is null\n");
if (eth->flags == ETH_RAW_IF4p5_MODE) {
memcpy((void *)(tx_buffer_prach + MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t),
(void*)rxF,
PRACH_BLOCK_SIZE_BYTES);
memcpy((void *)(tx_buffer_prach + MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t),
(void*)rxF,
PRACH_BLOCK_SIZE_BYTES);
} else {
memcpy((void *)(tx_buffer_prach + sizeof_IF4p5_header_t),
(void *)rxF,
......@@ -335,13 +335,14 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
if (*packet_type > IF4p5_PRACH)
rxF = &prach_rxsigF_br[*packet_type - IF4p5_PRACH - 1][0][0];
else
#else
rxF = &prach_rxsigF[0][0];
#endif
rxF = &prach_rxsigF[0][0];
// FIX: hard coded prach samples length
db_fulllength = PRACH_NUM_SAMPLES;
AssertFatal(rxF!=NULL,"rxF is null\n");
if (eth->flags == ETH_RAW_IF4p5_MODE) {
memcpy(rxF,
(int16_t*) (rx_buffer+MAC_HEADER_SIZE_BYTES+sizeof_IF4p5_header_t),
......
......@@ -1474,8 +1474,9 @@ void rx_phich(PHY_VARS_UE *ue,
//ulsch->harq_processes[8] = ulsch->harq_processes[harq_pid];
ulsch->harq_processes[harq_pid]->status = SCH_IDLE;
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->status = SCH_IDLE;
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 0;
// inform MAC?
ue->ulsch_Msg3_active[eNB_id] = 0;
......@@ -1490,21 +1491,20 @@ void rx_phich(PHY_VARS_UE *ue,
void generate_phich_top(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
int16_t amp,
uint8_t sect_id)
int16_t amp)
{
LTE_DL_FRAME_PARMS *frame_parms=&eNB->frame_parms;
LTE_eNB_ULSCH_t **ulsch = eNB->ulsch;
int32_t **txdataF = eNB->common_vars.txdataF;
uint8_t harq_pid;
uint8_t Ngroup_PHICH,ngroup_PHICH,nseq_PHICH;
uint8_t NSF_PHICH = 4;
uint8_t pusch_subframe;
uint8_t UE_id;
uint8_t i;
uint32_t pusch_frame;
int subframe = proc->subframe_tx;
phich_config_t *phich;
// compute Ngroup_PHICH (see formula at beginning of Section 6.9 in 36-211
......@@ -1520,98 +1520,42 @@ void generate_phich_top(PHY_VARS_eNB *eNB,
pusch_subframe = phich_subframe2_pusch_subframe(frame_parms,subframe);
harq_pid = subframe2harq_pid(frame_parms,pusch_frame,pusch_subframe);
for (UE_id=0; UE_id<NUMBER_OF_UE_MAX; UE_id++) {
if ((ulsch[UE_id])&&(ulsch[UE_id]->rnti>0)) {
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_active == 1) {
for (i=0; i<eNB->phich_vars[subframe&1].num_hi; i++) {
LOG_I(PHY,"[eNB][PUSCH %d/%x] Frame %d subframe %d (pusch_subframe %d,pusch_frame %d) phich active %d\n",
harq_pid,ulsch[UE_id]->rnti,proc->frame_tx,subframe,pusch_subframe,pusch_frame,ulsch[UE_id]->harq_processes[harq_pid]->phich_active);
/* the HARQ process may have been reused by a new scheduling, so we use
* previous values of first_rb and n_DMRS to compute ngroup_PHICH and nseq_PHICH
*/
ngroup_PHICH = (ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb +
ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS)%Ngroup_PHICH;
if ((frame_parms->tdd_config == 0) && (frame_parms->frame_type == TDD) ) {
if ((pusch_subframe == 4) || (pusch_subframe == 9))
ngroup_PHICH += Ngroup_PHICH;
}
nseq_PHICH = ((ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb/Ngroup_PHICH) +
ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS)%(2*NSF_PHICH);
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d dci_alloc %d)\n",
eNB->Mod_id,harq_pid,proc->frame_tx,
subframe,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb,
ulsch[UE_id]->harq_processes[harq_pid]->dci_alloc);
T(T_ENB_PHY_PHICH, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(subframe),
T_INT(UE_id), T_INT(ulsch[UE_id]->rnti), T_INT(harq_pid),
T_INT(Ngroup_PHICH), T_INT(NSF_PHICH),
T_INT(ngroup_PHICH), T_INT(nseq_PHICH),
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK),
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb),
T_INT(ulsch[UE_id]->harq_processes[harq_pid]->previous_n_DMRS));
if (ulsch[UE_id]->Msg3_active == 1) {
LOG_I(PHY,"[eNB %d][PUSCH %d][RAPROC] Frame %d, subframe %d: Generating Msg3 PHICH for UE %d, ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d\n",
eNB->Mod_id,harq_pid,proc->frame_tx,subframe,
UE_id,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
ulsch[UE_id]->harq_processes[harq_pid]->previous_first_rb);
}
if (eNB->abstraction_flag == 0) {
generate_phich(frame_parms,
amp,//amp*2,
nseq_PHICH,
ngroup_PHICH,
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
subframe,
txdataF);
} else {
/*
generate_phich_emul(frame_parms,
//nseq_PHICH,
//ngroup_PHICH,
ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK,
subframe);
*/
}
// if no format0 DCI was transmitted by MAC, prepare the
// MCS parameters for the retransmission
if ((ulsch[UE_id]->harq_processes[harq_pid]->dci_alloc == 0) &&
(ulsch[UE_id]->harq_processes[harq_pid]->rar_alloc == 0) ) {
if (ulsch[UE_id]->harq_processes[harq_pid]->phich_ACK==0 ) {
T(T_ENB_PHY_ULSCH_UE_NO_DCI_RETRANSMISSION, T_INT(eNB->Mod_id), T_INT(proc->frame_tx),
T_INT(subframe), T_INT(UE_id), T_INT(ulsch[UE_id]->rnti), T_INT(harq_pid));
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d, subframe %d : PHICH NACK / (no format0 DCI) Setting subframe_scheduling_flag\n",
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
// ulsch[UE_id]->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
ulsch[UE_id]->harq_processes[harq_pid]->subframe = (subframe + 4)%10;
if (subframe>5) ulsch[UE_id]->harq_processes[harq_pid]->frame++;
ulsch[UE_id]->harq_processes[harq_pid]->rvidx = rv_table[ulsch[UE_id]->harq_processes[harq_pid]->round&3];
ulsch[UE_id]->harq_processes[harq_pid]->O_RI = 0;
ulsch[UE_id]->harq_processes[harq_pid]->Or2 = 0;
ulsch[UE_id]->harq_processes[harq_pid]->Or1 = 0;
ulsch[UE_id]->harq_processes[harq_pid]->uci_format = HLC_subband_cqi_nopmi;
} else {
LOG_I(PHY,"[eNB %d][PUSCH %d] frame %d subframe %d PHICH ACK (no format0 DCI) Clearing subframe_scheduling_flag, setting round to 0\n",
eNB->Mod_id,harq_pid,proc->frame_tx,subframe);
ulsch[UE_id]->harq_processes[harq_pid]->status = SCH_IDLE;
ulsch[UE_id]->harq_processes[harq_pid]->round=0;
}
}
ulsch[UE_id]->harq_processes[harq_pid]->phich_active=0;
} // phich_active==1
} //ulsch_ue[UE_id] is non-null
}// UE loop
phich = &eNB->phich_vars[subframe&1].config[i];
ngroup_PHICH = (phich->first_rb +
phich->n_DMRS)%Ngroup_PHICH;
if ((frame_parms->tdd_config == 0) && (frame_parms->frame_type == TDD) ) {
if ((pusch_subframe == 4) || (pusch_subframe == 9))
ngroup_PHICH += Ngroup_PHICH;
}
nseq_PHICH = ((phich->first_rb/Ngroup_PHICH) +
phich->n_DMRS)%(2*NSF_PHICH);
LOG_I(PHY,"[eNB %d][PUSCH %d] Frame %d subframe %d Generating PHICH, AMP %d ngroup_PHICH %d/%d, nseq_PHICH %d : HI %d, first_rb %d)\n",
eNB->Mod_id,harq_pid,proc->frame_tx,
subframe,amp,ngroup_PHICH,Ngroup_PHICH,nseq_PHICH,
phich->hi,
phich->first_rb);
T(T_ENB_PHY_PHICH, T_INT(eNB->Mod_id), T_INT(proc->frame_tx), T_INT(subframe),
T_INT(i), T_INT(0), T_INT(harq_pid),
T_INT(Ngroup_PHICH), T_INT(NSF_PHICH),
T_INT(ngroup_PHICH), T_INT(nseq_PHICH),
T_INT(phich->hi),
T_INT(phich->first_rb),
T_INT(phich->n_DMRS));
generate_phich(frame_parms,
amp,//amp*2,
nseq_PHICH,
ngroup_PHICH,
phich->hi,
subframe,
txdataF);
}// for (i=0; i<eNB->phich_vars[subframe&1].num_hi; i++) {
eNB->phich_vars[subframe&1].num_hi=0;
}
......@@ -1661,11 +1661,12 @@ int fill_dci_and_dlsch(PHY_VARS_eNB *eNB,
DCI_ALLOC_t *dci_alloc,
nfapi_dl_config_dci_dl_pdu *pdu);
int fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *dci_alloc,nfapi_dl_config_mpdcch_pdu *pdu);
int fill_dci_and_ulsch(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu);
void fill_dci0(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu);
void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe);
int32_t generate_eNB_dlsch_params_from_dci(int frame,
uint8_t subframe,
......@@ -1862,8 +1863,7 @@ uint32_t ulsch_decoding_emul(PHY_VARS_eNB *phy_vars_eNB,
void generate_phich_top(PHY_VARS_eNB *phy_vars_eNB,
eNB_rxtx_proc_t *proc,
int16_t amp,
uint8_t sect_id);
int16_t amp);
/* \brief This routine demodulates the PHICH and updates PUSCH/ULSCH parameters.
@param phy_vars_ue Pointer to UE variables
......
......@@ -1857,25 +1857,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
first_call=0;
}
/*
switch (frame_parms->N_RB_UL) {
case 6:
sigma2_dB -= 8;
break;
case 25:
sigma2_dB -= 14;
break;
case 50:
sigma2_dB -= 17;
break;
case 100:
sigma2_dB -= 20;
break;
default:
sigma2_dB -= 14;
}
*/
if(fmt!=pucch_format3) { /* PUCCH format3 */
......@@ -2241,8 +2223,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
stat_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
stat_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15);
} else { //reference_symbols
stat_ref_re += ((rxcomp[aa][off]*(int32_t)cfo[l<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l<<1)])>>15);
stat_ref_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l<<1)])>>15);
stat_ref_re += ((rxcomp[aa][off]*(int32_t)cfo[l2<<1])>>15) - ((rxcomp[aa][1+off]*(int32_t)cfo[1+(l2<<1)])>>15);
stat_ref_im += ((rxcomp[aa][off]*(int32_t)cfo[1+(l2<<1)])>>15) + ((rxcomp[aa][1+off]*(int32_t)cfo[(l2<<1)])>>15);
}
off+=2;
......@@ -2420,13 +2402,13 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
if (fmt==pucch_format1b)
*(1+payload) = (stat_im<0) ? 1 : 0;
} else { // insufficient energy on PUCCH so NAK
*payload = 0;
*payload = 4; // DTX
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[0] = (int16_t)(stat_re);
((int16_t*)&eNB->pucch1ab_stats[UE_id][(subframe<<10) + (eNB->pucch1ab_stats_cnt[UE_id][subframe])])[1] = (int16_t)(stat_im);
eNB->pucch1ab_stats_cnt[UE_id][subframe] = (eNB->pucch1ab_stats_cnt[UE_id][subframe]+1)&1023;
if (fmt==pucch_format1b)
*(1+payload) = 0;
*(1+payload) = 6;
}
} else {
LOG_E(PHY,"[eNB] PUCCH fmt2/2a/2b not supported\n");
......
......@@ -116,7 +116,7 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
break;
}
ulsch_harq->TPC = (rar[3]>>2)&7;//rar->TPC;
rballoc = (((uint16_t)(rar[1]&7))<<7)|(rar[2]>>1);
if (rballoc>RIV_max) {
......@@ -150,19 +150,19 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
ulsch->rnti = rnti;
ulsch->harq_mask = 1<<harq_pid;
if (ulsch_harq->round == 0) {
// if (ulsch_harq->round == 0) {
ulsch_harq->status = ACTIVE;
ulsch_harq->rvidx = 0;
ulsch_harq->mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
//ulsch_harq->TBS = dlsch_tbs25[ulsch_harq->mcs][ulsch_harq->nb_rb-1];
ulsch_harq->TBS = TBStable[get_I_TBS_UL(ulsch_harq->mcs)][ulsch_harq->nb_rb-1];
uint8_t mcs = ((rar[2]&1)<<3)|(rar[3]>>5);
ulsch_harq->TBS = TBStable[get_I_TBS_UL(mcs)][ulsch_harq->nb_rb-1];
ulsch_harq->Qm = get_Qm_ul(mcs);
ulsch_harq->Msc_initial = 12*ulsch_harq->nb_rb;
ulsch_harq->Nsymb_initial = 9;
ulsch_harq->round = 0;
} else {
/* } else {
ulsch_harq->rvidx = 0;
ulsch_harq->round++;
}
}*/
ulsch->Msg3_active = 1;
......@@ -173,6 +173,7 @@ int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
&ulsch_harq->frame,
&ulsch_harq->subframe);
LOG_I(PHY,"Programming msg3 reception in (%d,%d)\n",ulsch_harq->frame,ulsch_harq->subframe);
use_srs = is_srs_occasion_common(frame_parms,ulsch_harq->frame,ulsch_harq->subframe);
ulsch_harq->Nsymb_pusch = 12-(frame_parms->Ncp<<1)-(use_srs==0?0:1);
ulsch_harq->srs_active = use_srs;
......@@ -264,15 +265,11 @@ int generate_ue_ulsch_params_from_rar(PHY_VARS_UE *ue,
ulsch->harq_processes[harq_pid]->first_rb = RIV2first_rb_LUT[rballoc];
ulsch->harq_processes[harq_pid]->nb_rb = RIV2nb_rb_LUT[rballoc];
if (ulsch->harq_processes[harq_pid]->nb_rb ==0)
return(-1);
AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb >0, "nb_rb == 0\n");
ulsch->power_offset = ue_power_offsets[ulsch->harq_processes[harq_pid]->nb_rb];
if (ulsch->harq_processes[harq_pid]->nb_rb > 4) {
LOG_D(PHY,"rar_tools.c: unlikely rb count for RAR grant : nb_rb > 3\n");
return(-1);
}
AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb > 6,"unlikely rb count for RAR grant : nb_rb > 6\n");
// ulsch->harq_processes[harq_pid]->Ndi = 1;
if (ulsch->harq_processes[harq_pid]->round == 0)
......
......@@ -232,18 +232,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_1_5MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_1_5MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (rb %d)\n",N_RB_DL);
......@@ -318,18 +306,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_5MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (rb %d)\n",N_RB_DL);
......@@ -398,18 +374,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_10MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_10MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_10MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (RB %d)\n",N_RB_DL);
......@@ -478,18 +442,6 @@ void extract_CQI(void *o,UCI_format_t uci_format,LTE_eNB_UE_stats *stats, uint8_
stats->DL_pmi_dual = ((HLC_subband_cqi_rank2_2A_20MHz *)o)->pmi;
break;
case HLC_subband_cqi_mcs_CBA:
if ((*crnti == ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti) && (*crnti !=0)) {
*access_mode=CBA_ACCESS;
LOG_N(PHY,"[eNB] UCI for CBA : mcs %d crnti %x\n",
((HLC_subband_cqi_mcs_CBA_20MHz *)o)->mcs, ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti);
} else {
LOG_D(PHY,"[eNB] UCI for CBA : rnti (enb context %x, rx uci %x) invalid, unknown access\n",
*crnti, ((HLC_subband_cqi_mcs_CBA_20MHz *)o)->crnti);
}
break;
case unknown_cqi:
default:
LOG_N(PHY,"[eNB][UCI] received unknown uci (RB %d)\n",N_RB_DL);
......@@ -750,13 +702,6 @@ void print_CQI(void *o,UCI_format_t uci_format,unsigned char eNB_id,int N_RB_DL)
break;
}
#endif //DEBUG_UCI
break;
case HLC_subband_cqi_mcs_CBA:
#ifdef DEBUG_UCI
LOG_I(PHY,"[PRINT CQI] hlc_cqi_mcs_CBA : eNB %d, mcs %d\n",eNB_id,((HLC_subband_cqi_mcs_CBA_5MHz *)o)->mcs);
LOG_I(PHY,"[PRINT CQI] hlc_cqi_mcs_CBA : eNB %d, rnti %x\n",eNB_id,((HLC_subband_cqi_mcs_CBA_5MHz *)o)->crnti);
#endif //DEBUG_UCI
break;
......
......@@ -224,7 +224,7 @@ int ulsch_decoding_data_2thread0(td_params* tdp) {
int16_t dummy_w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
LTE_UL_eNB_HARQ_t *ulsch_harq = ulsch->harq_processes[harq_pid];
int Q_m = get_Qm_ul(ulsch_harq->mcs);
int Q_m = ulsch_harq->Qm;
int G = ulsch_harq->G;
uint32_t E;
uint32_t Gp,GpmodC,Nl=1;
......@@ -352,7 +352,7 @@ int ulsch_decoding_data_2thread0(td_params* tdp) {
1,
ulsch_harq->rvidx,
(ulsch_harq->round==0)?1:0, // clear
get_Qm_ul(ulsch_harq->mcs),
ulsch_harq->Qm,
1,
r,
&E)==-1) {
......@@ -447,7 +447,7 @@ int ulsch_decoding_data_2thread(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr
int16_t dummy_w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
LTE_UL_eNB_HARQ_t *ulsch_harq = ulsch->harq_processes[harq_pid];
//int Q_m = get_Qm_ul(ulsch_harq->mcs);
int G = ulsch_harq->G;
unsigned int E;
int Cby2;
......@@ -571,7 +571,7 @@ int ulsch_decoding_data_2thread(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr
1,
ulsch_harq->rvidx,
(ulsch_harq->round==0)?1:0, // clear
get_Qm_ul(ulsch_harq->mcs),
ulsch_harq->Qm,
1,
r,
&E)==-1) {
......@@ -655,7 +655,7 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
int16_t dummy_w[MAX_NUM_ULSCH_SEGMENTS][3*(6144+64)];
LTE_eNB_ULSCH_t *ulsch = eNB->ulsch[UE_id];
LTE_UL_eNB_HARQ_t *ulsch_harq = ulsch->harq_processes[harq_pid];
//int Q_m = get_Qm_ul(ulsch_harq->mcs);
int G = ulsch_harq->G;
unsigned int E;
......@@ -736,7 +736,7 @@ int ulsch_decoding_data(PHY_VARS_eNB *eNB,int UE_id,int harq_pid,int llr8_flag)
1,
ulsch_harq->rvidx,
(ulsch_harq->round==0)?1:0, // clear
get_Qm_ul(ulsch_harq->mcs),
ulsch_harq->Qm,
1,
r,
&E)==-1) {
......@@ -907,16 +907,15 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
A = ulsch_harq->TBS;
Q_m = get_Qm_ul(ulsch_harq->mcs);
Q_m = ulsch_harq->Qm;
G = nb_rb * (12 * Q_m) * ulsch_harq->Nsymb_pusch;
#ifdef DEBUG_ULSCH_DECODING
printf("ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
printf("ulsch_decoding (Nid_cell %d, rnti %x, x2 %x): round %d, RV %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
frame_parms->Nid_cell,ulsch->rnti,x2,
ulsch_harq->round,
ulsch_harq->rvidx,
ulsch_harq->mcs,
ulsch_harq->O_RI,
ulsch_harq->O_ACK,
G,
......@@ -952,12 +951,11 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
}
AssertFatal(sumKr>0,
"[eNB %d] ulsch_decoding.c: FATAL sumKr is 0! (Nid_cell %d, rnti %x, x2 %x): harq_pid %d round %d, RV %d, mcs %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
"[eNB %d] ulsch_decoding.c: FATAL sumKr is 0! (Nid_cell %d, rnti %x, x2 %x): harq_pid %d round %d, RV %d, O_RI %d, O_ACK %d, G %d, subframe %d\n",
frame_parms->Nid_cell,ulsch->rnti,x2,
harq_pid,
ulsch_harq->round,
ulsch_harq->rvidx,
ulsch_harq->mcs,
ulsch_harq->O_RI,
ulsch_harq->O_ACK,
G,
......@@ -2015,41 +2013,6 @@ uint32_t ulsch_decoding_emul(PHY_VARS_eNB *eNB, eNB_rxtx_proc_t *proc,
} else
*crnti = 0x0;
// Do abstraction here to determine if packet it in error
/* if (ulsch_abstraction_MIESM(eNB->sinr_dB_eNB,1, eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, eNB->ulsch[UE_id]->harq_processes[harq_pid]->first_rb) == 1)
flag = 1;
else flag = 0;*/
/*
//SINRdbPost = eNB->sinr_dB_eNB;
mcsPost = eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,
nrbPost = eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb;
frbPost = eNB->ulsch[UE_id]->harq_processes[harq_pid]->first_rb;
if(nrbPost > 0)
{
SINRdbPost = eNB->sinr_dB_eNB;
ULflag1 = 1;
}
else
{
SINRdbPost = NULL ;
ULflag1 = 0 ;
}*/
//
// write_output("postprocSINR.m","SINReNB",eNB->sinr_dB,301,1,7);
//Yazdir buraya her frame icin 300 eNb
// fprintf(SINRrx,"%e,%e,%e,%e;\n",SINRdbPost);
//fprintf(SINRrx,"%e\n",SINRdbPost);
// fprintf(csv_fd,"%e+i*(%e),",channelx,channely);
// if (ulsch_abstraction(eNB->sinr_dB,1, eNB->ulsch[UE_id]->harq_processes[harq_pid]->mcs,eNB->ulsch[UE_id]->harq_processes[harq_pid]->nb_rb, eNB->ulsch[UE_id]->harq_processes[harq_pid]->first_rb) == 1) {
if (1) {
LOG_D(PHY,"ulsch_decoding_emul abstraction successful\n");
......
......@@ -180,16 +180,16 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
uint32_t total_dlsch_bitrate = phy_vars_enb->total_dlsch_bitrate;
int coded_bits_per_codeword = 0;
uint8_t harq_pid; // in TDD config 3 it is sf-2, i.e., can be 0,1,2
int mcs = 0;
int Qm = 2;
// choose max MCS to compute coded_bits_per_codeword
if (phy_vars_enb->ulsch[UE_id]!=NULL) {
for (harq_pid=0; harq_pid<3; harq_pid++) {
mcs = cmax(phy_vars_enb->ulsch[UE_id]->harq_processes[harq_pid]->mcs,mcs);
Qm = cmax(phy_vars_enb->ulsch[UE_id]->harq_processes[harq_pid]->Qm,Qm);
}
}
coded_bits_per_codeword = frame_parms->N_RB_UL*12*get_Qm(mcs)*frame_parms->symbols_per_tti;
coded_bits_per_codeword = frame_parms->N_RB_UL*12*Qm*frame_parms->symbols_per_tti;
chest_f_abs = (float*) calloc(nsymb_ce*nb_antennas_rx*nb_antennas_tx,sizeof(float));
llr = (float*) calloc(coded_bits_per_codeword,sizeof(float)); // init to zero
......
......@@ -901,6 +901,14 @@ typedef struct PHY_VARS_eNB_s {
nfapi_rx_indication_pdu_t rx_pdu_list[NFAPI_RX_IND_MAX_PDU];
/// NFAPI RX ULSCH CRC information
nfapi_crc_indication_pdu_t crc_pdu_list[NFAPI_CRC_IND_MAX_PDU];
/// NFAPI HARQ information
nfapi_harq_indication_pdu_t harq_pdu_list[NFAPI_HARQ_IND_MAX_PDU];
/// NFAPI SR information
nfapi_sr_indication_pdu_t sr_pdu_list[NFAPI_SR_IND_MAX_PDU];
/// NFAPI CQI information
nfapi_cqi_indication_pdu_t cqi_pdu_list[NFAPI_CQI_IND_MAX_PDU];
/// NFAPI CQI information (raw component)
nfapi_cqi_indication_raw_pdu_t cqi_raw_pdu_list[NFAPI_CQI_IND_MAX_PDU];
/// NFAPI PRACH information
nfapi_preamble_pdu_t preamble_list[MAX_NUM_RX_PRACH_PREAMBLES];
#ifdef Rel14
......@@ -909,13 +917,14 @@ typedef struct PHY_VARS_eNB_s {
#endif
Sched_Rsp_t Sched_INFO;
LTE_eNB_PDCCH pdcch_vars[2];
LTE_eNB_PHICH phich_vars[2];
#ifdef Rel14
LTE_eNB_EPDCCH epdcch_vars[2];
LTE_eNB_MPDCCH mpdcch_vars[2];
LTE_eNB_PRACH prach_vars_br;
#endif
LTE_eNB_COMMON common_vars;
LTE_eNB_UCI_t uci_vars[NUMBER_OF_UE_MAX];
LTE_eNB_UCI uci_vars[NUMBER_OF_UE_MAX];
LTE_eNB_SRS srs_vars[NUMBER_OF_UE_MAX];
LTE_eNB_PBCH pbch;
LTE_eNB_PUSCH *pusch_vars[NUMBER_OF_UE_MAX];
......
......@@ -350,6 +350,14 @@ typedef struct {
/// SoundingRS-UL-ConfigDedicated Information Element from 36.331 RRC spec
typedef struct {
/// This descriptor is active
uint8_t active;
/// This descriptor's frame
uint16_t frame;
/// This descriptor's subframe
uint8_t subframe;
/// rnti
uint16_t rnti;
/// Parameter: \f$B_\text{SRS}\f$, see TS 36.211 (table 5.5.3.2-1, 5.5.3.2-2, 5.5.3.2-3 and 5.5.3.2-4). \vr{[0..3]} \note the specification sais it is an enumerated value.
uint8_t srs_Bandwidth;
/// Parameter: SRS hopping bandwidth \f$b_\text{hop}\in\{0,1,2,3\}\f$, see TS 36.211 (5.5.3.2) \vr{[0..3]} \note the specification sais it is an enumerated value.
......@@ -831,6 +839,16 @@ typedef struct {
DCI_ALLOC_t dci_alloc[32];
} LTE_eNB_PDCCH;
typedef struct {
uint8_t hi;
uint8_t first_rb;
uint8_t n_DMRS;
} phich_config_t;
typedef struct {
uint8_t num_hi;
phich_config_t config[32];
} LTE_eNB_PHICH;
typedef struct {
uint8_t num_dci;
......
This diff is collapsed.
......@@ -1905,6 +1905,9 @@ void get_pucch_param(PHY_VARS_UE *ue,
case pucch_format1a:
case pucch_format1b:
case pucch_format1b_csA2:
case pucch_format1b_csA3:
case pucch_format1b_csA4:
{
pucch_resource[0] = get_n1_pucch(ue,
proc,
......@@ -3379,16 +3382,16 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
subframe_rx<<1);
stop_meas(&ue->dlsch_unscrambling_stats);
#if 0
LOG_I(PHY," ------ start turbo decoder for AbsSubframe %d.%d / %d ------ \n", frame_rx, subframe_rx, harq_pid);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> nb_rb %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->nb_rb);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> rb_alloc_even %x \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->rb_alloc_even);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Qm %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Qm);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Nl %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Nl);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> G %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->G);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Kmimo %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->Kmimo);
LOG_I(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, subframe_rx, harq_pid, ue->pdcch_vars[subframe_rx & 0x1][eNB_id]->num_pdcch_symbols);
#endif
//#if 0
LOG_D(PHY," ------ start turbo decoder for AbsSubframe %d.%d / %d ------ \n", frame_rx, subframe_rx, harq_pid);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> nb_rb %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->nb_rb);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> rb_alloc_even %x \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->rb_alloc_even[0]);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Qm %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Qm);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Nl %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->Nl);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> G %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->harq_processes[harq_pid]->G);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Kmimo %d \n", frame_rx, subframe_rx, harq_pid, dlsch0->Kmimo);
LOG_D(PHY,"start turbo decode for CW 0 for AbsSubframe %d.%d / %d --> Pdcch Sym %d \n", frame_rx, subframe_rx, harq_pid, ue->pdcch_vars[subframe_rx & 0x1][eNB_id]->num_pdcch_symbols);
//#endif
start_meas(&ue->dlsch_decoding_stats[subframe_rx&0x1]);
ret = dlsch_decoding(ue,
......@@ -3471,13 +3474,13 @@ void ue_dlsch_procedures(PHY_VARS_UE *ue,
if(dlsch0->rnti != 0xffff)
{
LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : DLSCH CW0 in error (rv %d,round %d, mcs %d,TBS %d)\n",
ue->Mod_id,dlsch0->rnti,
harq_pid,frame_rx,subframe_rx,
dlsch0->harq_processes[harq_pid]->rvidx,
dlsch0->harq_processes[harq_pid]->round,
dlsch0->harq_processes[harq_pid]->mcs,
dlsch0->harq_processes[harq_pid]->TBS);
LOG_D(PHY,"[UE %d][PDSCH %x/%d] AbsSubframe %d.%d : DLSCH CW0 in error (rv %d,round %d, mcs %d,TBS %d)\n",
ue->Mod_id,dlsch0->rnti,
harq_pid,frame_rx,subframe_rx,
dlsch0->harq_processes[harq_pid]->rvidx,
dlsch0->harq_processes[harq_pid]->round,
dlsch0->harq_processes[harq_pid]->mcs,
dlsch0->harq_processes[harq_pid]->TBS);
}
......
......@@ -63,6 +63,9 @@ int16_t pucch_power_cntl(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t subframe,u
case pucch_format1a:
case pucch_format1b:
case pucch_format1b_csA2:
case pucch_format1b_csA3:
case pucch_format1b_csA4:
Po_PUCCH += (1+(ue->frame_parms.ul_power_control_config_common.deltaF_PUCCH_Format1b<<1));
break;
......
......@@ -496,9 +496,12 @@ void RCconfig_RU() {
config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_LOCAL_RF,(const char **)&local_rf)
)
) {
local_rf_flag = CONFIG_FALSE;
local_rf_flag = CONFIG_FALSE;
}
else {
if (strcmp(local_rf, "no") == 0)
local_rf_flag = CONFIG_FALSE;
}
if (local_rf_flag == CONFIG_TRUE) { // eNB or RRU
......
......@@ -582,7 +582,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
if (UE_id == -1)
LOG_E(MAC,"%s:%d:%s: ERROR, UE_id == -1\n", __FILE__, __LINE__, __FUNCTION__);
else
config_dedicated(Mod_idP, CC_idP, UE_RNTI(Mod_idP, UE_id), physicalConfigDedicated);
UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated=physicalConfigDedicated;
}
......@@ -658,19 +658,20 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
#endif
AssertFatal(RC.mac[Mod_idP]->if_inst->PHY_config_req != NULL,"if_inst->phy_config_request is null\n");
PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = CC_idP;
phycfg.cfg = &RC.mac[Mod_idP]->config[CC_idP];
if (RC.mac[Mod_idP]->if_inst->PHY_config_req) RC.mac[Mod_idP]->if_inst->PHY_config_req(&phycfg);
if (radioResourceConfigCommon!=NULL) {
AssertFatal(RC.mac[Mod_idP]->if_inst->PHY_config_req != NULL,"if_inst->phy_config_request is null\n");
PHY_Config_t phycfg;
phycfg.Mod_id = Mod_idP;
phycfg.CC_id = CC_idP;
phycfg.cfg = &RC.mac[Mod_idP]->config[CC_idP];
if (RC.mac[Mod_idP]->if_inst->PHY_config_req) RC.mac[Mod_idP]->if_inst->PHY_config_req(&phycfg);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
return(0);
return(0);
}
int
rrc_mac_config_req_ue(
module_id_t Mod_idP,
......
......@@ -755,11 +755,12 @@ typedef struct {
#ifdef Rel14
uint8_t rach_resource_type;
uint16_t mpdcch_repetition_cnt;
struct PhysicalConfigDedicated *physicalConfigDedicated;
uint16_t mpdcch_repetition_cnt;
frame_t Msg2_frame;
sub_frame_t Msg2_subframe;
#endif
sub_frame_t Msg2_subframe;
PhysicalConfigDedicated_t *physicalConfigDedicated;
} UE_TEMPLATE;
......@@ -791,9 +792,13 @@ typedef struct {
uint16_t priority[MAX_NUM_LCID];
// resource scheduling information
uint8_t harq_pid[MAX_NUM_CCs];
uint8_t round[MAX_NUM_CCs];
uint8_t round_UL[8][MAX_NUM_CCs];
/// Current DL harq round per harq_pid on each CC
uint8_t round[MAX_NUM_CCs][10];
/// Current Active TBs per harq_pid on each CC
uint8_t tbcnt[MAX_NUM_CCs][10];
/// Current UL harq round per harq_pid on each CC
uint8_t round_UL[MAX_NUM_CCs][8];
uint8_t dl_pow_off[MAX_NUM_CCs];
uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
......@@ -803,11 +808,34 @@ typedef struct {
int32_t context_active_timer;
int32_t cqi_req_timer;
int32_t ul_inactivity_timer;
int32_t ul_failure_timer;
int32_t ul_failure_timer;
int32_t ul_scheduled;
int32_t ra_pdcch_order_sent;
int32_t ul_out_of_sync;
int32_t phr_received;
uint8_t periodic_ri_received[NFAPI_CC_MAX];
uint8_t aperiodic_ri_received[NFAPI_CC_MAX];
uint8_t pucch1_snr[NFAPI_CC_MAX];
uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX];
uint16_t feedback_cnt[NFAPI_CC_MAX];
uint16_t timing_advance;
uint16_t timing_advance_r9;
uint8_t periodic_wideband_cqi[NFAPI_CC_MAX];
uint8_t periodic_wideband_spatial_diffcqi[NFAPI_CC_MAX];
uint8_t periodic_wideband_pmi[NFAPI_CC_MAX];
uint8_t periodic_subband_cqi[NFAPI_CC_MAX][16];
uint8_t periodic_subband_spatial_diffcqi[NFAPI_CC_MAX][16];
uint8_t aperiodic_subband_cqi0[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_pmi[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_diffcqi0[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_cqi1[NFAPI_CC_MAX][25];
uint8_t aperiodic_subband_diffcqi1[NFAPI_CC_MAX][25];
uint8_t aperiodic_wideband_cqi0[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_pmi[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX];
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
......@@ -867,12 +895,18 @@ typedef struct {
uint8_t msg3_nb_rb;
/// Msg3 MCS
uint8_t msg3_mcs;
/// Msg3 TPC command
uint8_t msg3_TPC;
/// Msg3 ULdelay command
uint8_t msg3_ULdelay;
/// Msg3 cqireq command
uint8_t msg3_cqireq;
/// Round of Msg3 HARQ
uint8_t msg3_round;
/// TBS used for Msg4
int Msg4_TBsize;
int msg4_TBsize;
/// MCS used for Msg4
int Msg4_mcs;
int msg4_mcs;
#ifdef Rel14
uint8_t rach_resource_type;
uint8_t msg2_mpdcch_repetition_cnt;
......@@ -954,6 +988,8 @@ typedef struct {
RA_TEMPLATE RA_template[NB_RA_PROC_MAX];
/// VRB map for common channels
uint8_t vrb_map[100];
/// VRB map for common channels and retransmissions by PHICH
uint8_t vrb_map_UL[100];
/// MBSFN SubframeConfig
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[8];
/// number of subframe allocation pattern available for MBSFN sync area
......@@ -1006,7 +1042,7 @@ typedef struct eNB_MAC_INST_s {
/// Common cell resources
COMMON_channels_t common_channels[MAX_NUM_CCs];
/// current PDU index (BCH,MCH,DLSCH)
int pdu_index[MAX_NUM_CCs];
uint16_t pdu_index[MAX_NUM_CCs];
/// NFAPI Config Request Structure
nfapi_config_request_t config[MAX_NUM_CCs];
......@@ -1016,9 +1052,12 @@ typedef struct eNB_MAC_INST_s {
nfapi_dl_config_request_t DL_req[MAX_NUM_CCs];
/// Preallocated UL pdu list
nfapi_ul_config_request_pdu_t ul_config_pdu_list[MAX_NUM_CCs][MAX_NUM_UL_PDU];
nfapi_ul_config_request_pdu_t ul_config_pdu_list_msg3[MAX_NUM_CCs];
/// NFAPI UL Config Request Structure
/// Preallocated UL pdu list for ULSCH (n+k delay)
nfapi_ul_config_request_pdu_t ul_config_pdu_list_tmp[MAX_NUM_CCs][10][MAX_NUM_UL_PDU];
/// NFAPI UL Config Request Structure, send to L1 4 subframes before processing takes place
nfapi_ul_config_request_t UL_req[MAX_NUM_CCs];
/// NFAPI "Temporary" UL Config Request Structure, holds future UL_config requests
nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10];
/// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure
......
This diff is collapsed.
This diff is collapsed.
......@@ -240,7 +240,7 @@ schedule_SIB1_BR(
// Rel13 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = 1; // CEModeA UE
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 0; // SIB1-BR
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SF
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SFx
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.bf_vector = ;
dl_req->number_pdu++;
......@@ -401,8 +401,8 @@ schedule_SI_BR(
vrb_map[first_rb+5] = 1;
if ((frameP&1023) < 200) LOG_D(MAC,"[eNB %d] Frame %d Subframe %d: SI_BR->DLSCH CC_id %d, Narrowband %d rvidx %d (sf_mod_period %d : si_WindowLength_BR_r13 %d : si_RepetitionPattern_r13 %d) bcch_sdu_length %d\n",
module_idP,frameP,subframeP,CC_id,si_Narrowband_r13-1,rvidx,
sf_mod_period,si_WindowLength_BR_r13,si_RepetitionPattern_r13,
module_idP,frameP,subframeP,CC_id,(int)si_Narrowband_r13-1,rvidx,
sf_mod_period,(int)si_WindowLength_BR_r13,(int)si_RepetitionPattern_r13,
bcch_sdu_length);
......@@ -524,7 +524,7 @@ void schedule_mib(module_id_t module_idP,
LOG_D(MAC,"Frame %d, subframe %d: Adding BCH PDU in position %d (length %d)\n",
frameP,subframeP,dl_req->number_pdu,mib_sdu_length);
if ((frameP&1023) < 40) LOG_D(MAC,"[eNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes (cc->mib->message.schedulingInfoSIB1_BR_r13 %d)\n",module_idP,frameP,CC_id,mib_sdu_length,cc->mib->message.schedulingInfoSIB1_BR_r13);
if ((frameP&1023) < 40) LOG_D(MAC,"[eNB %d] Frame %d : MIB->BCH CC_id %d, Received %d bytes (cc->mib->message.schedulingInfoSIB1_BR_r13 %d)\n",module_idP,frameP,CC_id,mib_sdu_length,(int)cc->mib->message.schedulingInfoSIB1_BR_r13);
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
......@@ -671,7 +671,14 @@ schedule_SI(
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.redundancy_version_1 = 0;
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = getRIV(N_RB_DL,first_rb,4);
// Rel10 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel10.pdsch_start = 3;
// Rel13 fields
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.ue_type = 0; // regular UE
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.pdsch_payload_type = 2; // not BR
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel13.initial_transmission_sf_io = 0xFFFF; // absolute SF
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,SI_RNTI)) {
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for S_RNTI\n",
frameP,subframeP);
......
......@@ -609,8 +609,12 @@ schedule_ue_spec(
}
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
round = ue_sched_ctl->round[CC_id][harq_pid];
UE_list->eNB_UE_stats[CC_id][UE_id].crnti= rnti;
UE_list->eNB_UE_stats[CC_id][UE_id].rrc_status=mac_eNB_get_rrc_status(module_idP,rnti);
UE_list->eNB_UE_stats[CC_id][UE_id].harq_pid = harq_pid;
......@@ -645,8 +649,10 @@ schedule_ue_spec(
/* process retransmission */
if (round > 0) {
// get freq_allocation
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
TBS = get_TBS_DL(UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid],nb_rb);
if (nb_rb <= nb_available_rb) {
if (cc[CC_id].tdd_Config != NULL) {
......@@ -729,9 +735,38 @@ schedule_ue_spec(
dl_req->number_dci++;
dl_req->number_pdu++;
fill_nfapi_dlsch_config(eNB,dl_req,
TBS,
eNB->pdu_index[CC_id],
rnti,
0, // type 0 allocation from 7.1.6 in 36.213
0, // virtual_resource_block_assignment_flag, unused here
0, // resource_block_coding, to be filled in later
getQm(UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid]),
round&3 , // redundancy version
1, // transport blocks
0, // transport block to codeword swap flag
cc[CC_id].p_eNB == 1 ? 0 : 1, // transmission_scheme
1, // number of layers
1, // number of subbands
// uint8_t codebook_index,
4, // UE category capacity
UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated->p_a,
0, // delta_power_offset for TM5
0, // ngap
0, // nprb
cc[CC_id].p_eNB == 1 ? 1 : 2, // transmission mode
0, //number of PRBs treated as one subband, not used here
0 // number of beamforming vectors, not used here
);
eNB->pdu_index[CC_id]++;
program_dlsch_acknak(module_idP,CC_id,UE_id,frameP,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
// No TX request for retransmission (check if null request for FAPI)
}
else {
// No TX request for retransmission (check if null request for FAPI)
LOG_W(MAC,"Frame %d, Subframe %d: Dropping DLSCH allocation for UE %d\%x, infeasible CCE allocation\n",
frameP,subframeP,UE_id,rnti);
}
}
......@@ -789,7 +824,7 @@ schedule_ue_spec(
ENB_FLAG_YES,
MBMS_FLAG_NO,
DCCH,
TBS, //not used
TBS, //not used
(char *)&dlsch_buffer[0]);
T(T_ENB_MAC_UE_DL_SDU, T_INT(module_idP), T_INT(CC_id), T_INT(rnti), T_INT(frameP), T_INT(subframeP),
......@@ -993,15 +1028,7 @@ schedule_ue_spec(
j = j+1;
}
}
/*
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
for(j=0; j<N_RBG[CC_id]; j++) {
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
}
*/
// decrease mcs until TBS falls below required length
while ((TBS > (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && (mcs>0)) {
mcs--;
......@@ -1120,7 +1147,7 @@ schedule_ue_spec(
// this is the normalized RX power
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
normalized_rx_power = eNB_UE_stats->Po_PUCCH_dBm;
target_rx_power = get_target_pucch_rx_power(module_idP,CC_id) + 20;
target_rx_power = cc[CC_id].radioResourceConfigCommon->uplinkPowerControlCommon.p0_NominalPUCCH + 20;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
......@@ -1184,27 +1211,59 @@ schedule_ue_spec(
module_idP,CC_id,harq_pid,round,mcs);
}
dl_req->number_dci++;
dl_req->number_pdu++;
// Toggle NDI for next time
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
CC_id, frameP,subframeP,UE_id,
UE_list->UE_template[CC_id][UE_id].rnti,harq_pid,UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]);
UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]=1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
eNB->TX_req[CC_id].sfn_sf = (frameP<<3)+subframeP;
TX_req = &eNB->TX_req[CC_id].tx_request_body.tx_pdu_list[eNB->TX_req[CC_id].tx_request_body.number_of_pdus];
TX_req->pdu_length = TBS;
TX_req->pdu_index = eNB->pdu_index[CC_id]++;
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = TBS;
TX_req->segments[0].segment_data = eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[harq_pid];
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
if (!CCE_allocation_infeasible(module_idP,CC_id,1,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level,rnti)) {
dl_req->number_dci++;
dl_req->number_pdu++;
// Toggle NDI for next time
LOG_D(MAC,"CC_id %d Frame %d, subframeP %d: Toggling Format1 NDI for UE %d (rnti %x/%d) oldNDI %d\n",
CC_id, frameP,subframeP,UE_id,
rnti,harq_pid,UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]);
UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid]=1-UE_list->UE_template[CC_id][UE_id].oldNDI[harq_pid];
UE_list->UE_template[CC_id][UE_id].oldmcs1[harq_pid] = mcs;
UE_list->UE_template[CC_id][UE_id].oldmcs2[harq_pid] = 0;
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated!=NULL,"physicalConfigDedicated is NULL\n");
AssertFatal(UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated!=NULL,"physicalConfigDedicated->pdsch_ConfigDedicated is NULL\n");
fill_nfapi_dlsch_config(eNB,dl_req,
TBS,
eNB->pdu_index[CC_id],
rnti,
0, // type 0 allocation from 7.1.6 in 36.213
0, // virtual_resource_block_assignment_flag, unused here
0, // resource_block_coding, to be filled in later
getQm(mcs),
0, // redundancy version
1, // transport blocks
0, // transport block to codeword swap flag
cc[CC_id].p_eNB == 1 ? 0 : 1, // transmission_scheme
1, // number of layers
1, // number of subbands
// uint8_t codebook_index,
4, // UE category capacity
UE_list->UE_template[CC_id][UE_id].physicalConfigDedicated->pdsch_ConfigDedicated->p_a,
0, // delta_power_offset for TM5
0, // ngap
0, // nprb
cc[CC_id].p_eNB == 1 ? 1 : 2, // transmission mode
0, //number of PRBs treated as one subband, not used here
0 // number of beamforming vectors, not used here
);
eNB->TX_req[CC_id].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_id].tx_request_body,
(frameP*10)+subframeP,
TBS,
&eNB->pdu_index[CC_id],
eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[harq_pid]);
eNB->pdu_index[CC_id]++;
program_dlsch_acknak(module_idP,CC_id,UE_id,frameP,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
}
else {
LOG_W(MAC,"Frame %d, Subframe %d: Dropping DLSCH allocation for UE %d/%x, infeasible CCE allocations\n",
frameP,subframeP,UE_id,rnti);
}
} else { // There is no data from RLC or MAC header, so don't schedule
}
......@@ -1277,7 +1336,8 @@ fill_DLSCH_dci(
// clear scheduling flag
eNB_dlsch_info[module_idP][CC_id][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP,UE_id);
harq_pid = UE_list->UE_sched_ctrl[UE_id].harq_pid[CC_id];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
......@@ -1297,7 +1357,11 @@ fill_DLSCH_dci(
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) {
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.resource_allocation_type = 0;
break;
}
else if ((dl_config_pdu->pdu_type == NFAPI_DL_CONFIG_DLSCH_PDU_TYPE)&&
(dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti == rnti)) {
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_block_coding = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.resource_allocation_type = 0;
}
}
}
......
This diff is collapsed.
......@@ -175,11 +175,20 @@ int mac_top_init_eNB()
for (j=0;j<MAX_NUM_CCs;j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.dl_config_pdu_list = RC.mac[i]->dl_config_pdu_list[j];
RC.mac[i]->UL_req[j].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list[j];
for (int k=0;k<10;k++) RC.mac[i]->UL_req_tmp[j][k].ul_config_request_body.ul_config_pdu_list = RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].hi_dci0_request_body.hi_dci0_pdu_list = RC.mac[i]->hi_dci0_pdu_list[j];
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list = RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
}
}
AssertFatal(rlc_module_init()==0,"Could not initialize RLC layer\n");
// These should be out of here later
pdcp_layer_init ();
rrc_init_global_param();
} else {
RC.mac = NULL;
}
......
......@@ -263,13 +263,19 @@ int maxround(module_id_t Mod_id,uint16_t rnti,int frame,sub_frame_t subframe,uin
{
uint8_t round,round_max=0,UE_id;
int CC_id;
int CC_id,harq_pid;
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
COMMON_channels_t *cc;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
cc = &RC.mac[Mod_id]->common_channels[CC_id];
UE_id = find_UE_id(Mod_id,rnti);
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id];
if (cc->tdd_Config) harq_pid = ((frame*10)+subframe)%10;
else harq_pid = ((frame*10)+subframe)&7;
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id][harq_pid];
if (round > round_max) {
round_max = round;
}
......@@ -507,9 +513,10 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
int transmission_mode = 0;
UE_sched_ctrl *ue_sched_ctl;
// int rrc_status = RRC_IDLE;
COMMON_channels_t *cc;
#ifdef TM5
int harq_pid1=0,harq_pid2=0;
int harq_pid1=0;
int round1=0,round2=0;
int UE_id2;
uint16_t i1,i2,i3;
......@@ -581,12 +588,10 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
// if there is no available harq_process, skip the UE
if (UE_list->UE_sched_ctrl[UE_id].harq_pid[CC_id]<0)
continue;
cc=&RC.mac[Mod_id]->common_channels[ii];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
else harq_pid = ((frameP*10)+subframeP)&7;
round = ue_sched_ctl->round[CC_id][harq_pid];
average_rbs_per_user[CC_id]=0;
......@@ -681,8 +686,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for (ii=0; ii<UE_num_active_CC(UE_list,UE_id); ii++) {
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
harq_pid = ue_sched_ctl->harq_pid[CC_id];
round = ue_sched_ctl->round[CC_id];
round = ue_sched_ctl->round[CC_id][harq_pid];
rnti = UE_RNTI(Mod_id,UE_id);
......@@ -731,7 +735,6 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
UE_id2 = ii;
rnti2 = UE_RNTI(Mod_id,UE_id2);
ue_sched_ctl2 = &UE_list->UE_sched_ctrl[UE_id2];
harq_pid2 = ue_sched_ctl2->harq_pid[CC_id];
round2 = ue_sched_ctl2->round[CC_id];
if(rnti2 == NOT_A_RNTI)
continue;
......@@ -887,7 +890,7 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
#endif
LOG_I(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
LOG_D(MAC,"Running preprocessor for UE %d (%x)\n",UE_id,rnti);
// initialize harq_pid and round
/*
......@@ -1078,11 +1081,11 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_TEMPLATE *UE_template = 0;
int N_RB_DL;
int N_RB_UL;
//LOG_I(MAC,"assign max mcs min rb\n");
LOG_D(MAC,"In ulsch_preprocessor: assign max mcs min rb\n");
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
assign_max_mcs_min_rb(module_idP,frameP, subframeP, first_rb);
//LOG_I(MAC,"sort ue \n");
LOG_D(MAC,"In ulsch_preprocessor: sort ue \n");
// sort ues
sort_ue_ul (module_idP,frameP, subframeP);
......@@ -1101,7 +1104,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
}
//LOG_I(MAC,"step2 \n");
LOG_D(MAC,"In ulsch_preprocessor: step2 \n");
// step 2: calculate the average rb per UE
total_ue_count =0;
max_num_ue_to_be_scheduled=0;
......@@ -1119,9 +1122,11 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_id = i;
LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x\n",UE_id,rnti);
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
// This is the actual CC_id in the list
CC_id = UE_list->ordered_ULCCids[n][UE_id];
LOG_D(MAC,"In ulsch_preprocessor: handling UE %d/%x CCid %d\n",UE_id,rnti,CC_id);
UE_template = &UE_list->UE_template[CC_id][UE_id];
average_rbs_per_user[CC_id]=0;
......@@ -1174,6 +1179,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
CC_id = UE_list->ordered_ULCCids[n][UE_id];
harq_pid = subframe2harqpid(&RC.mac[module_idP]->common_channels[CC_id],frameP,subframeP);
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
if(UE_list->UE_sched_ctrl[UE_id].round_UL[CC_id]>0) {
......@@ -1183,7 +1189,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
}
total_allocated_rbs[CC_id]+= nb_allocated_rbs[CC_id][UE_id];
LOG_D(MAC,"In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",nb_allocated_rbs[CC_id][UE_id],UE_id,rnti,CC_id,harq_pid);
}
}
......
......@@ -29,6 +29,8 @@
#ifndef __LAYER2_MAC_PROTO_H__
#define __LAYER2_MAC_PROTO_H__
#include "LAYER2/MAC/defs.h"
/** \addtogroup _mac
* @{
*/
......@@ -287,11 +289,14 @@ void rx_sdu(const module_id_t enb_mod_idP,
/* \brief Function to indicate a scheduled schduling request (SR) was received by eNB.
@param Mod_id Instance ID of eNB
@param Mod_idP Instance ID of eNB
@param CC_idP CC_id of received SR
@param frameP of received SR
@param subframeP Index of subframe where SR was received
@param rnti RNTI of UE transmitting the SR
@param subframe Index of subframe where SR was received
@param ul_cqi SNR measurement of PUCCH (SNR quantized to 8 bits, -64 ... 63.5 dB in .5dB steps)
*/
void SR_indication(module_id_t module_idP,int CC_id,frame_t frameP,rnti_t rnti, sub_frame_t subframe);
void SR_indication(module_id_t module_idP,int CC_id,frame_t frameP,sub_frame_t subframe,rnti_t rnti,uint8_t ul_cqi);
/* \brief Function to indicate a UL failure was detected by eNB PHY.
@param Mod_id Instance ID of eNB
......@@ -314,10 +319,7 @@ uint8_t *get_dlsch_sdu(module_id_t module_idP,int CC_id,frame_t frameP,rnti_t rn
MCH_PDU *get_mch_sdu( module_id_t Mod_id, int CC_id, frame_t frame, sub_frame_t subframe);
//added for ALU icic purpose
uint32_t Get_Cell_SBMap(module_id_t module_idP);
void UpdateSBnumber(module_id_t module_idP);
//end ALU's algo
void ue_mac_reset (module_id_t module_idP,uint8_t eNB_index);
......@@ -326,6 +328,7 @@ void init_ue_sched_info(void);
void add_ue_ulsch_info (module_id_t module_idP, int CC_id, int UE_id, sub_frame_t subframe,UE_ULSCH_STATUS status);
void add_ue_dlsch_info (module_id_t module_idP, int CC_id,int UE_id, sub_frame_t subframe,UE_DLSCH_STATUS status);
int find_UE_id (module_id_t module_idP, rnti_t rnti) ;
int find_RA_id (module_id_t mod_idP, int CC_idP, rnti_t rntiP);
rnti_t UE_RNTI (module_id_t module_idP, int UE_id);
int UE_PCCID (module_id_t module_idP, int UE_id);
uint8_t find_active_UEs (module_id_t module_idP);
......@@ -896,11 +899,92 @@ int to_prb(int dl_Bandwidth);
uint8_t get_Msg3harqpid(COMMON_channels_t *cc,
frame_t frame,
sub_frame_t current_subframe);
uint32_t pdcchalloc2ulframe(COMMON_channels_t *ccP,uint32_t frame, uint8_t n);
uint8_t pdcchalloc2ulsubframe(COMMON_channels_t *ccP,uint8_t n);
int is_UL_sf(COMMON_channels_t *ccP,sub_frame_t subframeP);
uint8_t subframe2harqpid(COMMON_channels_t *cc,frame_t frame,sub_frame_t subframe);
uint8_t getQm(uint8_t mcs);
uint8_t subframe2harqpid(COMMON_channels_t *cc,frame_t frame,sub_frame_t subframe);
void get_srs_pos(COMMON_channels_t *cc,uint16_t isrs,uint16_t *psrsPeriodicity,uint16_t *psrsOffset);
void get_csi_params(COMMON_channels_t *cc,struct CQI_ReportPeriodic *cqi_PMI_ConfigIndex,uint16_t *Npd,uint16_t *N_OFFSET_CQI,int *H);
uint8_t get_rel8_dl_cqi_pmi_size(UE_sched_ctrl *sched_ctl,int CC_idP,COMMON_channels_t *cc,uint8_t tmode, struct CQI_ReportPeriodic *cqi_ReportPeriodic);
uint8_t get_dl_cqi_pmi_size_pusch(UE_sched_ctrl *sched_ctl,COMMON_channels_t *cc,uint8_t tmode, uint8_t ri, CQI_ReportModeAperiodic_t *cqi_ReportModeAperiodic);
void extract_pucch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP, uint8_t *pdu, uint8_t length);
void extract_pusch_csi(module_id_t mod_idP,int CC_idP,int UE_id, frame_t frameP,sub_frame_t subframeP,uint8_t *pdu, uint8_t length);
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,uint16_t absSF,uint16_t pdu_length, uint16_t *pdu_index, uint8_t *pdu );
void program_dlsch_acknak(module_id_t module_idP, int CC_idP,int UE_idP, frame_t frameP, sub_frame_t subframeP,uint8_t cce_idx);
void fill_nfapi_dlsch_config(eNB_MAC_INST *eNB, nfapi_dl_config_request_body_t *dl_req,
uint16_t length,
uint16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint8_t virtual_resource_block_assignment_flag,
uint16_t resource_block_coding,
uint8_t modulation,
uint8_t redundancy_version,
uint8_t transport_blocks,
uint8_t transport_block_to_codeword_swap_flag,
uint8_t transmission_scheme,
uint8_t number_of_layers,
uint8_t number_of_subbands,
// uint8_t codebook_index,
uint8_t ue_category_capacity,
uint8_t pa,
uint8_t delta_power_offset_index,
uint8_t ngap,
uint8_t nprb,
uint8_t transmission_mode,
uint8_t num_bf_prb_per_subband,
uint8_t num_bf_vector
);
void fill_nfapi_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
nfapi_ul_config_harq_information *harq_information,
uint8_t cce_idxP);
void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information *harq_information);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
uint16_t absSFP,
uint8_t cce_idxP);
void fill_nfapi_dl_dci_1A(nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t aggregation_level,
uint16_t rnti,
uint8_t rnti_type,
uint8_t harq_process,
uint8_t tpc,
uint16_t resource_block_coding,
uint8_t mcs,
uint8_t ndi,
uint8_t rv,
uint8_t vrb_flag);
nfapi_ul_config_request_pdu_t* has_ul_grant(module_id_t module_idP,int CC_idP,uint16_t subframeP,uint16_t rnti);
uint8_t get_tmode(module_id_t module_idP,int CC_idP,int UE_idP);
uint8_t get_ul_req_index(module_id_t module_idP, int CC_idP, sub_frame_t subframeP);
#ifdef Rel14
int get_numnarrowbandbits(long dl_Bandwidth);
......
......@@ -62,8 +62,8 @@ unsigned short fill_rar(
// RAR_PDU *rar = (RAR_PDU *)(dlsch_buffer+1);
uint8_t *rar = (uint8_t *)(dlsch_buffer+1);
int i,ra_idx = -1;
uint16_t rballoc;
uint8_t mcs,TPC,ULdelay,cqireq;
RA_TEMPLATE *RA_template;
AssertFatal(CC_id < MAX_NUM_CCs, "CC_id %u < MAX_NUM_CCs %u", CC_id, MAX_NUM_CCs);
for (i=0; i<NB_RA_PROC_MAX; i++) {
......@@ -73,7 +73,8 @@ unsigned short fill_rar(
break;
}
}
RA_template = &RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx];
//DevAssert( ra_idx != -1 );
if (ra_idx==-1)
return(0);
......@@ -81,52 +82,43 @@ unsigned short fill_rar(
// subheader fixed
rarh->E = 0; // First and last RAR
rarh->T = 1; // 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh->RAPID = RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].preamble_index; // Respond to Preamble 0 only for the moment
/*
rar->R = 0;
rar->Timing_Advance_Command = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].timing_offset/4;
rar->hopping_flag = 0;
rar->rb_alloc = mac_xface->computeRIV(N_RB_UL,12,2); // 2 RB
rar->mcs = 2; // mcs 2
rar->TPC = 4; // 2 dB power adjustment
rar->UL_delay = 0;
rar->cqi_req = 1;
rar->t_crnti = eNB_mac_inst[module_idP].common_channels[CC_id].RA_template[ra_idx].rnti;
*/
rar[4] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti>>8);
rar[5] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti&0xff);
//RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset = 0;
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
rballoc = mac_computeRIV(N_RB_UL,1,1); // first PRB only for UL Grant
rarh->RAPID = RA_template->preamble_index; // Respond to Preamble 0 only for the moment
rar[4] = (uint8_t)(RA_template->rnti>>8);
rar[5] = (uint8_t)(RA_template->rnti&0xff);
//RA_template->timing_offset = 0;
RA_template->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t)(RA_template->timing_offset>>(2+4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t)(RA_template->timing_offset<<(4-2))&0xf0; // 4 LSBs of timing advance + divide by 4
RA_template->msg3_first_rb=1;
RA_template->msg3_nb_rb=1;
uint16_t rballoc = mac_computeRIV(N_RB_UL,RA_template->msg3_first_rb,RA_template->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc>>7)&7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
rar[2] = ((uint8_t)(rballoc&0xff))<<1; // 7 LSBs of rballoc
mcs = 10;
TPC = 3;
ULdelay = 0;
cqireq = 0;
rar[2] |= ((mcs&0x8)>>3); // mcs 10
rar[3] = (((mcs&0x7)<<5)) | ((TPC&7)<<2) | ((ULdelay&1)<<1) | (cqireq&1);
RA_template->msg3_mcs = 10;
RA_template->msg3_TPC = 3;
RA_template->msg3_ULdelay = 0;
RA_template->msg3_cqireq = 0;
rar[2] |= ((RA_template->msg3_mcs&0x8)>>3); // mcs 10
rar[3] = (((RA_template->msg3_mcs&0x7)<<5)) | ((RA_template->msg3_TPC&7)<<2) | ((RA_template->msg3_ULdelay&1)<<1) | (RA_template->msg3_cqireq&1);
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Generating RAR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ra_idx %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d\n",
module_idP, CC_id,
frameP,
*(uint8_t*)rarh,rar[0],rar[1],rar[2],rar[3],rar[4],rar[5],
ra_idx,
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti,
RA_template->rnti,
rarh->RAPID,RC.mac[module_idP]->common_channels[CC_id].RA_template[0].preamble_index,
RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].timing_offset);
RA_template->timing_offset);
if (opt_enabled) {
trace_pdu(1, dlsch_buffer, input_buffer_length, module_idP, 2, 1,
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe, 0, 0);
LOG_D(OPT,"[eNB %d][RAPROC] CC_id %d RAR Frame %d trace pdu for rnti %x and rapid %d size %d\n",
module_idP, CC_id, frameP, RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti,
module_idP, CC_id, frameP, RA_template->rnti,
rarh->RAPID, input_buffer_length);
}
return(RC.mac[module_idP]->common_channels[CC_id].RA_template[ra_idx].rnti);
return(RA_template->rnti);
}
#ifdef Rel14
......
......@@ -54,6 +54,52 @@ void handle_rach(UL_IND_t *UL_info) {
#endif
}
void handle_sr(UL_IND_t *UL_info) {
int i;
for (i=0;i<UL_info->sr_ind.number_of_srs;i++)
SR_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->sr_ind.sr_pdu_list[i].rx_ue_information.rnti,
UL_info->sr_ind.sr_pdu_list[i].ul_cqi_information.ul_cqi);
UL_info->sr_ind.number_of_srs=0;
}
void handle_cqi(UL_IND_t *UL_info) {
int i;
for (i=0;i<UL_info->cqi_ind.number_of_cqis;i++)
cqi_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
UL_info->cqi_ind.cqi_pdu_list[i].rx_ue_information.rnti,
&UL_info->cqi_ind.cqi_pdu_list[i].cqi_indication_rel9,
UL_info->cqi_ind.cqi_raw_pdu_list[i].pdu,
&UL_info->cqi_ind.cqi_pdu_list[i].ul_cqi_information);
UL_info->cqi_ind.number_of_cqis=0;
}
void handle_harq(UL_IND_t *UL_info) {
int i;
for (i=0;i<UL_info->harq_ind.number_of_harqs;i++)
harq_indication(UL_info->module_id,
UL_info->CC_id,
UL_info->frame,
UL_info->subframe,
&UL_info->harq_ind.harq_pdu_list[i]);
UL_info->harq_ind.number_of_harqs=0;
}
void handle_ulsch(UL_IND_t *UL_info) {
int i;
......@@ -70,12 +116,12 @@ void handle_ulsch(UL_IND_t *UL_info) {
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.length,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.timing_advance,
UL_info->rx_ind.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
}
UL_info->rx_ind.number_of_pdus=0;
for (i=0;i<UL_info->crc_ind.number_of_crcs;i++) {
if (UL_info->crc_ind.crc_pdu_list[i].crc_indication_rel8.crc_flag == 1) { // CRC error indication
LOG_D(MAC,"Frame %d, Subframe %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->subframe);
rx_sdu(UL_info->module_id,
......@@ -88,8 +134,8 @@ void handle_ulsch(UL_IND_t *UL_info) {
0,
0);
}
}
UL_info->crc_ind.number_of_crcs=0;
}
......@@ -121,9 +167,19 @@ void UL_indication(UL_IND_t *UL_info)
ifi->CC_mask |= (1<<CC_id);
// clear DL/UL info for new scheduling round
clear_nfapi_information(RC.mac[module_id],CC_id,
UL_info->frame,UL_info->subframe);
handle_rach(UL_info);
handle_sr(UL_info);
handle_cqi(UL_info);
handle_harq(UL_info);
// clear HI prior to hanling ULSCH
mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
......@@ -143,13 +199,19 @@ void UL_indication(UL_IND_t *UL_info)
sched_info->subframe = (UL_info->subframe+4)%10;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
sched_info->UL_req = &mac->UL_req[CC_id];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+4)%10)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;
sched_info->TX_req = &mac->TX_req[CC_id];
AssertFatal(ifi->schedule_response!=NULL,
"UL_indication is null (mod %d, cc %d)\n",
module_id,
CC_id);
ifi->schedule_response(sched_info);
LOG_D(PHY,"Schedule_response: frame %d, subframe %d (dl_pdus %d / %p)\n",sched_info->frame,sched_info->subframe,sched_info->DL_req->dl_config_request_body.number_pdu,
&sched_info->DL_req->dl_config_request_body.number_pdu);
}
......
/*This is the interface module between PHY
*Provided the FAPI style interface structures for P7.
*
*
*
*//*
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
......@@ -43,14 +37,6 @@
#include "openair1/PHY/LTE_TRANSPORT/defs.h"
#include "nfapi_interface.h"
// uplink subframe P7
///
/*UL_IND_t:
* A structure handles all the uplink information.
*/
#define MAX_NUM_DL_PDU 100
#define MAX_NUM_UL_PDU 100
......
......@@ -84,7 +84,7 @@ mac_rrc_data_req(
#ifdef DEBUG_RRC
int i;
LOG_T(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
LOG_I(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
#endif
eNB_RRC_INST *rrc;
......@@ -218,7 +218,7 @@ mac_rrc_data_req(
// check if data is there for MAC
if(Srb_info->Tx_buffer.payload_size>0) { //Fill buffer
LOG_D(RRC,"[eNB %d] CCCH (%p) has %d bytes (dest: %p, src %p)\n",Mod_idP,Srb_info,Srb_info->Tx_buffer.payload_size,buffer_pP,Srb_info->Tx_buffer.Payload);
LOG_I(RRC,"[eNB %d] CCCH (%p) has %d bytes (dest: %p, src %p)\n",Mod_idP,Srb_info,Srb_info->Tx_buffer.payload_size,buffer_pP,Srb_info->Tx_buffer.Payload);
#if defined(ENABLE_ITTI)
{
......@@ -504,9 +504,9 @@ mac_rrc_data_ind(
} else { // This is an eNB
Srb_info = &RC.rrc[module_idP]->carrier[CC_id].Srb0;
LOG_T(RRC,"[eNB %d] Received SDU for CCCH on SRB %d\n",module_idP,Srb_info->Srb_id);
#if defined(ENABLE_ITTI)
LOG_I(RRC,"[eNB %d] Received SDU for CCCH on SRB %d\n",module_idP,Srb_info->Srb_id);
#if 0 //defined(ENABLE_ITTI)
{
MessageDef *message_p;
int msg_sdu_size = sizeof(RRC_MAC_CCCH_DATA_IND (message_p).sdu);
......@@ -526,6 +526,7 @@ mac_rrc_data_ind(
RRC_MAC_CCCH_DATA_IND (message_p).CC_id = CC_id;
memset (RRC_MAC_CCCH_DATA_IND (message_p).sdu, 0, CCCH_SDU_SIZE);
memcpy (RRC_MAC_CCCH_DATA_IND (message_p).sdu, sduP, sdu_size);
LOG_I(RRC,"[eNB %d] Sending message to RRC task\n",module_idP);
itti_send_msg_to_task (TASK_RRC_ENB, ctxt.instance, message_p);
}
#else
......
......@@ -1371,9 +1371,7 @@ do_RRCConnectionSetup(
physicalConfigDedicated2->soundingRS_UL_ConfigDedicated = NULL;
physicalConfigDedicated2->antennaInfo = CALLOC(1,sizeof(*physicalConfigDedicated2->antennaInfo));
physicalConfigDedicated2->schedulingRequestConfig = CALLOC(1,sizeof(*physicalConfigDedicated2->schedulingRequestConfig));
#ifdef CBA
physicalConfigDedicated2->pusch_CBAConfigDedicated_vlola = CALLOC(1,sizeof(*physicalConfigDedicated2->pusch_CBAConfigDedicated_vlola));
#endif
// PDSCH
//assign_enum(&physicalConfigDedicated2->pdsch_ConfigDedicated->p_a,
// PDSCH_ConfigDedicated__p_a_dB0);
......
......@@ -151,72 +151,9 @@ rrc_init_global_param(
Rlc_info_am_config.rlc.rlc_am_info.t_poll_retransmit = 15;
Rlc_info_am_config.rlc.rlc_am_info.t_reordering = 50;
Rlc_info_am_config.rlc.rlc_am_info.t_status_prohibit = 10;
#ifndef NO_RRM
if (L3_xface_init ()) {
return (-1);
}
#endif
return 0;
}
#ifndef NO_RRM
//-----------------------------------------------------------------------------
int
L3_xface_init(
void
)
//-----------------------------------------------------------------------------
{
int ret = 0;
#ifdef USER_MODE
int sock;
LOG_D(RRC, "[L3_XFACE] init de l'interface \n");
if (open_socket (&S_rrc, RRC_RRM_SOCK_PATH, RRM_RRC_SOCK_PATH, 0) == -1) {
return (-1);
}
if (S_rrc.s == -1) {
return (-1);
}
socket_setnonblocking (S_rrc.s);
msg ("Interface Connected... RRM-RRC\n");
return 0;
#else
ret=rtf_create(RRC2RRM_FIFO,32768);
if (ret < 0) {
msg("[openair][MAC][INIT] Cannot create RRC2RRM fifo %d (ERROR %d)\n",RRC2RRM_FIFO,ret);
return(-1);
} else {
msg("[openair][MAC][INIT] Created RRC2RRM fifo %d\n",RRC2RRM_FIFO);
rtf_reset(RRC2RRM_FIFO);
}
ret=rtf_create(RRM2RRC_FIFO,32768);
if (ret < 0) {
msg("[openair][MAC][INIT] Cannot create RRM2RRC fifo %d (ERROR %d)\n",RRM2RRC_FIFO,ret);
return(-1);
} else {
msg("[openair][MAC][INIT] Created RRC2RRM fifo %d\n",RRM2RRC_FIFO);
rtf_reset(RRM2RRC_FIFO);
}
return(0);
#endif
}
#endif
//-----------------------------------------------------------------------------
void
......
......@@ -3453,38 +3453,7 @@ rrc_eNB_process_RRCConnectionReconfigurationComplete(
ue_context_pP->ue_context.kenb, &kRRCint);
#endif
#if ENABLE_RAL
{
MessageDef *message_ral_p = NULL;
rrc_ral_connection_reconfiguration_ind_t connection_reconfiguration_ind;
int i;
message_ral_p = itti_alloc_new_message(TASK_RRC_ENB, RRC_RAL_CONNECTION_RECONFIGURATION_IND);
memset(&connection_reconfiguration_ind, 0, sizeof(rrc_ral_connection_reconfiguration_ind_t));
connection_reconfiguration_ind.ue_id = ctxt_pP->rnti;
if (DRB_configList != NULL) {
connection_reconfiguration_ind.num_drb = DRB_configList->list.count;
for (i = 0; (i < DRB_configList->list.count) && (i < maxDRB); i++) {
connection_reconfiguration_ind.drb_id[i] = DRB_configList->list.array[i]->drb_Identity;
}
} else {
connection_reconfiguration_ind.num_drb = 0;
}
if (SRB_configList != NULL) {
connection_reconfiguration_ind.num_srb = SRB_configList->list.count;
} else {
connection_reconfiguration_ind.num_srb = 0;
}
memcpy(&message_ral_p->ittiMsg, (void *)&connection_reconfiguration_ind,
sizeof(rrc_ral_connection_reconfiguration_ind_t));
LOG_I(RRC, "Sending RRC_RAL_CONNECTION_RECONFIGURATION_IND to RAL\n");
itti_send_msg_to_task(TASK_RAL_ENB, ctxt_pP->instance, message_ral_p);
}
#endif
// Refresh SRBs/DRBs
MSC_LOG_TX_MESSAGE(
MSC_RRC_ENB,
......@@ -4423,7 +4392,7 @@ rrc_eNB_decode_dcch(
sdu_sizeP,
0,
0);
/*
#if defined(ENABLE_ITTI)
# if defined(DISABLE_ITTI_XER_PRINT)
{
......@@ -4452,7 +4421,7 @@ rrc_eNB_decode_dcch(
}
# endif
#endif
*/
{
for (i = 0; i < sdu_sizeP; i++) {
LOG_T(RRC, "%x.", Rx_sdu[i]);
......@@ -4971,13 +4940,14 @@ rrc_enb_task(
protocol_ctxt_t ctxt;
itti_mark_task_ready(TASK_RRC_ENB);
LOG_I(RRC,"Entering main loop of RRC message task\n");
while (1) {
// Wait for a message
itti_receive_msg(TASK_RRC_ENB, &msg_p);
msg_name_p = ITTI_MSG_NAME(msg_p);
instance = ITTI_MSG_INSTANCE(msg_p);
LOG_I(RRC,"Received message %s\n",msg_name_p);
switch (ITTI_MSG_ID(msg_p)) {
case TERMINATE_MESSAGE:
......
......@@ -98,19 +98,13 @@ int create_tasks(uint32_t enb_nb, uint32_t ue_nb)
# endif
if (enb_nb > 0) {
LOG_I(RRC,"Creating RRC eNB Task\n");
if (itti_create_task (TASK_RRC_ENB, rrc_enb_task, NULL) < 0) {
LOG_E(RRC, "Create task for RRC eNB failed\n");
return -1;
}
# if ENABLE_RAL
if (itti_create_task (TASK_RAL_ENB, eRAL_task, NULL) < 0) {
LOG_E(RAL_ENB, "Create task for RAL eNB failed\n");
return -1;
}
# endif
}
if (ue_nb > 0) {
......
......@@ -195,8 +195,8 @@ L1s = (
RUs = (
{
local_if_name = "lo";
remote_address = "127.0.0.1";
local_address = "127.0.0.2";
remote_address = "127.0.0.2";
local_address = "127.0.0.1";
local_portc = 50000;
remote_portc = 50000;
local_portd = 50001;
......
......@@ -940,6 +940,10 @@ void init_eNB(int single_thread_flag,int wait_for_sync) {
LOG_I(PHY,"Setting indication lists\n");
eNB->UL_INFO.rx_ind.rx_pdu_list = eNB->rx_pdu_list;
eNB->UL_INFO.crc_ind.crc_pdu_list = eNB->crc_pdu_list;
eNB->UL_INFO.sr_ind.sr_pdu_list = eNB->sr_pdu_list;
eNB->UL_INFO.harq_ind.harq_pdu_list = eNB->harq_pdu_list;
eNB->UL_INFO.cqi_ind.cqi_pdu_list = eNB->cqi_pdu_list;
eNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = eNB->cqi_raw_pdu_list;
}
}
......
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