Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
wangwenhui
OpenXG-RAN
Commits
7e03fe23
Commit
7e03fe23
authored
May 26, 2016
by
Dominique Nussbaum
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
fixes for 20MHz
parent
111d6222
Changes
4
Hide whitespace changes
Inline
Side-by-side
Showing
4 changed files
with
31 additions
and
29 deletions
+31
-29
openair1/SCHED/phy_mac_stub.c
openair1/SCHED/phy_mac_stub.c
+20
-19
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+2
-1
targets/ARCH/EXMIMO/USERSPACE/OCTAVE/txsig.m
targets/ARCH/EXMIMO/USERSPACE/OCTAVE/txsig.m
+7
-7
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.exmimo2.conf
.../PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.exmimo2.conf
+2
-2
No files found.
openair1/SCHED/phy_mac_stub.c
View file @
7e03fe23
...
...
@@ -57,6 +57,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
uint32_t
rballoc
=
0x7FFF
;
//uint32_t rballoc2 = 0x000F;
uint32_t
rballoc_test
=
0xFFFF
;
int
subframe
=
phy_vars_eNB
->
proc
[
sched_subframe
].
subframe_tx
;
LTE_eNB_DLSCH_t
*
DLSCH_ptr
=
phy_vars_eNB
->
dlsch_eNB
[
0
][
0
];
...
...
@@ -143,7 +144,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1A_10MHz_FDD_t
;
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
type
=
1
;
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
vrb_type
=
0
;
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
25
,
10
,
3
);
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
50
,
10
,
3
);
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
rv
=
1
;
((
DCI1A_10MHz_FDD_t
*
)
&
bcch_pdu
)
->
mcs
=
1
;
...
...
@@ -154,7 +155,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1A_10MHz_TDD_1_6_t
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
type
=
1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
vrb_type
=
0
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
25
,
10
,
3
);
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
50
,
10
,
3
);
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
rv
=
1
;
((
DCI1A_10MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
mcs
=
1
;
...
...
@@ -170,7 +171,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1A_20MHz_FDD_t
;
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
type
=
1
;
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
vrb_type
=
0
;
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
25
,
10
,
3
);
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
100
,
10
,
3
);
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
rv
=
1
;
((
DCI1A_20MHz_FDD_t
*
)
&
bcch_pdu
)
->
mcs
=
1
;
...
...
@@ -181,7 +182,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1A_20MHz_TDD_1_6_t
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
type
=
1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
vrb_type
=
0
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
25
,
10
,
3
);
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
rballoc
=
computeRIV
(
100
,
10
,
3
);
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
rv
=
1
;
((
DCI1A_20MHz_TDD_1_6_t
*
)
&
bcch_pdu
)
->
mcs
=
1
;
...
...
@@ -231,14 +232,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
if
(
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
FDD
)
{
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_5MHz_FDD_t
;
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
//computeRIV(25,10,3);
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
mcs
=
openair_daq_vars
.
target_ue_dl_mcs
;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_5MHz_
T
DD_t
));
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_5MHz_
F
DD_t
));
/*
//user2
...
...
@@ -261,7 +262,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
}
else
{
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_5MHz_TDD_t
;
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
//computeRIV(25,10,3);
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
dai
=
0
;
((
DCI1_5MHz_TDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
...
...
@@ -298,14 +299,14 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
if
(
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
FDD
)
{
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_10MHz_FDD_t
;
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
//computeRIV(50,10,3);
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
mcs
=
openair_daq_vars
.
target_ue_dl_mcs
;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_10MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_10MHz_
T
DD_t
));
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_10MHz_
F
DD_t
));
/*
//user2
...
...
@@ -328,7 +329,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
}
else
{
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_10MHz_TDD_t
;
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
//computeRIV(50,10,3);
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
dai
=
0
;
((
DCI1_10MHz_TDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
...
...
@@ -362,16 +363,16 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
case
100
:
if
(
phy_vars_eNB
->
lte_frame_parms
.
frame_type
==
FDD
)
{
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_
5
MHz_FDD_t
;
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_
20
MHz_FDD_t
;
((
DCI1_
5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
((
DCI1_
5
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_
5MHz_FDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
((
DCI1_
5
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
mcs
=
openair_daq_vars
.
target_ue_dl_mcs
;
((
DCI1_
20MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
//computeRIV(100,10,3)
;
((
DCI1_
20
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_
20MHz_FDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
((
DCI1_
20
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
mcs
=
openair_daq_vars
.
target_ue_dl_mcs
;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((
DCI1_
5
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_
5
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_
5MHz_T
DD_t
));
((
DCI1_
20
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
ndi
=
phy_vars_eNB
->
proc
[
sched_subframe
].
frame_tx
&
1
;
((
DCI1_
20
MHz_FDD_t
*
)
&
dlsch_pdu
)
->
rv
=
0
;
memcpy
((
void
*
)
&
DCI_pdu
->
dci_alloc
[
0
].
dci_pdu
[
0
],(
void
*
)
&
dlsch_pdu
,
sizeof
(
DCI1_
20MHz_F
DD_t
));
/*
//user2
...
...
@@ -394,7 +395,7 @@ void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_e
}
else
{
DCI_pdu
->
dci_alloc
[
0
].
dci_length
=
sizeof_DCI1_20MHz_TDD_t
;
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
rballoc
=
rballoc
;
//computeRIV(100,10,3);
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
TPC
=
0
;
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
dai
=
0
;
((
DCI1_20MHz_TDD_t
*
)
&
dlsch_pdu
)
->
harq_pid
=
DLSCH_ptr
->
harq_pid_freelist
[
DLSCH_ptr
->
head_freelist
];
...
...
openair1/SCHED/phy_procedures_lte_eNb.c
View file @
7e03fe23
...
...
@@ -562,6 +562,7 @@ void phy_eNB_lte_check_measurement_thresholds(instance_t instanceP, ral_threshol
unsigned
int
taus
(
void
);
DCI_PDU
DCI_pdu_tmp
;
void
phy_procedures_eNB_TX
(
unsigned
char
sched_subframe
,
PHY_VARS_eNB
*
phy_vars_eNB
,
uint8_t
abstraction_flag
,
relaying_type_t
r_type
,
PHY_VARS_RN
*
phy_vars_rn
)
...
...
@@ -573,7 +574,7 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
uint8_t
harq_pid
;
DCI_PDU
*
DCI_pdu
;
uint8_t
*
DLSCH_pdu
=
NULL
;
DCI_PDU
DCI_pdu_tmp
;
//
DCI_PDU DCI_pdu_tmp;
uint8_t
DLSCH_pdu_tmp
[
768
*
8
];
int8_t
UE_id
;
uint8_t
num_pdcch_symbols
=
0
;
...
...
targets/ARCH/EXMIMO/USERSPACE/OCTAVE/txsig.m
View file @
7e03fe23
fc
=
19076
00000
;
fc
=
26550
00000
;
%fc = 1907600000;
%fc = 859.5e6;
...
...
@@ -8,9 +8,9 @@ eNB_flag = 0;
card
=
0
;
active_rf
=
[
1
1
1
1
];
autocal
=
[
1
1
1
1
];
resampling_factor
=
[
2
2
2
2
];
resampling_factor
=
[
0
0
0
0
];
limeparms
;
rf_mode
=
(
RXEN
+
TXEN
+
TXLPFNORM
+
TXLPFEN
+
TXLPF
25
+
RXLPFNORM
+
RXLPFEN
+
RXLPF25
+
LNA1ON
+
LNAMax
+
RFBBNORM
)
*
active_rf
;
rf_mode
=
(
RXEN
+
TXEN
+
TXLPFNORM
+
TXLPFEN
+
TXLPF
10
+
RXLPFNORM
+
RXLPFEN
+
RXLPF10
+
LNA1ON
+
LNAMax
+
RFBBNORM
)
*
active_rf
;
rf_mode
=
rf_mode
+
(
DMAMODE_RX
+
DMAMODE_TX
)
*
active_rf
;
%rf_mode = rf_mode + (DMAMODE_TX)*active_rf + DMAMODE_RX*active_rf;
%rf_mode = RXEN+TXEN+TXLPFNORM+TXLPFEN+TXLPF25+RXLPFNORM+RXLPFEN+RXLPF25+LNA1ON+LNAByp+RFBBLNA1;
...
...
@@ -56,10 +56,10 @@ case 0
s
(:,
4
)
=
amp
*
ones
(
1
,
length
);
case
1
s
(:,
1
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
4
)));
s
(:,
2
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
4
)));
s
(:,
3
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
4
)));
s
(:,
4
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
4
)));
s
(:,
1
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
256
)));
s
(:,
2
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
256
)));
s
(:,
3
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
256
)));
s
(:,
4
)
=
floor
(
amp
*
(
exp
(
1
i
*
2
*
pi
*
(
0
:((
length
)
-
1
))/
256
)));
case
2
s
(
38400
+
128
,
1
)
=
80
-
1
j
*
40
;
...
...
targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.exmimo2.conf
View file @
7e03fe23
...
...
@@ -31,11 +31,11 @@ eNBs =
downlink_frequency
=
2680000000
L
;
uplink_frequency_offset
= -
120000000
;
Nid_cell
=
0
;
N_RB_DL
=
25
;
N_RB_DL
=
50
;
Nid_cell_mbsfn
=
0
;
nb_antennas_tx
=
1
;
nb_antennas_rx
=
1
;
tx_gain
=
25
;
tx_gain
=
0
;
rx_gain
=
20
;
prach_root
=
0
;
prach_config_index
=
0
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment