Commit ba40f3c7 authored by Francesco Mani's avatar Francesco Mani

fix in sync position at UE and other minor issues

parent d5af323a
......@@ -41,38 +41,32 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp)
int case_E[8] = {8, 12, 16, 20, 32, 36, 40, 44};
switch(mu) {
case NR_MU_0: // case A
n = i_ssb >> 1;
symbol = case_AC[i_ssb % 2] + 14*n;
break;
case NR_MU_1:
if (type == 1){ // case B
n = i_ssb >> 2;
symbol = case_BD[i_ssb % 4] + 28*n;
}
if (type == 2){ // case C
n = i_ssb >> 1;
symbol = case_AC[i_ssb % 2] + 14*n;
}
break;
case NR_MU_3: // case D
n_temp = i_ssb >> 2;
n = n_temp + (n_temp >> 2);
symbol = case_BD[i_ssb % 4] + 28*n;
break;
case NR_MU_4: // case E
n_temp = i_ssb >> 3;
n = n_temp + (n_temp >> 2);
symbol = case_E[i_ssb % 8] + 56*n;
break;
default:
AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
case NR_MU_0: // case A
n = i_ssb >> 1;
symbol = case_AC[i_ssb % 2] + 14*n;
break;
case NR_MU_1:
if (type == 1){ // case B
n = i_ssb >> 2;
symbol = case_BD[i_ssb % 4] + 28*n;
}
if (type == 2){ // case C
n = i_ssb >> 1;
symbol = case_AC[i_ssb % 2] + 14*n;
}
break;
case NR_MU_3: // case D
n_temp = i_ssb >> 2;
n = n_temp + (n_temp >> 2);
symbol = case_BD[i_ssb % 4] + 28*n;
break;
case NR_MU_4: // case E
n_temp = i_ssb >> 3;
n = n_temp + (n_temp >> 2);
symbol = case_E[i_ssb % 8] + 56*n;
break;
default:
AssertFatal(0==1, "Invalid numerology index %d for the synchronization block\n", mu);
}
if (half_frame_index)
......
......@@ -303,8 +303,11 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode,
if (ret == 0) {
// sync at symbol ue->symbol_offset
// computing the offset wrt the beginning of the frame
sync_pos_frame = (fp->ofdm_symbol_size + fp->nb_prefix_samples0)+((ue->symbol_offset)-1)*(fp->ofdm_symbol_size + fp->nb_prefix_samples);
int mu = fp->numerology_index;
// number of symbols with different prefix length
// every 7*(1<<mu) symbols there is a different prefix length (38.211 5.3.1)
int n_symb_prefix0 = (ue->symbol_offset/(7*(1<<mu)))+1;
sync_pos_frame = n_symb_prefix0*(fp->ofdm_symbol_size + fp->nb_prefix_samples0)+(ue->symbol_offset-n_symb_prefix0)*(fp->ofdm_symbol_size + fp->nb_prefix_samples);
if (ue->ssb_offset < sync_pos_frame)
ue->rx_offset = fp->samples_per_frame - sync_pos_frame + ue->ssb_offset;
else
......
......@@ -62,7 +62,7 @@ uint16_t nr_pbch_extract(int **rxdataF,
unsigned int rx_offset = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier; //and
// if (rx_offset>= frame_parms->ofdm_symbol_size) rx_offset-=frame_parms->ofdm_symbol_size;
rx_offset=(rx_offset)%(frame_parms->ofdm_symbol_size);
rx_offset=(rx_offset)%(frame_parms->ofdm_symbol_size);
AssertFatal(symbol>=1 && symbol<5,
"symbol %d illegal for PBCH extraction\n",
......@@ -539,6 +539,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
M = NR_POLAR_PBCH_E;
nushift = (Lmax==4)? i_ssb&3 : i_ssb&7;
uint32_t unscrambling_mask = (Lmax==64)?0x100006D:0x1000041;
nr_pbch_unscrambling(nr_ue_pbch_vars,frame_parms->Nid_cell,nushift,M,NR_POLAR_PBCH_E,0,0);
//polar decoding de-rate matching
const t_nrPolar_params *currentPtr = nr_polar_params( NR_POLAR_PBCH_MESSAGE_TYPE, NR_POLAR_PBCH_PAYLOAD_BITS, NR_POLAR_PBCH_AGGREGATION_LEVEL,1,&ue->polarList);
......
......@@ -970,34 +970,30 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
uint16_t frame_number_4lsb = 0;
for (int i=0; i<4; i++)
frame_number_4lsb |= ((extra_bits>>i)&1)<<(3-i);
//uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t half_frame_bit = ( extra_bits >> 4 ) & 0x1; // extra bits[4]
uint8_t ssb_subcarrier_offset_msb = ( extra_bits >> 5 ) & 0x1; // extra bits[5]
uint8_t ssb_subcarrier_offset = (uint8_t)mac->mib->ssb_SubcarrierOffset;
//uint32_t ssb_index = 0; // TODO: ssb_index should obtain from L1 in case Lssb != 64
frame = frame << 4;
frame = frame | frame_number_4lsb;
if(ssb_length == 64){
ssb_index = ssb_index | (( extra_bits >> 2 ) & 0x1C ); // { extra_bits[5:7], ssb_index[2:0] }
for (int i=0; i<3; i++)
ssb_index += (((extra_bits>>(7-i))&0x01)<<(3+i));
}else{
if(ssb_subcarrier_offset_msb){
ssb_subcarrier_offset = ssb_subcarrier_offset | 0x10;
}
}
#ifdef DEBUG_MIB
LOG_I(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]);
LOG_I(MAC,"system frame number(with LSB): %d\n", (int)frame);
LOG_I(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
LOG_I(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset);
LOG_I(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
LOG_I(MAC,"pdcch config sib1: %d\n", (int)mac->mib->pdcch_ConfigSIB1);
LOG_I(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
LOG_I(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
LOG_I(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
LOG_I(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
#endif
LOG_D(MAC,"system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]);
LOG_D(MAC,"system frame number(with LSB): %d\n", (int)frame);
LOG_D(MAC,"subcarrier spacing (0=15or60, 1=30or120): %d\n", (int)mac->mib->subCarrierSpacingCommon);
LOG_D(MAC,"ssb carrier offset(with MSB): %d\n", (int)ssb_subcarrier_offset);
LOG_D(MAC,"dmrs type A position (0=pos2,1=pos3): %d\n", (int)mac->mib->dmrs_TypeA_Position);
LOG_D(MAC,"cell barred (0=barred,1=notBarred): %d\n", (int)mac->mib->cellBarred);
LOG_D(MAC,"intra frequency reselection (0=allowed,1=notAllowed): %d\n", (int)mac->mib->intraFreqReselection);
LOG_D(MAC,"half frame bit(extra bits): %d\n", (int)half_frame_bit);
LOG_D(MAC,"ssb index(extra bits): %d\n", (int)ssb_index);
subcarrier_spacing_t scs_ssb = scs_30kHz; // default for
//const uint32_t scs_index = 0;
......@@ -1020,8 +1016,8 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
int32_t num_rbs = -1;
int32_t num_symbols = -1;
int32_t rb_offset = -1;
//LOG_I(MAC,"<<<<<<<<<configSIB1 %d index_4msb %d index_4lsb %d scs_ssb %d scs_pdcch %d switch %d ",
//mac->mib->pdcch_ConfigSIB1,index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch);
LOG_D(MAC,"<<<<<<<<<configSIB1: controlResourceSetZero %d searchSpaceZero %d scs_ssb %d scs_pdcch %d switch %d ",
index_4msb,index_4lsb,scs_ssb,scs_pdcch, (scs_ssb << 5)|scs_pdcch);
// type0-pdcch coreset
switch( (scs_ssb << 5)|scs_pdcch ){
......
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