Commit 26bceb22 authored by francescomani's avatar francescomani

handling reserved case of ULSCH MCS

parent 5b943f59
...@@ -213,6 +213,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue, ...@@ -213,6 +213,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch, NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS* frame_parms, NR_DL_FRAME_PARMS* frame_parms,
uint8_t harq_pid, uint8_t harq_pid,
uint32_t tb_size,
unsigned int G); unsigned int G);
/*! \brief Perform PUSCH scrambling. TS 38.211 V15.4.0 subclause 6.3.1.1 /*! \brief Perform PUSCH scrambling. TS 38.211 V15.4.0 subclause 6.3.1.1
......
...@@ -93,6 +93,8 @@ typedef struct { ...@@ -93,6 +93,8 @@ typedef struct {
uint8_t BG; uint8_t BG;
// LDPC lifting size // LDPC lifting size
uint32_t Z; uint32_t Z;
// TB size
uint32_t tb_size;
} NR_UL_UE_HARQ_t; } NR_UL_UE_HARQ_t;
typedef struct { typedef struct {
......
...@@ -45,8 +45,9 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue, ...@@ -45,8 +45,9 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch, NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS* frame_parms, NR_DL_FRAME_PARMS* frame_parms,
uint8_t harq_pid, uint8_t harq_pid,
unsigned int G) { uint32_t tb_size,
unsigned int G)
{
start_meas(&ue->ulsch_encoding_stats); start_meas(&ue->ulsch_encoding_stats);
/////////////////////////parameters and variables initialization///////////////////////// /////////////////////////parameters and variables initialization/////////////////////////
...@@ -55,7 +56,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue, ...@@ -55,7 +56,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
unsigned int crc = 1; unsigned int crc = 1;
NR_UL_UE_HARQ_t *harq_process = &ue->ul_harq_processes[harq_pid]; NR_UL_UE_HARQ_t *harq_process = &ue->ul_harq_processes[harq_pid];
uint16_t nb_rb = ulsch->pusch_pdu.rb_size; uint16_t nb_rb = ulsch->pusch_pdu.rb_size;
uint32_t A = ulsch->pusch_pdu.pusch_data.tb_size<<3; uint32_t A = tb_size << 3;
uint32_t *pz = &harq_process->Z; uint32_t *pz = &harq_process->Z;
uint8_t mod_order = ulsch->pusch_pdu.qam_mod_order; uint8_t mod_order = ulsch->pusch_pdu.qam_mod_order;
uint16_t Kr=0; uint16_t Kr=0;
......
...@@ -131,6 +131,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -131,6 +131,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
NR_UL_UE_HARQ_t *harq_process_ul_ue = &UE->ul_harq_processes[harq_pid]; NR_UL_UE_HARQ_t *harq_process_ul_ue = &UE->ul_harq_processes[harq_pid];
const nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch_ue->pusch_pdu; const nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch_ue->pusch_pdu;
uint32_t tb_size;
// MCS > limit -> retransmission
// Take TB size from previois transmission
if (pusch_pdu->target_code_rate == 0)
tb_size = harq_process_ul_ue->tb_size;
else {
tb_size = pusch_pdu->pusch_data.tb_size;
harq_process_ul_ue->tb_size = tb_size;
}
int start_symbol = pusch_pdu->start_symbol_index; int start_symbol = pusch_pdu->start_symbol_index;
uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos; uint16_t ul_dmrs_symb_pos = pusch_pdu->ul_dmrs_symb_pos;
uint8_t number_of_symbols = pusch_pdu->nr_of_symbols; uint8_t number_of_symbols = pusch_pdu->nr_of_symbols;
...@@ -170,10 +180,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE, ...@@ -170,10 +180,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
trace_NRpdu(DIRECTION_UPLINK, trace_NRpdu(DIRECTION_UPLINK,
harq_process_ul_ue->a, harq_process_ul_ue->a,
pusch_pdu->pusch_data.tb_size, tb_size,
WS_C_RNTI, rnti, frame, slot, 0, 0); WS_C_RNTI, rnti, frame, slot, 0, 0);
if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G) == -1) if (nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, tb_size, G) == -1)
return; return;
......
...@@ -522,7 +522,7 @@ int main(int argc, char **argv) ...@@ -522,7 +522,7 @@ int main(int argc, char **argv)
unsigned int G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl); unsigned int G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl);
if (input_fd == NULL) { if (input_fd == NULL) {
nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, G); nr_ulsch_encoding(UE, ulsch_ue, frame_parms, harq_pid, TBS>>3, G);
} }
printf("\n"); printf("\n");
......
...@@ -2401,55 +2401,58 @@ void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu, ...@@ -2401,55 +2401,58 @@ void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
// the following tables contain 10 times the value reported in 214 (in line with SCF specification and to avoid fractional values) // the following tables contain 10 times the value reported in 214 (in line with SCF specification and to avoid fractional values)
//Table 5.1.3.1-1 of 38.214 //Table 5.1.3.1-1 of 38.214
static const uint16_t Table_51311[29][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260}, static const uint16_t Table_51311[32][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260},
{2, 6020}, {2, 6790}, {4, 3400}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160}, {2, 6020}, {2, 6790}, {4, 3400}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160},
{4, 6580}, {6, 4380}, {6, 4660}, {6, 5170}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7190}, {4, 6580}, {6, 4380}, {6, 4660}, {6, 5170}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7190},
{6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480}}; {6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480}, {2, 0}, {4, 0}, {6, 0}};
//Table 5.1.3.1-2 of 38.214 //Table 5.1.3.1-2 of 38.214
// Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point // Imcs values 20 and 26 have been multiplied by 2 to avoid the floating point
static const uint16_t Table_51312[28][2] = {{2, 1200}, {2, 1930}, {2, 3080}, {2, 4490}, {2, 6020}, {4, 3780}, {4, 4340}, static const uint16_t Table_51312[32][2] = {{2, 1200}, {2, 1930}, {2, 3080}, {2, 4490}, {2, 6020}, {4, 3780}, {4, 4340},
{4, 4900}, {4, 5530}, {4, 6160}, {4, 6580}, {6, 4660}, {6, 5170}, {6, 5670}, {4, 4900}, {4, 5530}, {4, 6160}, {4, 6580}, {6, 4660}, {6, 5170}, {6, 5670},
{6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {8, 6825}, {6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {8, 6825},
{8, 7110}, {8, 7540}, {8, 7970}, {8, 8410}, {8, 8850}, {8, 9165}, {8, 9480}}; {8, 7110}, {8, 7540}, {8, 7970}, {8, 8410}, {8, 8850}, {8, 9165}, {8, 9480},
{2, 0}, {4, 0}, {6, 0}, {8, 0}};
//Table 5.1.3.1-3 of 38.214 //Table 5.1.3.1-3 of 38.214
static const uint16_t Table_51313[29][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200}, {2, 1570}, static const uint16_t Table_51313[32][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200}, {2, 1570},
{2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260}, {2, 6020}, {4, 3400}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260}, {2, 6020}, {4, 3400},
{4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160}, {6, 4380}, {6, 4660}, {6, 5170}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160}, {6, 4380}, {6, 4660}, {6, 5170},
{6, 5670}, {6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}}; {6, 5670}, {6, 6160}, {6, 6660}, {6, 7190}, {6, 7720}, {2, 0}, {4, 0}, {6, 0}};
static const uint16_t Table_61411[28][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, static const uint16_t Table_61411[32][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490},
{2, 5260}, {2, 6020}, {2, 6790}, {4, 3400}, {4, 3780}, {4, 4340}, {4, 4900}, {2, 5260}, {2, 6020}, {2, 6790}, {4, 3400}, {4, 3780}, {4, 4340}, {4, 4900},
{4, 5530}, {4, 6160}, {4, 6580}, {6, 4660}, {6, 5170}, {6, 5670}, {6, 6160}, {4, 5530}, {4, 6160}, {4, 6580}, {6, 4660}, {6, 5170}, {6, 5670}, {6, 6160},
{6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480}}; {6, 6660}, {6, 7190}, {6, 7720}, {6, 8220}, {6, 8730}, {6, 9100}, {6, 9480},
{2, 0}, {2, 0}, {4, 0}, {6, 0}};
static const uint16_t Table_61412[28][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200}, static const uint16_t Table_61412[32][2] = {{2, 300}, {2, 400}, {2, 500}, {2, 640}, {2, 780}, {2, 990}, {2, 1200},
{2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260},
{2, 6020}, {2, 6790}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160}, {2, 6020}, {2, 6790}, {4, 3780}, {4, 4340}, {4, 4900}, {4, 5530}, {4, 6160},
{4, 6580}, {4, 6990}, {4, 7720}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7720}}; {4, 6580}, {4, 6990}, {4, 7720}, {6, 5670}, {6, 6160}, {6, 6660}, {6, 7720},
{2, 0}, {2, 0}, {4, 0}, {6, 0}};
uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) { uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) { switch(table_idx) {
case 0: case 0:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51311[Imcs][0]); return (Table_51311[Imcs][0]);
break; break;
case 1: case 1:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51312[Imcs][0]); return (Table_51312[Imcs][0]);
break; break;
case 2: case 2:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51313[Imcs][0]); return (Table_51313[Imcs][0]);
...@@ -2464,24 +2467,24 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) { ...@@ -2464,24 +2467,24 @@ uint8_t nr_get_Qm_dl(uint8_t Imcs, uint8_t table_idx) {
uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) { uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) { switch(table_idx) {
case 0: case 0:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51311[Imcs][1]); return (Table_51311[Imcs][1]);
break; break;
case 1: case 1:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51312[Imcs][1]); return (Table_51312[Imcs][1]);
break; break;
case 2: case 2:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51313[Imcs][1]); return (Table_51313[Imcs][1]);
...@@ -2496,40 +2499,40 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) { ...@@ -2496,40 +2499,40 @@ uint32_t nr_get_code_rate_dl(uint8_t Imcs, uint8_t table_idx) {
uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) { uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) { switch(table_idx) {
case 0: case 0:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51311[Imcs][0]); return (Table_51311[Imcs][0]);
break; break;
case 1: case 1:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51312[Imcs][0]); return (Table_51312[Imcs][0]);
break; break;
case 2: case 2:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51313[Imcs][0]); return (Table_51313[Imcs][0]);
break; break;
case 3: case 3:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_61411[Imcs][0]); return (Table_61411[Imcs][0]);
break; break;
case 4: case 4:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_61412[Imcs][0]); return (Table_61412[Imcs][0]);
...@@ -2544,40 +2547,40 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) { ...@@ -2544,40 +2547,40 @@ uint8_t nr_get_Qm_ul(uint8_t Imcs, uint8_t table_idx) {
uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) { uint32_t nr_get_code_rate_ul(uint8_t Imcs, uint8_t table_idx) {
switch(table_idx) { switch(table_idx) {
case 0: case 0:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 0 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51311[Imcs][1]); return (Table_51311[Imcs][1]);
break; break;
case 1: case 1:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 1 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51312[Imcs][1]); return (Table_51312[Imcs][1]);
break; break;
case 2: case 2:
if (Imcs > 28) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,28])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 2 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_51313[Imcs][1]); return (Table_51313[Imcs][1]);
break; break;
case 3: case 3:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 3 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_61411[Imcs][1]); return (Table_61411[Imcs][1]);
break; break;
case 4: case 4:
if (Imcs > 27) { if (Imcs > 31) {
LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,27])\n", Imcs); LOG_E(MAC, "Invalid MCS index %d for MCS table 4 (expected range [0,31])\n", Imcs);
return 0; return 0;
} }
return (Table_61412[Imcs][1]); return (Table_61412[Imcs][1]);
......
...@@ -715,8 +715,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -715,8 +715,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->target_code_rate = R; pusch_config_pdu->target_code_rate = R;
pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table); pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table);
if (pusch_config_pdu->target_code_rate == 0 || pusch_config_pdu->qam_mod_order == 0) { if (pusch_config_pdu->qam_mod_order == 0) {
LOG_W(NR_MAC, "In %s: Invalid code rate or Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n", __FUNCTION__); LOG_W(NR_MAC, "Invalid Mod order, likely due to unexpected UL DCI. Ignoring DCI! \n");
return -1; return -1;
} }
...@@ -730,14 +730,15 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac, ...@@ -730,14 +730,15 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
nb_dmrs_re_per_rb = ((pusch_config_pdu->dmrs_config_type == pusch_dmrs_type1) ? 6:4)*pusch_config_pdu->num_dmrs_cdm_grps_no_data; nb_dmrs_re_per_rb = ((pusch_config_pdu->dmrs_config_type == pusch_dmrs_type1) ? 6:4)*pusch_config_pdu->num_dmrs_cdm_grps_no_data;
// Compute TBS // Compute TBS
pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order, if (R > 0)
R, pusch_config_pdu->pusch_data.tb_size = nr_compute_tbs(pusch_config_pdu->qam_mod_order,
pusch_config_pdu->rb_size, R,
pusch_config_pdu->nr_of_symbols, pusch_config_pdu->rb_size,
nb_dmrs_re_per_rb*number_dmrs_symbols, pusch_config_pdu->nr_of_symbols,
N_PRB_oh, nb_dmrs_re_per_rb*number_dmrs_symbols,
0, // TBR to verify tb scaling N_PRB_oh,
pusch_config_pdu->nrOfLayers)>>3; 0, // TBR to verify tb scaling
pusch_config_pdu->nrOfLayers)>>3;
return 0; return 0;
} }
......
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