Commit aea3bc2d authored by Thomas Schlichter's avatar Thomas Schlichter

Merge remote-tracking branch 'NR_RRC_harq_hacks'

Conflicts:
	openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
	openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
	openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
	openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
parents 52e49fd8 614af997
......@@ -2900,6 +2900,7 @@ target_link_libraries(ldpctest
add_executable(nr_dlschsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c
${OPENAIR_DIR}/common/utils/system.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${UTIL_SRC}
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
......@@ -2912,6 +2913,7 @@ target_link_libraries(nr_dlschsim
add_executable(nr_pbchsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/pbchsim.c
${OPENAIR_DIR}/common/utils/system.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${UTIL_SRC}
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
......@@ -2965,6 +2967,7 @@ target_link_libraries(nr_prachsim
add_executable(nr_ulschsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulschsim.c
${OPENAIR_DIR}/common/utils/system.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${UTIL_SRC}
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
......
......@@ -1071,9 +1071,9 @@
<main_exec> $OPENAIR_DIR/targets/bin/nr_pbchsim.Rel15</main_exec>
<main_exec_args>-s0 -S1 -n1000 -R106
-s0 -S1 -n10 -I -R106
-s0 -S1 -n1000 -R217
-s0 -S1 -n1000 -R217
-s0 -S1 -n10 -I -R217
-s0 -S1 -n1000 -R273
-s0 -S1 -n1000 -R273
-s0 -S1 -n10 -I -R273</main_exec_args>
<tags>nr_pbchsim.test1 nr_pbchsim.test2 nr_pbchsim.test3 nr_pbchsim.test4 nr_pbchsim.test5 nr_pbchsim.test6</tags>
<search_expr_true>PBCH test OK</search_expr_true>
......@@ -1091,8 +1091,11 @@
(Test6: 217 PRB 100 PDSCH-PRBs),
(Test7: 217 PRB 80 PDSCH-Offset),
(Test8: 217 PRB 100 PDSCH-PRBs 110 PDSCH-Offset),
(Test9: 106 PRBs 50 PDSCH-PRBs MCS Index 27)
(Test10: 106 PRBs 50 PDSCH-PRBs MCS Index 16)</desc>
(Test9: 106 PRBs 50 PDSCH-PRBs MCS Index 27),
(Test10: 106 PRBs 50 PDSCH-PRBs MCS Index 16),
(Test11: HARQ test 25% TP (4 rounds),
(Test12: HARQ test 33% TP (3 rounds),
(Test13: HARQ test 50% TP (2 rounds)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
......@@ -1108,8 +1111,11 @@
-n100 -R217 -a80 -s5
-n100 -R217 -a110 -s5 -b100
-n100 -e27 -s30
-n100 -e16 -s10</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10</tags>
-n100 -e16 -s10
-n100 -s1 -t25
-n100 -s1 -t33
-n100 -s1 -t50</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......@@ -1217,11 +1223,9 @@
-R 106 -i 1 -P 2 -b 11 -s6 -n1000
-R 106 -i 1 -P 2 -q8 -b 12 -s-3 -n1000
-R 106 -i 1 -P 2 -q8 -b 19 -s-3 -n1000
-R 106 -i 1 -P 2 -q8 -b 19 -s-3 -n1000
-R 106 -i 1 -P 2 -q8 -b 32 -s-3 -n1000
-R 106 -i 1 -P 2 -q16 -b 32 -s-3 -n1000
-R 106 -i 1 -P 2 -q16 -b 64 -s-3 -n1000
</main_exec_args>
-R 106 -i 1 -P 2 -q16 -b 64 -s-3 -n1000</main_exec_args>
<tags>nr_pucchsim.test1 nr_pucchsim.test2 nr_pucchsim.test3 nr_pucchsim.test4 nr_pucchsim.test5 nr_pucchsim.test6 nr_pucchsim.test7 nr_pucchsim.test8 nr_pucchsim.test9 nr_pucchsim.test10 nr_pucchsim.test11 nr_pucchsim.test12 nr_pucchsim.test13 nr_pucchsim.test14 nr_pucchsim.test15 nr_pucchsim.test16 nr_pucchsim.test17</tags>
<search_expr_true>PUCCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
......@@ -1292,19 +1296,21 @@
<testCase id="015112">
<class>execution</class>
<desc>nr_prachsim Test cases. (Test1: 106 PRBs),
(Test2: 217 PRBs),
(Test3: 273 PRBs)</desc>
<desc>nr_prachsim Test cases. (Test1: 106 PRBs - Prach format A2),
(Test2: 217 PRBs - Prach format A2),
(Test3: 273 PRBs - Prach format A2),
(Test4: 106 PRBs - Prach format 0)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_prachsim.Rel15</main_exec>
<main_exec_args>-a -s -30 -n 100 -p 16 -R 106
-a -s -30 -n 100 -p 16 -R 217
-a -s -30 -n 100 -p 16 -R 273</main_exec_args>
<tags>nr_prachsim.test1 nr_prachsim.test2 nr_prachsim.test3</tags>
<main_exec_args>-a -s -30 -n 100 -p 63 -R 106
-a -s -30 -n 100 -p 63 -R 217
-a -s -30 -n 100 -p 63 -R 273
-a -s -30 -n 100 -p 63 -R 106 -c 4</main_exec_args>
<tags>nr_prachsim.test1 nr_prachsim.test2 nr_prachsim.test3 nr_prachsim.test4</tags>
<search_expr_true>PRACH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......
......@@ -352,7 +352,8 @@ The following features are valid for the gNB and the 5G-NR UE.
- Initial sync and MIB detection
- MAC -> PHY configuration of PHY via UE FAPI P5 interface
- Basic MAC to control PHY via UE FAPI P7 interface
- Random ccess procedure
- Random access procedure
**RLC**
......
......@@ -61,7 +61,6 @@
#include "PHY/phy_extern.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "RRC/LTE/rrc_extern.h"
#include "PHY_INTERFACE/phy_interface.h"
......@@ -964,12 +963,14 @@ void init_gNB(int single_thread_flag,int wait_for_sync) {
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
memset((void *)&gNB->UL_INFO,0,sizeof(gNB->UL_INFO));
LOG_I(PHY,"Setting indication lists\n");
gNB->UL_INFO.rx_ind.pdu_list = gNB->rx_pdu_list;
gNB->UL_INFO.crc_ind.crc_list = gNB->crc_pdu_list;
/*gNB->UL_INFO.sr_ind.sr_indication_body.sr_pdu_list = gNB->sr_pdu_list;
gNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list = gNB->harq_pdu_list;
gNB->UL_INFO.cqi_ind.cqi_pdu_list = gNB->cqi_pdu_list;
gNB->UL_INFO.cqi_ind.cqi_raw_pdu_list = gNB->cqi_raw_pdu_list;*/
gNB->prach_energy_counter = 0;
}
......
......@@ -155,6 +155,7 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
// initialize all signal buffers
init_nr_ue_signal(ue, nb_connected_gNB, abstraction_flag);
// intialize transport
init_nr_ue_transport(ue, abstraction_flag);
}
......@@ -364,6 +365,7 @@ static void UE_synch(void *arg) {
void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_tti_tx);
uint8_t gNB_id = 0;
......@@ -434,6 +436,23 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
pdcp_run(&ctxt);
}
}
// no UL for now
/*
if (UE->mac_enabled==1) {
// trigger L2 to run ue_scheduler thru IF module
// [TODO] mapping right after NR initial sync
if(UE->if_inst != NULL && UE->if_inst->ul_indication != NULL) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.frame = proc->frame_rx;
UE->ul_indication.slot = proc->nr_tti_rx;
UE->if_inst->ul_indication(&UE->ul_indication);
}
}
*/
}
/*!
......@@ -556,6 +575,12 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
int computeSamplesShift(PHY_VARS_NR_UE *UE) {
if (IS_SOFTMODEM_RFSIM) {
LOG_D(PHY,"SET rx_offset %d \n",UE->rx_offset);
//UE->rx_offset_diff=0;
return 0;
}
// compute TO compensation that should be applied for this frame
if ( UE->rx_offset < UE->frame_parms.samples_per_frame/2 &&
UE->rx_offset > 0 ) {
......
......@@ -1560,7 +1560,7 @@ typedef struct
uint16_t sfn;
uint16_t slot;
uint16_t num_ucis;
nfapi_nr_uci_t uci_list[NFAPI_MAX_NUM_UCI_INDICATION];
nfapi_nr_uci_t *uci_list;
} nfapi_nr_uci_indication_t;
......
......@@ -324,6 +324,7 @@ int check_crc(uint8_t* decoded_bytes, uint32_t n, uint32_t F, uint8_t crc_type)
AssertFatal(1,"Invalid crc_type \n");
}
if (crc == oldcrc)
return(1);
else
......
......@@ -364,8 +364,8 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
if (ind < Foffset) { // case where we have some bits before the filler and the rest after
memcpy((void*)e,(void*)(w+ind),Foffset-ind);
if (E + F <= Ncb) { // E+F doesn't contain all coded bits
memcpy((void*)(e+Foffset-ind),(void*)(w+Foffset+F-ind),E-Foffset+ind);
if (E + F <= Ncb-ind) { // E+F doesn't contain all coded bits
memcpy((void*)(e+Foffset-ind),(void*)(w+Foffset+F),E-Foffset+ind);
k=E;
}
else {
......@@ -375,11 +375,12 @@ int nr_rate_matching_ldpc(uint8_t Ilbrm,
}
else {
if (E + F <= Ncb-ind) { //E+F doesn't contain all coded bits
memcpy((void*)(e+Foffset-ind),(void*)(w+Foffset+F-ind),E-Foffset+ind);
memcpy((void*)(e),(void*)(w+ind),E);
k=E;
}
else {
memcpy((void*)(e),(void*)(w+ind),Ncb-ind);
k=Ncb-ind;
}
}
......
......@@ -176,6 +176,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
}
uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
nr_gold_pusch(gNB, &Nid_pusch[0]);
/// Transport init necessary for NR synchro
......@@ -503,6 +504,12 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
LOG_I(PHY, "Initialise nr transport\n");
uint16_t grid_size = cfg->carrier_config.dl_grid_size[fp->numerology_index].value;
for (i=0; i<NUMBER_OF_NR_PUCCH_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for PUCCH %d/%d\n",i,NUMBER_OF_NR_PUCCH_MAX);
gNB->pucch[i] = new_gNB_pucch();
AssertFatal(gNB->pucch[i]!=NULL,"Can't initialize pucch %d \n", i);
}
for (i=0; i<NUMBER_OF_NR_DLSCH_MAX; i++) {
LOG_I(PHY,"Allocating Transport Channel Buffers for DLSCH %d/%d\n",i,NUMBER_OF_NR_DLSCH_MAX);
......
......@@ -113,8 +113,8 @@ int nr_phy_init_RU(RU_t *ru) {
ru->prach_rxsigF = (int16_t**)malloc(ru->nb_rx * sizeof(int16_t*));
for (i=0; i<ru->nb_rx; i++) {
// for preamble format 1 and 2, more memory should be allocated
ru->prach_rxsigF[i] = (int16_t*)malloc16_clear( fp->ofdm_symbol_size*12*(1<<mu)*2*sizeof(int16_t) );
// largest size for PRACH FFT is 4x98304 (16*24576)
ru->prach_rxsigF[i] = (int16_t*)malloc16_clear( 4*98304*2*sizeof(int16_t) );
LOG_D(PHY,"[INIT] prach_vars->rxsigF[%d] = %p\n",i,ru->prach_rxsigF[i]);
}
......
......@@ -34,6 +34,8 @@ void nr_modulation(uint32_t *in,
offset = (mod_order==2)? NR_MOD_TABLE_QPSK_OFFSET : (mod_order==4)? NR_MOD_TABLE_QAM16_OFFSET : \
(mod_order==6)? NR_MOD_TABLE_QAM64_OFFSET: (mod_order==8)? NR_MOD_TABLE_QAM256_OFFSET : 0;
LOG_D(PHY,"nr_modulation: length %d, mod_order %d\n",length,mod_order);
for (int i=0; i<length/mod_order; i++)
{
idx = 0;
......
......@@ -465,6 +465,8 @@ int nr_slot_fep_ul(NR_DL_FRAME_PARMS *frame_parms,
dft(dftsize,(int16_t *)&rxdata[rxdata_offset-sample_offset],
(int16_t *)&rxdataF[symbol * frame_parms->ofdm_symbol_size], 1);
// clear DC carrier from OFDM symbols
rxdataF[symbol * frame_parms->ofdm_symbol_size] = 0;
return(0);
}
......@@ -28,7 +28,7 @@
#include "PHY/NR_UE_ESTIMATION/filt16a_32.h"
//#define DEBUG_CH
//#define DEBUG_PUSCH
int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned char Ns,
......@@ -116,7 +116,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//------------------generate DMRS------------------//
if (pusch_pdu->transform_precoding) // if transform precoding is disabled
if (pusch_pdu->transform_precoding==1) // if transform precoding is disabled
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, pusch_pdu->rb_start*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
else
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch, 0, pusch_pdu->dmrs_config_type);
......@@ -132,8 +132,9 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
#ifdef DEBUG_PUSCH
printf("symbol_offset %d, nushift %d\n",symbol_offset,nushift);
printf("ch est pilot addr %p RB_DL %d\n",&pilot[0], gNB->frame_parms.N_RB_UL);
printf("k %d, first_carrier %d\n",k,gNB->frame_parms.first_carrier_offset);
printf("bwp_start_subcarrier %d, k %d, first_carrier %d\n",bwp_start_subcarrier,k,gNB->frame_parms.first_carrier_offset);
printf("rxF addr %p p %d\n", rxF,p);
printf("ul_ch addr %p nushift %d\n",ul_ch,nushift);
#endif
......@@ -148,7 +149,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
printf("data 0 : rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",rxF[2],rxF[3],&rxF[2],ch[0],ch[1],pil[0],pil[1]);
printf("data 0 : rxF - > (%d,%d)\n",rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fl,
......@@ -166,6 +167,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("data 1 : rxF - > (%d,%d)\n",rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fml,
ch,
......@@ -181,6 +183,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
printf("pilot 2 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("data 2 : rxF - > (%d,%d)\n",rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fmm,
ch,
......@@ -201,7 +204,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot 1 : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("pilot %d : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("data %d : rxF - > (%d,%d)\n",pilot_cnt,rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fml,
ch,
......@@ -217,6 +221,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("data %d : rxF - > (%d,%d)\n",pilot_cnt+1,rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fmm,
ch,
......@@ -238,6 +243,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("data %d : rxF - > (%d,%d)\n",pilot_cnt,rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fm,
ch,
......@@ -256,6 +262,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
#ifdef DEBUG_PUSCH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot %u: rxF - > (%d,%d) addr %p ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],&rxF[0],ch[0],ch[1],pil[0],pil[1]);
printf("data %d : rxF - > (%d,%d)\n",pilot_cnt+1,rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fmr,
ch,
......@@ -271,6 +278,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u: rxF - > (%d,%d) ch -> (%d,%d), pil -> (%d,%d) \n",pilot_cnt+2,rxF[0],rxF[1],ch[0],ch[1],pil[0],pil[1]);
printf("data %d : rxF - > (%d,%d)\n",pilot_cnt+2,rxF[2],rxF[3]);
#endif
multadd_real_vector_complex_scalar(fr,
ch,
......
......@@ -33,7 +33,32 @@
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
/***********************************************************************/
uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type) {
uint8_t delta;
uint16_t diff;
if (k>start_sc)
diff = k-start_sc;
else
diff = start_sc-k;
for (int i = 0; i<numDmrsCdmGrpsNoData; i++){
if (dmrs_type==NFAPI_NR_DMRS_TYPE1) {
delta = i;
if (((diff)%2) == delta)
return (0);
}
else {
delta = i<<1;
if ( (((diff)%6) == delta) || (((k-start_sc)%6) == (delta+1)) )
return (0);
}
}
return (1);
}
/*******************************************************************
......
......@@ -56,6 +56,11 @@ void lte_gold_new(LTE_DL_FRAME_PARMS *frame_parms, uint32_t lte_gold_table[20][2
void generate_dmrs_pbch(uint32_t dmrs_pbch_bitmap[DMRS_PBCH_I_SSB][DMRS_PBCH_N_HF][DMRS_BITMAP_SIZE], uint16_t Nid_cell);
uint16_t get_dmrs_freq_idx_ul(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t dmrs_type);
uint8_t allowed_xlsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
#undef EXTERN
#endif /* DMRS_NR_H */
......
......@@ -32,7 +32,7 @@
//#define NR_PBCH_DMRS_LENGTH_DWORD 5
//#define NR_PBCH_DMRS_LENGTH 144
//#define DEBUG_PDCCH
//#define DEBUG_PUSCH
#include "refsig_defs_ue.h"
#include "PHY/defs_nr_UE.h"
......
......@@ -155,7 +155,7 @@ void nr_pdcch_scrambling(uint32_t *in,
uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
nfapi_nr_ul_dci_request_pdus_t *ul_dci_pdu,
uint32_t **gold_pdcch_dmrs,
int32_t *txdataF,
int16_t amp,
......@@ -229,10 +229,11 @@ uint8_t nr_generate_dci_top(nfapi_nr_dl_tti_pdcch_pdu *pdcch_pdu,
/// DCI payload processing
// CRC attachment + Scrambling + Channel coding + Rate matching
uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
uint16_t n_RNTI = pdcch_pdu_rel15->dci_pdu.RNTI[d];
uint16_t Nid = pdcch_pdu_rel15->dci_pdu.ScramblingId[d];
uint16_t scrambling_RNTI = pdcch_pdu_rel15->dci_pdu.ScramblingRNTI[d];
t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE,
pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d],
pdcch_pdu_rel15->dci_pdu.AggregationLevel[d],
......
......@@ -212,7 +212,6 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
//uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[i];
int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->dci_pdu.RNTI[i],gNB,SEARCH_EXIST_OR_FREE);
if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->dci_pdu.RNTI[i],dlsch_id);
......@@ -220,7 +219,8 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
}
dlsch = gNB->dlsch[dlsch_id][0];
int harq_pid = 0;//extract_harq_pid(i,pdu_rel15);
int num_slots_tdd = (gNB->frame_parms.slots_per_frame)>>(7-gNB->gNB_config.tdd_table.tdd_period.value);
int harq_pid = slot % num_slots_tdd;
dlsch->slot_tx[slot] = 1;
dlsch->harq_ids[frame%2][slot] = harq_pid;
......
......@@ -34,6 +34,7 @@
#include "nr_dci.h"
#include "nr_sch_dmrs.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
//#define DEBUG_DLSCH
//#define DEBUG_DLSCH_MAPPING
......@@ -126,26 +127,29 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
time_stats_t *dlsch_interleaving_stats,
time_stats_t *dlsch_segmentation_stats) {
int harq_pid = 0;
int harq_pid = dlsch->harq_ids[frame%2][slot];
NR_DL_gNB_HARQ_t *harq = dlsch->harq_processes[harq_pid];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &harq->pdsch_pdu.pdsch_pdu_rel15;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
int16_t **mod_symbs = (int16_t**)dlsch->mod_symbs;
int16_t **tx_layers = (int16_t**)dlsch->txdataF;
int8_t Wf[2], Wt[2], l0, l_prime[2], delta;
uint8_t nodata_dmrs = 1;
uint8_t dmrs_Type = rel15->dmrsConfigType;
int nb_re_dmrs = (dmrs_Type== NFAPI_NR_DMRS_TYPE1) ? 6:4;
uint16_t n_dmrs = ((rel15->rbSize+rel15->rbStart)*nb_re_dmrs)<<1;
int16_t mod_dmrs[n_dmrs<<1];
int nb_re_dmrs;
uint16_t n_dmrs;
if (rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*rel15->numDmrsCdmGrpsNoData;
n_dmrs = ((rel15->rbSize+rel15->rbStart)*6)<<1;
}
else {
nb_re_dmrs = 4*rel15->numDmrsCdmGrpsNoData;
n_dmrs = ((rel15->rbSize+rel15->rbStart)*4)<<1;
}
uint16_t nb_re;
if (nodata_dmrs) // no data in dmrs symbol
nb_re = ((12*rel15->NrOfSymbols)-12-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
else
nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs-xOverhead)*rel15->rbSize*rel15->NrOfCodewords;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
int16_t mod_dmrs[n_dmrs<<1];
/// CRC, coding, interleaving and rate matching
AssertFatal(harq->pdu!=NULL,"harq->pdu is null\n");
......@@ -301,7 +305,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t *dlsch,
}
else {
if( (l != dmrs_symbol) || !nodata_dmrs) {
if( (l != dmrs_symbol) || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,rel15->numDmrsCdmGrpsNoData,dmrs_Type)) {
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (amp * tx_layers[ap][m<<1]) >> 15;
((int16_t*)txdataF[ap])[((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (amp * tx_layers[ap][(m<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
......
......@@ -335,12 +335,13 @@ int nr_dlsch_encoding(unsigned char *a,
uint32_t E;
uint8_t Ilbrm = 1;
uint32_t Tbslbrm = 950984; //max tbs
uint8_t nodata_dmrs = 1;
uint8_t nb_re_dmrs;
if (nodata_dmrs)
nb_re_dmrs = 12;
if (rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1)
nb_re_dmrs = 6*rel15->numDmrsCdmGrpsNoData;
else
nb_re_dmrs = rel15->dmrsConfigType==NFAPI_NR_DMRS_TYPE1 ? 6:4;
nb_re_dmrs = 4*rel15->numDmrsCdmGrpsNoData;
uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
uint16_t R=rel15->targetCodeRate[0];
float Coderate = 0.0;
......@@ -464,6 +465,9 @@ int nr_dlsch_encoding(unsigned char *a,
}
F = dlsch->harq_processes[harq_pid]->F;
Kr = dlsch->harq_processes[harq_pid]->K;
for (r=0; r<dlsch->harq_processes[harq_pid]->C; r++) {
if (F>0) {
......
......@@ -150,6 +150,7 @@ void rx_nr_prach_ru(RU_t *ru,
int16_t **rxsigF=NULL;
NR_DL_FRAME_PARMS *fp=ru->nr_frame_parms;
int slot2=slot;
int16_t *prach[ru->nb_rx];
int prach_sequence_length = ru->config.prach_config.prach_sequence_length.value;
......@@ -159,8 +160,11 @@ void rx_nr_prach_ru(RU_t *ru,
rxsigF = ru->prach_rxsigF;
AssertFatal(ru->if_south == LOCAL_RF,"we shouldn't call this if if_south != LOCAL_RF\n");
for (int aa=0; aa<ru->nb_rx; aa++)
prach[aa] = (int16_t*)&ru->common.rxdata[aa][(slot*fp->get_samples_per_slot(slot,fp))-ru->N_TA_offset];
for (int aa=0; aa<ru->nb_rx; aa++){
if (prach_sequence_length == 0) slot2=(slot/fp->slots_per_subframe)*fp->slots_per_subframe;
prach[aa] = (int16_t*)&ru->common.rxdata[aa][(slot2*fp->get_samples_per_slot(slot,fp))-ru->N_TA_offset];
}
int dftlen=0;
int mu = fp->numerology_index;
......@@ -169,7 +173,7 @@ void rx_nr_prach_ru(RU_t *ru,
if (prach_sequence_length == 0) {
LOG_D(PHY,"PRACH (ru %d) in %d.%d, format %d, msg1_frequencyStart %d\n",
ru->idx,frame,slot,prachFormat,msg1_frequencystart);
ru->idx,frame,slot2,prachFormat,msg1_frequencystart);
AssertFatal(prachFormat<4,"Illegal prach format %d for length 839\n",prachFormat);
switch (prachFormat) {
case 0:
......@@ -282,7 +286,7 @@ void rx_nr_prach_ru(RU_t *ru,
dft(DFT_49152,prach2,rxsigF[aa],1);
}
if (prachFormat == 1 || prachFormat == 2) {
dft(DFT_49152,prach2+98304,rxsigF[aa]+98304,1);
dft(DFT_49152,prach2+98304,rxsigF[aa]+98304,1);
reps++;
}
if (prachFormat == 2) {
......@@ -348,7 +352,7 @@ void rx_nr_prach_ru(RU_t *ru,
reps+=2;
}
if (prachFormat == 3) {
dftlen=9216;
dftlen=9216;
for (int i=0;i<4;i++) dft(DFT_9216,prach2+(i*9216*2),rxsigF[aa]+(i*9216*2),1);
reps=4;
}
......@@ -358,7 +362,7 @@ void rx_nr_prach_ru(RU_t *ru,
(mu==1 && prachStartSymbol == 0)) prach2+=48; // 24 samples @ 46.08 Ms/s in first symbol of each half subframe (15/30 kHz only)
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=1536;
dftlen=1536;
dft(DFT_1536,prach2,rxsigF[aa],1);
if (prachFormat != 7) {
dft(DFT_1536,prach2+3072,rxsigF[aa]+3072,1);
......@@ -366,13 +370,13 @@ void rx_nr_prach_ru(RU_t *ru,
}
if (prachFormat == 1 || prachFormat == 2 || prachFormat == 4 || prachFormat == 5 || prachFormat == 6 || prachFormat == 8) {
dft(DFT_1536,prach2+3072*2,rxsigF[aa]+3072*2,1);
dft(DFT_1536,prach2+3072*3,rxsigF[aa]+3072*3,1);
dft(DFT_1536,prach2+3072*2,rxsigF[aa]+3072*2,1);
dft(DFT_1536,prach2+3072*3,rxsigF[aa]+3072*3,1);
reps+=2;
}
if (prachFormat == 2 || prachFormat == 5 || prachFormat == 6) {
dft(DFT_1536,prach2+3072*4,rxsigF[aa]+3072*4,1);
dft(DFT_1536,prach2+3072*5,rxsigF[aa]+3072*5,1);
dft(DFT_1536,prach2+3072*4,rxsigF[aa]+3072*4,1);
dft(DFT_1536,prach2+3072*5,rxsigF[aa]+3072*5,1);
reps+=2;
}
if (prachFormat == 6) {
......@@ -418,7 +422,7 @@ void rx_nr_prach_ru(RU_t *ru,
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=4096;
dftlen=4096;
dft(DFT_4096,prach2,rxsigF[aa],1);
if (prachFormat != 7) { //!=C0
dft(DFT_4096,prach2+8192,rxsigF[aa]+8192,1);
......@@ -470,7 +474,7 @@ void rx_nr_prach_ru(RU_t *ru,
if (mu==0) AssertFatal(1==0,"Shouldn't get here\n");
else if (mu==1) {
dftlen=3072;
dftlen=3072;
dft(DFT_3072,prach2,rxsigF[aa],1);
if (prachFormat != 7) { //!=C0
dft(DFT_3072,prach2+6144,rxsigF[aa]+6144,1);
......@@ -500,6 +504,7 @@ void rx_nr_prach_ru(RU_t *ru,
}
//Coherent combining of PRACH repetitions (assumes channel does not change, to be revisted for "long" PRACH)
LOG_D(PHY,"Doing PRACH combining of %d reptitions N_ZC %d\n",reps,N_ZC);
int16_t rxsigF_tmp[N_ZC<<1];
// if (k+N_ZC > dftlen) { // PRACH signal is split around DC
int16_t *rxsigF2=rxsigF[aa];
......@@ -578,9 +583,6 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
restricted_set = cfg->restricted_set_config.value;
AssertFatal(prach_sequence_length == 1, "no support yet for long prachSequenceLength\n");
uint8_t prach_fmt = prach_pdu->prach_format;
uint16_t N_ZC = (prach_sequence_length==0)?839:139;
......@@ -592,13 +594,8 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
if ((frame&1023) < 20) LOG_D(PHY,"PRACH (gNB) : running rx_prach for subframe %d, msg1_frequencystart %d, rootSequenceIndex %d\n", subframe,msg1_frequencystart,rootSequenceIndex);
}
start_meas(&gNB->rx_prach);
prach_root_sequence_map = (cfg->prach_sequence_length.value==0) ? prach_root_sequence_map_0_3 : prach_root_sequence_map_abc;
// PDP is oversampled, e.g. 1024 sample instead of 839
......@@ -619,7 +616,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
if (LOG_DEBUGFLAG(PRACH)){
int en = dB_fixed(signal_energy((int32_t*)&rxsigF[0][0],(N_ZC==839) ? 840: 140));
if (en>60) LOG_I(PHY,"frame %d, subframe %d : Trying preamble %d \n",frame,subframe,preamble_index);
if (en>60) LOG_D(PHY,"frame %d, subframe %d : Trying preamble %d \n",frame,subframe,preamble_index);
}
if (restricted_set == 0) {
// This is the relative offset in the root sequence table (5.7.2-4 from 36.211) for the given preamble index
......@@ -745,22 +742,22 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
prach_ifft[i] += ((int32_t)prach_ifft_tmp[i<<1]*(int32_t)prach_ifft_tmp[(i<<1)] + (int32_t)prach_ifft_tmp[1+(i<<1)]*(int32_t)prach_ifft_tmp[1+(i<<1)])>>10;
}
if (LOG_DUMPFLAG(PRACH)) {
if (LOG_DUMPFLAG(PRACH)) {
if (aa==0) LOG_M("prach_rxF_comp0.m","prach_rxF_comp0",prachF,1024,1,1);
if (aa==1) LOG_M("prach_rxF_comp1.m","prach_rxF_comp1",prachF,1024,1,1);
}
}
}// antennas_rx
} // new dft
// check energy in nth time shift, for
preamble_shift2 = ((preamble_shift==0) ? 0 : ((preamble_shift<<log2_ifft_size)/N_ZC));
for (i=0; i<NCS2; i++) {
lev = (int32_t)prach_ifft[(preamble_shift2+i)];
levdB = dB_fixed_times10(lev);
if (levdB>*max_preamble_energy) {
LOG_D(PHY,"preamble_index %d, delay %d en %d dB > %d dB\n",preamble_index,i,levdB,*max_preamble_energy);
*max_preamble_energy = levdB;
*max_preamble_delay = i; // Note: This has to be normalized to the 30.72 Ms/s sampling rate
*max_preamble = preamble_index;
......@@ -795,7 +792,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
if (LOG_DUMPFLAG(PRACH)) {
int en = dB_fixed(signal_energy((int32_t*)&rxsigF[0][0],840));
if (en>60) {
// if (en>60) {
int k = (12*n_ra_prb) - 6*fp->N_RB_UL;
if (k<0) k+=fp->ofdm_symbol_size;
......@@ -809,7 +806,7 @@ void rx_nr_prach(PHY_VARS_gNB *gNB,
LOG_M("prach_rxF_comp0.m","prach_rxF_comp0",prachF,1024,1,1);
LOG_M("Xu.m","xu",Xu,N_ZC,1,1);
LOG_M("prach_ifft0.m","prach_t0",prach_ifft,1024,1,1);
}
// }
} /* LOG_DUMPFLAG(PRACH) */
stop_meas(&gNB->rx_prach);
......
......@@ -139,7 +139,7 @@ void compute_nr_prach_seq(uint8_t short_sequence,
}
u = prach_root_sequence_map[index];
LOG_D(PHY,"prach index %d => u=%d\n",index,u);
inv_u = nr_ZC_inv[u]; // multiplicative inverse of u
......
......@@ -50,4 +50,4 @@ uint16_t get_dmrs_freq_idx(uint16_t n, uint8_t k_prime, uint8_t delta, uint8_t d
uint8_t get_l0(uint16_t dlDmrsSymbPos);
#endif
\ No newline at end of file
#endif
......@@ -137,12 +137,12 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
@param symbol Symbol on which to act (within-in nr_TTI_rx)
@param harq_pid HARQ process ID
*/
void nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t UE_id,
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char harq_pid);
int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t UE_id,
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char harq_pid);
/** \brief This function performs RB extraction (signal and channel estimates) (currently signal only until channel estimation and compensation are implemented)
@param rxdataF pointer to the received frequency domain signal
......@@ -309,10 +309,24 @@ void nr_fill_prach_ru(RU_t *ru,
int16_t find_nr_prach(PHY_VARS_gNB *gNB,int frame,int slot, int numRA, find_type_t type);
int16_t find_nr_prach_ru(RU_t *ru,int frame,int slot, find_type_t type);
NR_gNB_PUCCH_t *new_gNB_pucch(void);
void nr_fill_pucch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_pucch_pdu_t *pucch_pdu);
int nr_find_pucch(uint16_t rnti,
int frame,
int slot,
PHY_VARS_gNB *gNB);
void init_prach_list(PHY_VARS_gNB *gNB);
void init_prach_ru_list(RU_t *ru);
void free_nr_ru_prach_entry(RU_t *ru, int prach_id);
void nr_decode_pucch1(int32_t **rxdataF,
pucch_GroupHopping_t pucch_GroupHopping,
uint32_t n_id, // hoppingID higher layer parameter
......
......@@ -527,7 +527,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
#ifdef DEBUG_ULSCH_DECODING
if (r==0) {
write_output("decoder_llr.m","decllr",ulsch_llr,G,1,0);
write_output("decoder_in.m","dec",&harq_process->d[0][0],(3*8*Kr_bytes)+12,1,0);
write_output("decoder_in.m","dec",&harq_process->d[0][0],E,1,0);
}
printf("decoder input(segment %u) :", r);
......@@ -608,7 +608,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
#endif
ret = ulsch->max_ldpc_iterations + 1;
}
nb_total_decod++;
if (no_iteration_ldpc > ulsch->max_ldpc_iterations){
......
......@@ -283,6 +283,7 @@ void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
is_dmrs_re = 0;
if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
K_ptrs = (pusch_pdu->pusch_ptrs.ptrs_freq_density)?4:2;
if(is_ptrs_symbol(symbol, pusch_vars->ptrs_symbols))
is_ptrs_symbol_flag = is_ptrs_subcarrier((start_re + re) % frame_parms->ofdm_symbol_size,
n_rnti,
......@@ -1009,12 +1010,12 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
}
void nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t UE_id,
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char harq_pid)
int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t ulsch_id,
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
unsigned char harq_pid)
{
uint8_t aarx, aatx, dmrs_symbol_flag; // dmrs_symbol_flag, a flag to indicate DMRS REs in current symbol
......@@ -1023,22 +1024,21 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
int avgs;
int avg[4];
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[UE_id][0]->harq_processes[harq_pid]->ulsch_pdu;
uint8_t nodata_dmrs = 1; // FIXME to be properly configured from fapi
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu;
dmrs_symbol_flag = 0;
gNB->pusch_vars[UE_id]->ptrs_sc_per_ofdm_symbol = 0;
gNB->pusch_vars[ulsch_id]->ptrs_sc_per_ofdm_symbol = 0;
if(symbol == rel15_ul->start_symbol_index){
gNB->pusch_vars[UE_id]->rxdataF_ext_offset = 0;
gNB->pusch_vars[UE_id]->dmrs_symbol = 0;
gNB->pusch_vars[UE_id]->cl_done = 0;
gNB->pusch_vars[UE_id]->ptrs_symbols = 0;
gNB->pusch_vars[ulsch_id]->rxdataF_ext_offset = 0;
gNB->pusch_vars[ulsch_id]->dmrs_symbol = 0;
gNB->pusch_vars[ulsch_id]->cl_done = 0;
gNB->pusch_vars[ulsch_id]->ptrs_symbols = 0;
if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) { // if there is ptrs pdu
L_ptrs = 1<<(rel15_ul->pusch_ptrs.ptrs_time_density);
set_ptrs_symb_idx(&gNB->pusch_vars[UE_id]->ptrs_symbols,
set_ptrs_symb_idx(&gNB->pusch_vars[ulsch_id]->ptrs_symbols,
rel15_ul->nr_of_symbols,
rel15_ul->start_symbol_index,
L_ptrs,
......@@ -1053,18 +1053,23 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
if (dmrs_symbol_flag == 1){
if (((rel15_ul->ul_dmrs_symb_pos)>>((symbol+1)%frame_parms->symbols_per_slot))&0x01)
AssertFatal(1==0,"Double DMRS configuration is not yet supported\n");
if (nodata_dmrs)
nb_re_pusch = 0;
else
nb_re_pusch = rel15_ul->rb_size * ((rel15_ul->dmrs_config_type==pusch_dmrs_type1)?6:8);
gNB->pusch_vars[UE_id]->dmrs_symbol = symbol;
if (rel15_ul->dmrs_config_type == 0) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
nb_re_pusch = rel15_ul->rb_size *(12 - (rel15_ul->num_dmrs_cdm_grps_no_data*6));
}
else {
nb_re_pusch = rel15_ul->rb_size *(12 - (rel15_ul->num_dmrs_cdm_grps_no_data*4));
}
gNB->pusch_vars[ulsch_id]->dmrs_symbol = symbol;
} else {
nb_re_pusch = rel15_ul->rb_size * NR_NB_SC_PER_RB;
}
if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) { // if there is ptrs pdu
if(is_ptrs_symbol(symbol, gNB->pusch_vars[UE_id]->ptrs_symbols))
gNB->pusch_vars[UE_id]->ptrs_symbol_index = symbol;
if(is_ptrs_symbol(symbol, gNB->pusch_vars[ulsch_id]->ptrs_symbols))
gNB->pusch_vars[ulsch_id]->ptrs_symbol_index = symbol;
}
......@@ -1088,25 +1093,25 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
start_meas(&gNB->ulsch_rbs_extraction_stats);
nr_ulsch_extract_rbs_single(gNB->common_vars.rxdataF,
gNB->pusch_vars[UE_id],
gNB->pusch_vars[ulsch_id],
symbol,
dmrs_symbol_flag,
rel15_ul,
frame_parms);
stop_meas(&gNB->ulsch_rbs_extraction_stats);
nr_ulsch_scale_channel(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
nr_ulsch_scale_channel(gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
frame_parms,
gNB->ulsch[UE_id],
gNB->ulsch[ulsch_id],
symbol,
dmrs_symbol_flag,
rel15_ul->rb_size,
rel15_ul->dmrs_config_type);
if (gNB->pusch_vars[UE_id]->cl_done==0) {
if (gNB->pusch_vars[ulsch_id]->cl_done==0) {
nr_ulsch_channel_level(gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
nr_ulsch_channel_level(gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
frame_parms,
avg,
symbol,
......@@ -1119,38 +1124,44 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
gNB->pusch_vars[UE_id]->log2_maxh = (log2_approx(avgs)/2)+1;
gNB->pusch_vars[UE_id]->cl_done = 1;
gNB->pusch_vars[ulsch_id]->log2_maxh = (log2_approx(avgs)/2)+1;
gNB->pusch_vars[ulsch_id]->cl_done = 1;
}
start_meas(&gNB->ulsch_channel_compensation_stats);
nr_ulsch_channel_compensation(gNB->pusch_vars[UE_id]->rxdataF_ext,
gNB->pusch_vars[UE_id]->ul_ch_estimates_ext,
gNB->pusch_vars[UE_id]->ul_ch_mag0,
gNB->pusch_vars[UE_id]->ul_ch_magb0,
gNB->pusch_vars[UE_id]->rxdataF_comp,
(frame_parms->nb_antennas_tx>1) ? gNB->pusch_vars[UE_id]->rho : NULL,
nr_ulsch_channel_compensation(gNB->pusch_vars[ulsch_id]->rxdataF_ext,
gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
gNB->pusch_vars[ulsch_id]->rxdataF_comp,
(frame_parms->nb_antennas_tx>1) ? gNB->pusch_vars[ulsch_id]->rho : NULL,
frame_parms,
symbol,
dmrs_symbol_flag,
rel15_ul->qam_mod_order,
rel15_ul->rb_size,
gNB->pusch_vars[UE_id]->log2_maxh);
gNB->pusch_vars[ulsch_id]->log2_maxh);
stop_meas(&gNB->ulsch_channel_compensation_stats);
int rxsig = signal_energy(&gNB->pusch_vars[ulsch_id]->rxdataF_comp[0][(symbol*rel15_ul->rb_size*12)],
rel15_ul->rb_size*12);
if (rxsig==1) return (rxsig);
#ifdef NR_SC_FDMA
nr_idft(&((uint32_t*)gNB->pusch_vars[UE_id]->rxdataF_ext[0])[symbol * rel15_ul->rb_size * NR_NB_SC_PER_RB], nb_re_pusch);
nr_idft(&((uint32_t*)gNB->pusch_vars[ulsch_id]->rxdataF_ext[0])[symbol * rel15_ul->rb_size * NR_NB_SC_PER_RB], nb_re_pusch);
#endif
//----------------------------------------------------------
//-------------------- LLRs computation --------------------
//----------------------------------------------------------
start_meas(&gNB->ulsch_llr_stats);
AssertFatal(gNB->pusch_vars[UE_id]->rxdataF_ext_offset * rel15_ul->qam_mod_order+nb_re_pusch*rel15_ul->qam_mod_order < (8*((3*8*6144)+12)) , "Mysterious llr buffer size check");
nr_ulsch_compute_llr(&gNB->pusch_vars[UE_id]->rxdataF_comp[0][symbol * rel15_ul->rb_size * NR_NB_SC_PER_RB],
gNB->pusch_vars[UE_id]->ul_ch_mag0,
gNB->pusch_vars[UE_id]->ul_ch_magb0,
&gNB->pusch_vars[UE_id]->llr[gNB->pusch_vars[UE_id]->rxdataF_ext_offset * rel15_ul->qam_mod_order],
AssertFatal(gNB->pusch_vars[ulsch_id]->rxdataF_ext_offset * rel15_ul->qam_mod_order+nb_re_pusch*rel15_ul->qam_mod_order < (8*((3*8*6144)+12)) , "Mysterious llr buffer size check");
nr_ulsch_compute_llr(&gNB->pusch_vars[ulsch_id]->rxdataF_comp[0][symbol * rel15_ul->rb_size * NR_NB_SC_PER_RB],
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
&gNB->pusch_vars[ulsch_id]->llr[gNB->pusch_vars[ulsch_id]->rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
nb_re_pusch,
symbol,
......@@ -1159,6 +1170,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
}
gNB->pusch_vars[UE_id]->rxdataF_ext_offset = gNB->pusch_vars[UE_id]->rxdataF_ext_offset + nb_re_pusch;
gNB->pusch_vars[ulsch_id]->rxdataF_ext_offset = gNB->pusch_vars[ulsch_id]->rxdataF_ext_offset + nb_re_pusch;
return (0);
}
......@@ -52,6 +52,54 @@
//#define DEBUG_NR_PUCCH_RX 1
NR_gNB_PUCCH_t *new_gNB_pucch(void){
NR_gNB_PUCCH_t *pucch;
pucch = (NR_gNB_PUCCH_t *)malloc16(sizeof(NR_gNB_PUCCH_t));
pucch->active = 0;
return (pucch);
}
int nr_find_pucch(uint16_t rnti,
int frame,
int slot,
PHY_VARS_gNB *gNB) {
AssertFatal(gNB!=NULL,"gNB is null\n");
int index = -1;
for (int i=0; i<NUMBER_OF_NR_ULSCH_MAX; i++) {
AssertFatal(gNB->pucch[i]!=NULL,"gNB->pucch[%d] is null\n",i);
if ((gNB->pucch[i]->active >0) &&
(gNB->pucch[i]->pucch_pdu.rnti==rnti) &&
(gNB->pucch[i]->frame==frame) &&
(gNB->pucch[i]->slot==slot)) return(i);
else if ((gNB->pucch[i]->active == 0) && (index==-1)) index=i;
}
if (index==-1)
LOG_E(MAC,"PUCCH list is full\n");
return(index);
}
void nr_fill_pucch(PHY_VARS_gNB *gNB,
int frame,
int slot,
nfapi_nr_pucch_pdu_t *pucch_pdu) {
int id = nr_find_pucch(pucch_pdu->rnti,frame,slot,gNB);
AssertFatal( (id>=0) && (id<NUMBER_OF_NR_PUCCH_MAX),
"invalid id found for pucch !!! rnti %04x id %d\n",pucch_pdu->rnti,id);
NR_gNB_PUCCH_t *pucch = gNB->pucch[id];
pucch->frame = frame;
pucch->slot = slot;
pucch->active = 1;
memcpy((void*)&pucch->pucch_pdu, (void*)pucch_pdu, sizeof(nfapi_nr_pucch_pdu_t));
}
int get_pucch0_cs_lut_index(PHY_VARS_gNB *gNB,nfapi_nr_pucch_pdu_t* pucch_pdu) {
int i=0;
......@@ -319,9 +367,9 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uint8_t xrtmag_dB = dB_fixed(xrtmag);
#ifdef DEBUG_NR_PUCCH_RX
//#ifdef DEBUG_NR_PUCCH_RX
printf("PUCCH 0 : maxpos %d\n",maxpos);
#endif
//#endif
index=maxpos;
#endif
......@@ -361,8 +409,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->harq_confidence_level = xrtmag_dB-(gNB->measurements.n0_subband_power_tot_dB[pucch_pdu->prb_start]+gNB->pucch0_thres);
uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2);
uci_pdu->harq->harq_list[0].harq_value = index&0x01;
uci_pdu->harq->harq_list[1].harq_value = (index>>1)&0x01;
uci_pdu->harq->harq_list[1].harq_value = index&0x01;
uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01;
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
......
......@@ -32,6 +32,7 @@
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "PHY/defs_nr_UE.h"
#include "SCHED_NR_UE/harq_nr.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/coding_defs.h"
......@@ -133,6 +134,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
memset(dlsch,0,sizeof(NR_UE_DLSCH_t));
dlsch->Kmimo = Kmimo;
dlsch->Mdlharq = Mdlharq;
dlsch->number_harq_processes_for_pdsch = Mdlharq;
dlsch->Nsoft = Nsoft;
dlsch->Mlimit = 4;
dlsch->max_ldpc_iterations = max_ldpc_iterations;
......@@ -143,6 +145,7 @@ NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint
if (dlsch->harq_processes[i]) {
memset(dlsch->harq_processes[i],0,sizeof(NR_DL_UE_HARQ_t));
init_downlink_harq_status(dlsch->harq_processes[i]);
dlsch->harq_processes[i]->first_tx=1;
dlsch->harq_processes[i]->b = (uint8_t*)malloc16(dlsch_bytes);
......@@ -264,7 +267,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint8_t dmrs_Type = harq_process->dmrsConfigType;
AssertFatal(dmrs_Type == 1 || dmrs_Type == 2,"Illegal dmrs_type %d\n",dmrs_Type);
uint8_t nb_re_dmrs = 12;//(dmrs_Type==1)?6:4;
uint8_t nb_re_dmrs = (dmrs_Type==1)?6:4; // should be changed based on MAC parameters
uint16_t dmrs_length = get_num_dmrs(harq_process->dlDmrsSymbPos);
AssertFatal(dmrs_length == 1 || dmrs_length == 2,"Illegal dmrs_length %d\n",dmrs_length);
......
......@@ -42,7 +42,7 @@
#include "T.h"
#define NR_PRACH_DEBUG 1
//#define NR_PRACH_DEBUG 1
extern uint16_t NCS_unrestricted_delta_f_RA_125[16];
extern uint16_t NCS_restricted_TypeA_delta_f_RA_125[15];
......@@ -59,6 +59,7 @@ extern int64_t table_6_3_3_2_4_prachConfig_Index [256][10];
extern uint16_t nr_du[838];
extern int16_t nr_ru[2*839];
extern const char *prachfmt[9];
extern const char *prachfmt03[4];
// Note:
// - prach_fmt_id is an ID used to map to the corresponding PRACH format value in prachfmt
......@@ -78,6 +79,7 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
uint16_t rootSequenceIndex, prach_fmt_id, NCS, *prach_root_sequence_map, preamble_offset = 0;
uint16_t preamble_shift = 0, preamble_index0, n_shift_ra, n_shift_ra_bar, d_start, numshift, N_ZC, u, offset, offset2, first_nonzero_root_idx;
int16_t prach_tmp[98304*2*4] __attribute__((aligned(32)));
int16_t Ncp = 0, amp, *prach, *prach2, *prachF, *Xu;
int32_t Xu_re, Xu_im, samp_count;
int prach_start, prach_sequence_length, i, prach_len, dftlen, mu, kbar, K, n_ra_prb, k;
......@@ -207,9 +209,9 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
#ifdef NR_PRACH_DEBUG
if (NCS>0)
LOG_I(PHY, "PRACH [UE %d] generate PRACH for RootSeqIndex %d, Preamble Index %d, PRACH Format %s, NCS %d (N_ZC %d): Preamble_offset %d, Preamble_shift %d\n", Mod_id,
rootSequenceIndex,
preamble_index,
prachfmt[prach_fmt_id],
rootSequenceIndex,
preamble_index,
prach_sequence_length == 0 ? prachfmt03[prach_fmt_id] : prachfmt[prach_fmt_id],
NCS,
N_ZC,
preamble_offset,
......@@ -557,7 +559,6 @@ int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint8_t slot){
Ncp+=24; // This assumes we are transmitting starting in symbol 0 of a PRACH slot, 30 kHz, full sampling
prach2 = prach+(Ncp<<1);
idft(IDFT_1536,prachF,prach2,1);
// here we have |empty | Prach1536 |
if (prach_fmt_id != 7) {
memmove(prach2+(1536<<1),prach2,(1536<<2));
......
......@@ -1387,8 +1387,10 @@ void ulsch_modulation(int32_t **txdataF,
NR_UE_ULSCH_t *ulsch);
uint8_t allowed_ulsch_re_in_dmrs_symbol(uint16_t k,
uint16_t start_sc,
uint8_t numDmrsCdmGrpsNoData,
uint8_t dmrs_type);
int generate_ue_dlsch_params_from_dci(int frame,
......
......@@ -44,6 +44,7 @@
#include "openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h"
// structures below implement 36-211 and 36-212
/** @addtogroup _PHY_TRANSPORT_
......
......@@ -98,6 +98,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t thread_id,
int gNB_id) {
LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot);
uint32_t available_bits;
uint8_t mod_order, cwd_index, num_of_codewords, l;
uint32_t scrambled_output[NR_MAX_NB_CODEWORDS][NR_MAX_PDSCH_ENCODED_LENGTH>>5];
......@@ -113,7 +115,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint16_t ul_dmrs_symb_pos;
uint8_t L_ptrs, K_ptrs; // PTRS parameters
uint16_t beta_ptrs; // PTRS parameter related to power control
uint8_t no_data_in_dmrs = 1;
NR_UE_ULSCH_t *ulsch_ue;
NR_UL_UE_HARQ_t *harq_process_ul_ue=NULL;
......@@ -126,7 +127,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
number_dmrs_symbols = 0;
for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) {
ulsch_ue = UE->ulsch[thread_id][gNB_id][cwd_index];
......@@ -147,10 +147,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
rnti = harq_process_ul_ue->pusch_pdu.rnti;
ulsch_ue->Nid_cell = Nid_cell;
if(no_data_in_dmrs)
nb_dmrs_re_per_rb = 12;
else
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4);
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*harq_process_ul_ue->pusch_pdu.num_dmrs_cdm_grps_no_data;
N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh;
......@@ -321,7 +318,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t k_prime=0;
uint8_t is_dmrs, is_ptrs;
uint8_t is_dmrs, is_ptrs, is_dmrs_symbol;
uint16_t m=0, n=0, dmrs_idx=0, ptrs_idx = 0;
for (l=start_symbol; l<start_symbol+number_of_symbols; l++) {
......@@ -336,8 +333,10 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
is_dmrs = 0;
is_ptrs = 0;
is_dmrs_symbol = 0;
if((ul_dmrs_symb_pos >> l) & 0x01) {
is_dmrs_symbol = 1;
if (k == ((start_sc+get_dmrs_freq_idx_ul(n, k_prime, delta, dmrs_type))%frame_parms->ofdm_symbol_size))
is_dmrs = 1;
}
......@@ -388,7 +387,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
ptrs_idx++;
} else if (((ul_dmrs_symb_pos >> l) & 0x01) == 0) {
} else if (!is_dmrs_symbol || allowed_xlsch_re_in_dmrs_symbol(k,start_sc,harq_process_ul_ue->pusch_pdu.num_dmrs_cdm_grps_no_data,dmrs_type)) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) ulsch_ue->y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) ulsch_ue->y)[(m<<1) + 1];
......
......@@ -54,7 +54,8 @@
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
uint8_t m0,
......@@ -111,7 +112,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
// if frequency hopping is enabled n_hop = 1 for second hop. Not sure frequency hopping concerns format 0. FIXME!!!
// if ((PUCCH_Frequency_Hopping == 1)&&(l == (nrofSymbols-1))) n_hop = 1;
nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l);
......
......@@ -49,7 +49,8 @@
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
long pucch_GroupHopping,
long hoppingId,
int16_t amp,
int nr_tti_tx,
uint8_t m0,
......
lte_dfts_sse4: lte_dfts.c
gcc-7 -O3 -std=gnu99 -msse4.1 -o lte_dfts_sse4 lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
oai_dfts_sse4: oai_dfts.c
gcc-7 -O3 -std=gnu99 -msse4.1 -o oai_dfts_sse4 oai_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR_TARGETS/COMMON -I$$OPENAIR_TARGETS/ARCH/COMMON -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -I$$OPENAIR_HOME/common/utils/msc -I$$OPENAIR_HOME/nfapi/open-nFAPI/nfapi/public_inc -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
lte_dfts_avx2: lte_dfts.c
gcc -O2 -std=gnu99 -mavx2 -g -ggdb -o lte_dfts_avx2 lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
oai_dfts_avx2: oai_dfts.c
gcc -O2 -std=gnu99 -mavx2 -g -ggdb -o oai_dfts_avx2 oai_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR_TARGETS/COMMON -I$$OPENAIR_TARGETS/ARCH/COMMON -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -I$$OPENAIR_HOME/common/utils/msc -I$$OPENAIR_HOME/nfapi/open-nFAPI/nfapi/public_inc -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
lte_dfts_avx2.s: lte_dfts.c
gcc -O2 -std=gnu99 -mavx2 -S lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
oai_dfts_avx2.s: oai_dfts.c
gcc -O2 -std=gnu99 -mavx2 -S oai_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR_TARGETS/COMMON -I$$OPENAIR_TARGETS/ARCH/COMMON -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -I$$OPENAIR_HOME/common/utils/msc -I$$OPENAIR_HOME/nfapi/open-nFAPI/nfapi/public_inc -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
lte_dfts_sse4.s: lte_dfts.c
gcc -O2 -std=gnu99 -msse4.1 -S lte_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
oai_dfts_sse4.s: oai_dfts.c
gcc -O2 -std=gnu99 -msse4.1 -S oai_dfts.c time_meas.c ../../SIMULATION/TOOLS/taus.c $$OPENAIR_HOME/common/utils/backtrace.c -I$$OPENAIR_HOME -I$$OPENAIR1_DIR -I$$OPENAIR_TARGETS -I$$OPENAIR_TARGETS/COMMON -I$$OPENAIR_TARGETS/ARCH/COMMON -I$$OPENAIR2_DIR -I$$OPENAIR2_DIR/COMMON -I$$OPENAIR_HOME/common/utils -I$$OPENAIR_HOME/common/utils/T -I$$OPENAIR_HOME/common/utils/msc -I$$OPENAIR_HOME/nfapi/open-nFAPI/nfapi/public_inc -DMR_MAIN -DNB_ANTENNAS_RX=1 -lm -lpthread # -DD256STATS #-DD64STATS
dft_cycles_avx2: lte_dfts_avx2
./lte_dfts_avx2 | egrep cycles
dft_cycles_avx2: oai_dfts_avx2
./oai_dfts_avx2 | egrep cycles
This diff is collapsed.
......@@ -183,10 +183,6 @@ This function performs optimized fixed-point radix-2 FFT/IFFT.
#ifdef OAIDFTS_MAIN
typedef void(*adftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
typedef void(*aidftfunc_t)(int16_t *sigF,int16_t *sig,unsigned char scale_flag);
......
......@@ -340,6 +340,15 @@ typedef struct {
uint16_t cba_rnti[NUM_MAX_CBA_GROUP];
} NR_gNB_ULSCH_t;
typedef struct {
uint8_t active;
/// Frame where current PUCCH pdu was sent
uint32_t frame;
/// Slot where current PUCCH pdu was sent
uint32_t slot;
/// ULSCH PDU
nfapi_nr_pucch_pdu_t pucch_pdu;
} NR_gNB_PUCCH_t;
typedef struct {
/// \brief Pointers (dynamic) to the received data in the time domain.
......@@ -619,9 +628,9 @@ typedef struct {
#define MAX_NUM_NR_RX_RACH_PDUS 4
#define MAX_NUM_NR_RX_PRACH_PREAMBLES 4
#define MAX_UL_PDUS_PER_SLOT 100
#define MAX_NUM_NR_SRS_PDUS 100
#define MAX_NUM_NR_UCI_PDUS 100
#define MAX_UL_PDUS_PER_SLOT 8
#define MAX_NUM_NR_SRS_PDUS 8
#define MAX_NUM_NR_UCI_PDUS 8
/// Top-level PHY Data Structure for gNB
typedef struct PHY_VARS_gNB_s {
......@@ -675,6 +684,7 @@ typedef struct PHY_VARS_gNB_s {
NR_gNB_COMMON common_vars;
NR_gNB_PRACH prach_vars;
NR_gNB_PUSCH *pusch_vars[NUMBER_OF_NR_ULSCH_MAX];
NR_gNB_PUCCH_t *pucch[NUMBER_OF_NR_PUCCH_MAX];
NR_gNB_DLSCH_t *dlsch[NUMBER_OF_NR_DLSCH_MAX][2]; // Nusers times two spatial streams
NR_gNB_ULSCH_t *ulsch[NUMBER_OF_NR_ULSCH_MAX][2]; // [Nusers times][2 codewords]
NR_gNB_DLSCH_t *dlsch_SI,*dlsch_ra,*dlsch_p;
......
......@@ -757,11 +757,11 @@ typedef struct {
#define MAX_NR_OF_SPATIAL_RELATION_INFOS (8)
typedef enum {
pucch_format0_nr = 0,
pucch_format1_nr = 1,
pucch_format2_nr = 2,
pucch_format3_nr = 3,
pucch_format4_nr = 4,
pucch_format0_nr = 1,
pucch_format1_nr = 2,
pucch_format2_nr = 3,
pucch_format3_nr = 4,
pucch_format4_nr = 5
} pucch_format_nr_t;
typedef enum {
......
......@@ -113,8 +113,6 @@ void handle_nfapi_nr_ul_dci_pdu(PHY_VARS_gNB *gNB,
nr_fill_ul_dci(gNB,frame,slot);
}
void handle_nr_nfapi_pdsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
......@@ -157,6 +155,10 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
int pdcch_received=0;
gNB->num_pdsch_rnti=0;
for (int i=0; i<NUMBER_OF_NR_DLSCH_MAX; i++) {
gNB->dlsch[i][0]->rnti=0;
gNB->dlsch[i][0]->harq_mask=0;
}
gNB->pdcch_pdu = NULL;
gNB->pbch_configured=0;
......@@ -210,7 +212,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
break;
case NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PUCCH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
// handle_nfapi_nr_pucch_pdu(gNB,frame,slot,UL_tti_req->pdus_list[i].pucch_pdu);
nr_fill_pucch(gNB,UL_tti_req->SFN, UL_tti_req->Slot, &UL_tti_req->pdus_list[i].pucch_pdu);
break;
case NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE:
LOG_D(PHY,"frame %d, slot %d, Got NFAPI_NR_UL_TTI_PRACH_PDU_TYPE for %d.%d\n", frame, slot, UL_tti_req->SFN, UL_tti_req->Slot);
......
......@@ -49,6 +49,8 @@
#include "intertask_interface.h"
//#define DEBUG_RXDATA
uint8_t SSB_Table[38]={0,2,4,6,8,10,12,14,254,254,16,18,20,22,24,26,28,30,254,254,32,34,36,38,40,42,44,46,254,254,48,50,52,54,56,58,60,62};
extern uint8_t nfapi_mode;
......@@ -215,7 +217,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *pusch_pdu = &gNB->ulsch[ULSCH_id][0]->harq_processes[harq_pid]->ulsch_pdu;
uint8_t ret, nodata_dmrs = 1;
uint8_t ret;
uint8_t l, number_dmrs_symbols = 0;
uint32_t G;
uint16_t start_symbol, number_symbols, nb_re_dmrs;
......@@ -226,11 +228,10 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
for (l = start_symbol; l < start_symbol + number_symbols; l++)
number_dmrs_symbols += ((pusch_pdu->ul_dmrs_symb_pos)>>l)&0x01;
if (nodata_dmrs)
nb_re_dmrs = 12;
if (pusch_pdu->dmrs_config_type==pusch_dmrs_type1)
nb_re_dmrs = 6*pusch_pdu->num_dmrs_cdm_grps_no_data;
else
nb_re_dmrs = ((pusch_pdu->dmrs_config_type == pusch_dmrs_type1)?6:4);
nb_re_dmrs = 4*pusch_pdu->num_dmrs_cdm_grps_no_data;
G = nr_get_G(pusch_pdu->rb_size,
number_symbols,
......@@ -265,6 +266,7 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
G);
stop_meas(&gNB->ulsch_decoding_stats);
if (ret > gNB->ulsch[ULSCH_id][0]->max_ldpc_iterations){
LOG_I(PHY, "ULSCH %d in error\n",ULSCH_id);
nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
......@@ -382,32 +384,83 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d\n",frame_rx,slot_rx);
for (int i=0;i<NUMBER_OF_NR_PUCCH_MAX;i++){
NR_gNB_PUCCH_t *pucch = gNB->pucch[i];
if (pucch) {
if ((pucch->active == 1) &&
(pucch->frame == frame_rx) &&
(pucch->slot == slot_rx) ) {
nfapi_nr_pucch_pdu_t *pucch_pdu = &pucch[i].pucch_pdu;
uint16_t num_ucis;
switch (pucch_pdu->format_type) {
case 0:
num_ucis = gNB->UL_INFO.uci_ind.num_ucis;
gNB->UL_INFO.uci_ind.uci_list = &gNB->uci_pdu_list[0];
gNB->UL_INFO.uci_ind.sfn = frame_rx;
gNB->UL_INFO.uci_ind.slot = slot_rx;
gNB->uci_pdu_list[num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE;
gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_0_1_t);
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu_format0 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_0_1;
nr_decode_pucch0(gNB,
slot_rx,
uci_pdu_format0,
pucch_pdu);
gNB->UL_INFO.uci_ind.num_ucis += 1;
pucch->active = 0;
break;
default:
AssertFatal(1==0,"Only PUCCH format 0 is currently supported\n");
}
}
}
}
for (int ULSCH_id=0;ULSCH_id<NUMBER_OF_NR_ULSCH_MAX;ULSCH_id++) {
NR_gNB_ULSCH_t *ulsch = gNB->ulsch[ULSCH_id][0];
int harq_pid;
int no_sig;
NR_UL_gNB_HARQ_t *ulsch_harq;
if ((ulsch) &&
(ulsch->rnti > 0)) {
// for for an active HARQ process
for (harq_pid=0;harq_pid<NR_MAX_ULSCH_HARQ_PROCESSES;harq_pid++) {
ulsch_harq = ulsch->harq_processes[harq_pid];
AssertFatal(ulsch_harq!=NULL,"harq_pid %d is not allocated\n",harq_pid);
if ((ulsch_harq->status == NR_ACTIVE) &&
(ulsch_harq->frame == frame_rx) &&
(ulsch_harq->slot == slot_rx) &&
(ulsch_harq->handled == 0)){
uint8_t symbol_start = ulsch_harq->ulsch_pdu.start_symbol_index;
uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.nr_of_symbols;
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
}
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[0]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[0]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
break;
}
ulsch_harq = ulsch->harq_processes[harq_pid];
AssertFatal(ulsch_harq!=NULL,"harq_pid %d is not allocated\n",harq_pid);
if ((ulsch_harq->status == NR_ACTIVE) &&
(ulsch_harq->frame == frame_rx) &&
(ulsch_harq->slot == slot_rx) &&
(ulsch_harq->handled == 0)){
#ifdef DEBUG_RXDATA
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
RU_t *ru = gNB->RU_list[0];
int slot_offset = frame_parms->get_samples_slot_timestamp(slot_rx,frame_parms,0);
slot_offset -= ru->N_TA_offset;
char name[128];
FILE *f;
sprintf(name, "rxdata.%d.%d.raw", frame_rx,slot_rx);
f = fopen(name, "w"); if (f == NULL) exit(1);
fwrite(&ru->common.rxdata[0][slot_offset],2,frame_parms->get_samples_per_slot(slot_rx,frame_parms)*2, f);
fclose(f);
#endif
uint8_t symbol_start = ulsch_harq->ulsch_pdu.start_symbol_index;
uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.nr_of_symbols;
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
if (no_sig) return;
}
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[0]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[0]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
break;
}
}
}
}
......
......@@ -34,6 +34,8 @@
#include "fapi_nr_ue_interface.h"
#include "fapi_nr_ue_l1.h"
#include "harq_nr.h"
//#include "PHY/phy_vars_nr_ue.h"
#include "PHY/defs_nr_UE.h"
#include "PHY/impl_defs_nr.h"
......@@ -54,12 +56,18 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_PDCCH *pdcch_vars = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
// PUCCH_ConfigCommon_nr_t *pucch_config_common = PHY_vars_UE_g[module_id][cc_id]->pucch_config_common_nr[0];
// PUCCH_Config_t *pucch_config_dedicated = PHY_vars_UE_g[module_id][cc_id]->pucch_config_dedicated_nr[0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
LOG_D(PHY,"Received %d DL pdus\n",dl_config->number_pdus);
pdcch_vars->nb_search_space = 0;
for (i = 0; i < dl_config->number_pdus; ++i){
if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI) {
......@@ -99,14 +107,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
dlsch0_harq->harq_ack.slot_for_feedback_ack = (slot+dlsch_config_pdu->pdsch_to_harq_feedback_time_ind)%frame_parms.slots_per_frame;
dlsch0_harq->Nl=1;
dlsch0_harq->mcs_table=0;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->harq_ack.rx_status = downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
dlsch0_harq->harq_ack.vDAI_DL = dlsch_config_pdu->dai;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
}
}
......@@ -232,6 +240,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
fapi_nr_config_request_t *nrUE_config = &PHY_vars_UE_g[phy_config->Mod_id][phy_config->CC_id]->nrUE_config;
......
......@@ -44,6 +44,7 @@
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
//#include "PHY/extern.h"
#include "SCHED_NR_UE/defs.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include "SCHED_NR/extern.h"
#include "SCHED_NR_UE/phy_sch_processing_time.h"
//#include <sched.h>
......@@ -2226,6 +2227,8 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
memset(ue->common_vars.txdataF[0], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size);
LOG_I(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
#if UE_TIMING_TRACE
......@@ -2246,6 +2249,15 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
} // UE_mode==PUSCH
*/
if (get_softmodem_params()->usim_test==0) {
LOG_D(PHY, "Sending PUCCH\n");
pucch_procedures_ue_nr(ue,
gNB_id,
proc,
TRUE);
}
LOG_D(PHY, "Sending data \n");
nr_ue_pusch_common_procedures(ue,
harq_pid,
slot_tx,
......@@ -2253,7 +2265,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
gNB_id,
&ue->frame_parms);
}
//LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1);
/* RACH */
if (get_softmodem_params()->do_ra==1) {
......@@ -2762,9 +2774,9 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
nr_tti_rx,
&dci_ind);
//#ifdef NR_PDCCH_SCHED_DEBUG
#ifdef NR_PDCCH_SCHED_DEBUG
LOG_I(PHY,"<-NR_PDCCH_PHY_PROCEDURES_LTE_UE (nr_ue_pdcch_procedures)-> Ending function nr_dci_decoding_procedure() -> dci_cnt=%u\n",dci_cnt);
//#endif
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_OUT);
//LOG_D(PHY,"[UE %d][PUSCH] Frame %d nr_tti_rx %d PHICH RX\n",ue->Mod_id,frame_rx,nr_tti_rx);
......@@ -3085,7 +3097,17 @@ void nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB
dlsch0->current_harq_pid);
else { // This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
if (pdsch == RA_PDSCH) ue->pdsch_vars_ra[eNB_id]->llr_offset[m]=ue->pdsch_vars_ra[eNB_id]->llr_offset[m-1];
else if (pdsch == PDSCH) ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m]=ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m-1];
else if (pdsch == PDSCH) nr_rx_pdsch(ue,
pdsch,
eNB_id,
eNB_id_i,
proc->frame_rx,
nr_tti_rx, // nr_tti_rx,
m,
first_symbol_flag,
dual_stream_UE,
i_mod,
dlsch0->current_harq_pid);
else AssertFatal(1==0,"not RA_PDSCH or PDSCH\n");
}
if (pdsch == PDSCH) LOG_D(PHY,"Done processing symbol %d : llr_offset %d\n",m,ue->pdsch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id]->llr_offset[m]);
......@@ -3269,9 +3291,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
NR_UE_PDSCH *pdsch_vars;
uint8_t is_cw0_active = 0;
uint8_t is_cw1_active = 0;
//nfapi_nr_config_request_t *cfg = &ue->nrUE_config;
//uint8_t dmrs_type = cfg->pdsch_config.dmrs_type.value;
uint8_t nb_re_dmrs = 12; //(dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4;
nfapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t dmrs_type = cfg->pdsch_config.PDSCHTimeDomainResourceAllocation_mappingType[0].value; // TODO: HARDCODED pdsch index
uint8_t nb_re_dmrs = (dmrs_type==NFAPI_NR_DMRS_TYPE1)?6:4; // TODO: should changed my mac
uint16_t length_dmrs = 1; //cfg->pdsch_config.dmrs_max_length.value;
uint16_t nb_symb_sch = 9;
nr_downlink_indication_t dl_indication;
......@@ -4012,6 +4034,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
int slot_pbch;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][0];
fapi_nr_config_request_t *cfg = &ue->nrUE_config;
uint8_t nb_symb_pdcch = pdcch_vars->nb_search_space > 0 ? pdcch_vars->pdcch_config[0].coreset.duration : 0;
uint8_t dci_cnt = 0;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
......
This diff is collapsed.
......@@ -41,6 +41,9 @@
/************** INCLUDE *******************************************/
#include "PHY/defs_nr_UE.h"
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
#include "openair2/LAYER2/NR_MAC_UE/mac_defs.h"
#include "RRC/NR_UE/rrc_proto.h"
#ifdef DEFINE_VARIABLES_PUCCH_UE_NR_H
#define EXTERN
......@@ -187,7 +190,7 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
@param resource_id pucch resource id if any
@returns TRUE a pucch resource has been found FALSE no valid pucch resource */
boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size, int pucch_resource_indicator,
boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size, int pucch_resource_indicator,
int *initial_pucch_id, int *resource_set_id, int *resource_id, NR_UE_HARQ_STATUS_t *harq_status);
/** \brief This function select a pucch resource set
......@@ -196,7 +199,7 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size
@param uci size number of uci bits
@returns number of the pucch resource set */
int find_pucch_resource_set(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size);
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size);
/** \brief This function check pucch format
@param ue context
......@@ -206,7 +209,7 @@ int find_pucch_resource_set(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int uci_size);
@param uci size number of uci bits
@returns TRUE pucch format matched uci size and constraints, FALSE invalid pucch format */
boolean_t check_pucch_format(PHY_VARS_NR_UE *ue, uint8_t gNB_id, pucch_format_nr_t format_pucch, int nb_symbols_for_tx,
boolean_t check_pucch_format(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, pucch_format_nr_t format_pucch, int nb_symbols_for_tx,
int uci_size);
/** \brief This function selects a pucch resource
......@@ -232,4 +235,11 @@ int get_csi_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload);
void set_csi_nr(int csi_status, uint32_t csi_payload);
uint8_t get_nb_symbols_pucch(NR_PUCCH_Resource_t *pucch_resource, pucch_format_nr_t format_type);
uint16_t get_starting_symb_idx(NR_PUCCH_Resource_t *pucch_resource, pucch_format_nr_t format_type);
int get_ics_pucch(NR_PUCCH_Resource_t *pucch_resource, pucch_format_nr_t format_type);
NR_PUCCH_Resource_t *select_resource_by_id(int resource_id, NR_PUCCH_Config_t *pucch_config);
#endif /* PUCCH_UCI_UE_NR_H */
......@@ -66,6 +66,8 @@ PHY_VARS_NR_UE *PHY_vars_UE_g[1][1] = { { NULL } };
uint16_t n_rnti = 0x1234;
openair0_config_t openair0_cfg[MAX_CARDS];
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
int main(int argc, char **argv)
{
char c;
......@@ -428,7 +430,7 @@ int main(int argc, char **argv)
uint8_t is_crnti = 0, llr8_flag = 0;
unsigned int TBS = 8424;
unsigned int available_bits;
uint8_t nb_re_dmrs = 12; // No data in dmrs symbol
uint8_t nb_re_dmrs = 6; // No data in dmrs symbol
uint16_t length_dmrs = 1;
unsigned char mod_order;
uint16_t rate;
......@@ -455,6 +457,7 @@ int main(int argc, char **argv)
rel15->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
rel15->dlDmrsSymbPos = 4;
rel15->mcsIndex[0] = Imcs;
rel15->numDmrsCdmGrpsNoData = 1;
double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc
short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384);
short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384);
......
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......@@ -62,6 +62,8 @@ uint16_t NB_UE_INST = 1;
openair0_config_t openair0_cfg[MAX_CARDS];
uint64_t get_softmodem_optmask(void) {return 0;}
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
void nr_phy_config_request_sim_pbchsim(PHY_VARS_gNB *gNB,
int N_RB_DL,
int N_RB_UL,
......
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......@@ -59,6 +59,8 @@ uint16_t NB_UE_INST = 1;
// needed for some functions
PHY_VARS_NR_UE * PHY_vars_UE_g[1][1]={{NULL}};
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
int main(int argc, char **argv)
{
char c;
......@@ -477,7 +479,7 @@ int main(int argc, char **argv)
for (trial=0; trial<n_trials; trial++) {
bzero(txdataF[aa],frame_parms->ofdm_symbol_size*sizeof(int));
if(format==0){
nr_generate_pucch0(UE,txdataF,frame_parms,UE->pucch_config_dedicated,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
nr_generate_pucch0(UE,txdataF,frame_parms,PUCCH_GroupHopping,hopping_id,amp,nr_tti_tx,m0,mcs,nrofSymbols,startingSymbolIndex,startingPRB);
}
else if (format == 1){
nr_generate_pucch1(UE,txdataF,frame_parms,UE->pucch_config_dedicated,actual_payload,amp,nr_tti_tx,m0,nrofSymbols,startingSymbolIndex,startingPRB,startingPRB_intraSlotHopping,0,nr_bit);
......
......@@ -54,6 +54,8 @@ PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
double cpuf;
uint8_t nfapi_mode = 0;
uint16_t NB_UE_INST = 1;
......
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......@@ -21,7 +21,8 @@
#include <time.h>
#include <stdlib.h>
#include "SIMULATION/TOOLS/sim.h"
//#include "SIMULATION/TOOLS/sim.h"
unsigned int s0, s1, s2, b;
......
......@@ -101,6 +101,7 @@
#define NUMBER_OF_NR_DLSCH_MAX 2//16
#define NUMBER_OF_NR_ULSCH_MAX 2//16
#define NUMBER_OF_NR_PUCCH_MAX 2
#define NUMBER_OF_NR_SR_MAX 16
......
......@@ -128,11 +128,11 @@
#define GNB_CONFIG_STRING_RARESPONSEWINDOW "ra_ResponseWindow"
#define GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSBPR "ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR"
#define GNB_CONFIG_STRING_SSBPERRACHOCCASIONANDCBPREAMBLESPERSSB "ssb_perRACH_OccasionAndCB_PreamblesPerSSB"
#define GNB_CONFIG_STRING_RACONTENTIONRESOLUTIONTIMER "ra_ContentionResolutionTimer"
#define GNB_CONFIG_STRING_RSRPTHRESHOLDSSB "rsrp_ThresholdSSB"
#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEXPR "prach_RootSequenceIndex_PR"
#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX "prach_RootSequenceIndex"
#define GNB_CONFIG_STRING_MSG1SUBCARRIERSPACING "msg1_SubcarrierSpacing"
#define GNB_CONFIG_STRING_RACONTENTIONRESOLUTIONTIMER "ra_ContentionResolutionTimer"
#define GNB_CONFIG_STRING_RSRPTHRESHOLDSSB "rsrp_ThresholdSSB"
#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEXPR "prach_RootSequenceIndex_PR"
#define GNB_CONFIG_STRING_PRACHROOTSEQUENCEINDEX "prach_RootSequenceIndex"
#define GNB_CONFIG_STRING_MSG1SUBCARRIERSPACING "msg1_SubcarrierSpacing"
#define GNB_CONFIG_STRING_RESTRICTEDSETCONFIG "restrictedSetConfig"
#define GNB_CONFIG_STRING_MSG3TRANSFPREC "msg3_transformPrecoder"
#define GNB_CONFIG_STRING_PUSCHTIMEDOMAINALLOCATIONLIST "puschTimeDomainAllocationList"
......
......@@ -131,6 +131,7 @@ void *gNB_app_task(void *args_p)
uint32_t gnb_nb = RC.nb_nr_inst;
uint32_t gnb_id_start = 0;
uint32_t gnb_id_end = gnb_id_start + gnb_nb;
uint32_t gnb_id;
MessageDef *msg_p = NULL;
const char *msg_name = NULL;
......
......@@ -230,6 +230,70 @@ typedef struct {
uint8_t TCRNTI_2: 8; // octet 7 [7:0]
} __attribute__ ((__packed__)) NR_MAC_RAR;
// DCI pdu structures. Used by both gNB and UE.
typedef struct {
uint16_t val;
uint8_t nbits;
} dci_field_t;
typedef struct {
uint8_t format_indicator; //1 bit
uint8_t ra_preamble_index; //6 bits
uint8_t ss_pbch_index; //6 bits
uint8_t prach_mask_index; //4 bits
uint8_t mcs; //5 bits
uint8_t ndi; //1 bit
uint8_t rv; //2 bits
uint8_t harq_pid; //4 bits
uint8_t tpc; //2 bits
uint8_t short_messages_indicator; //2 bits
uint8_t short_messages; //8 bits
uint8_t tb_scaling; //2 bits
uint8_t pucch_resource_indicator; //3 bits
uint8_t dmrs_sequence_initialization; //1 bit
uint8_t system_info_indicator; //1 bit
uint8_t slot_format_indicator_count;
uint8_t *slot_format_indicators;
uint8_t pre_emption_indication_count;
uint16_t *pre_emption_indications; //14 bit each
uint8_t block_number_count;
uint8_t *block_numbers;
uint8_t padding;
dci_field_t mcs2; //variable
dci_field_t ndi2; //variable
dci_field_t rv2; //variable
dci_field_t frequency_domain_assignment; //variable
dci_field_t time_domain_assignment; //variable
dci_field_t frequency_hopping_flag; //variable
dci_field_t vrb_to_prb_mapping; //variable
dci_field_t dai[2]; //variable
dci_field_t pdsch_to_harq_feedback_timing_indicator; //variable
dci_field_t carrier_indicator; //variable
dci_field_t bwp_indicator; //variable
dci_field_t prb_bundling_size_indicator; //variable
dci_field_t rate_matching_indicator; //variable
dci_field_t zp_csi_rs_trigger; //variable
dci_field_t transmission_configuration_indication; //variable
dci_field_t srs_request; //variable
dci_field_t cbgti; //variable
dci_field_t cbgfi; //variable
dci_field_t srs_resource_indicator; //variable
dci_field_t precoding_information; //variable
dci_field_t csi_request; //variable
dci_field_t ptrs_dmrs_association; //variable
dci_field_t beta_offset_indicator; //variable
dci_field_t cloded_loop_indicator; //variable
dci_field_t ul_sul_indicator; //variable
dci_field_t antenna_ports; //variable
dci_field_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
} dci_pdu_rel15_t;
// 38.321 ch6.2.1, 38.331
#define DL_SCH_LCID_CCCH 0x00
#define DL_SCH_LCID_DCCH 0x01
......
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