Commit b1beb091 authored by Laurent THOMAS's avatar Laurent THOMAS

fix regression in merge develop and some warnings

parents 2ccc7188 23b3a18f
...@@ -982,7 +982,6 @@ int main(int argc, char **argv) ...@@ -982,7 +982,6 @@ int main(int argc, char **argv)
gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t)); gNB->threadPool = (tpool_t*)malloc(sizeof(tpool_t));
initTpool(gNBthreads, gNB->threadPool, true); initTpool(gNBthreads, gNB->threadPool, true);
// L1 TX result FIFO
gNB->L1_tx_free = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); gNB->L1_tx_free = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
gNB->L1_tx_filled = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); gNB->L1_tx_filled = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
gNB->L1_tx_out = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t)); gNB->L1_tx_out = (notifiedFIFO_t*) malloc(sizeof(notifiedFIFO_t));
...@@ -1076,7 +1075,7 @@ int main(int argc, char **argv) ...@@ -1076,7 +1075,7 @@ int main(int argc, char **argv)
Sched_INFO.UL_tti_req = gNB_mac->UL_tti_req_ahead[slot]; Sched_INFO.UL_tti_req = gNB_mac->UL_tti_req_ahead[slot];
Sched_INFO.UL_dci_req = NULL; Sched_INFO.UL_dci_req = NULL;
Sched_INFO.TX_req = &gNB_mac->TX_req[0]; Sched_INFO.TX_req = &gNB_mac->TX_req[0];
pushNotifiedFIFO(gNB->L1_tx_free,msgL1Tx); pushNotifiedFIFO(gNB->L1_tx_free,msgL1Tx);
nr_schedule_response(&Sched_INFO); nr_schedule_response(&Sched_INFO);
/* PTRS values for DLSIM calculations */ /* PTRS values for DLSIM calculations */
......
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