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alex037yang
OpenXG-RAN
Commits
82880f61
Commit
82880f61
authored
5 years ago
by
Francesco Mani
Browse files
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Merge branch 'nr_x300_fixes' into ru-parallel-beamforming-merge
parents
56ecc5cf
fe0c9ba0
dev
1
128-ues
256_QAM_demod
459-pusch-based-ta-updates
472-add-pusch-dmrs-modes
481-ldpc-decoder-on-gpu
Fix_SA_SIB1
LTE_TRX_on_single_port
NCTU_CS_ISIP
NCTU_CS_ISIP_CPU
NCTU_CS_ISIP_GPU
NCTU_OpinConnect_LDPC
NR-PHY-MAC-IF-multi-UE
NRPRACH_highSpeed_saankhya
NRUE_usedlschparallel
NR_10MHz
NR_CSI_reporting
NR_DCI_01
NR_DLUL_PF
NR_DLUL_PF_4UL
NR_DLUL_PF_rebased
NR_DL_MIMO
NR_DL_sched_fixes
NR_DL_scheduler
NR_FAPI_beamindex_SSB_RO
NR_FAPI_beamindex_SSB_RO_SEMPROJ
NR_FDD_FIX
NR_FR2_RA
NR_FR2_RRC_SSB
NR_FR2_initsync_fixes
NR_MAC_CE_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge
NR_MAC_Multi_Rach_GlobalEdge-old
NR_MAC_SSB
NR_MAC_SSB_RO_GlobalEdge
NR_MAC_SSB_RO_UE_IDCC
NR_MAC_SSB_RO_merge
NR_MAC_TCI_UCI_GlobalEdge
NR_MCS_BLER
NR_NGAP
NR_PDCP_noS1
NR_PUCCH_MultiUE
NR_RA_cleanup
NR_RA_updates
NR_RRCConfiguragion_FR2
NR_RRCConfiguration
NR_RRCConfiguration_FR2
NR_RRCConfiguration_S1U
NR_RRCConfiguration_merge_develop
NR_RRCConfiguration_sync_source
NR_RRCConfiguration_trx_thread
NR_RRC_CP_bugfix
NR_RRC_PDCP
NR_RRC_PRACH_procedures
NR_RRC_PRACH_procedures_todevelop
NR_RRC_PUSCH
NR_RRC_TA
NR_RRC_X2AP_AMBR_Change_Global_edge
NR_RRC_X2AP_RemoveHardcodings_GlobalEdge
NR_RRC_config_simplified
NR_RRC_harq
NR_RRC_harq_b
NR_RRC_harq_hacks
NR_RRC_harq_newdcipdu
NR_SA_F1AP_5GRECORDS
NR_SA_F1AP_5GRECORDS_lts
NR_SA_F1AP_RFSIMULATOR
NR_SA_F1AP_RFSIMULATOR2
NR_SA_F1AP_RFSIMULATOR2_SRB
NR_SA_F1AP_RFSIMULATOR3
NR_SA_F1AP_RFSIMULATOR3_tmp
NR_SA_F1AP_RFSIMULATOR3_wf
NR_SA_F1AP_RFSIMULATOR_w5GCN
NR_SA_F1AP_dev
NR_SA_NGAP_RRC
NR_SA_NGAP_RRC_wk42
NR_SA_itti_sim_wk48
NR_SA_itti_sim_wk48_hs
NR_SA_itti_sim_wk48_hs1
NR_SA_w5GCN_new_gtpu
NR_SCHED
NR_SCHED_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ
NR_SCHED_PDCCH_PUCCH_HARQ_rebased
NR_SCHED_fixes
NR_SRB_Config
NR_TRX_on_single_port
NR_TRX_on_single_port2
NR_UE_CONFIG_REQ_FIXES
NR_UE_MAC_scheduler
NR_UE_RA_fixes
NR_UE_SA
NR_UE_UL_DCI_improvements
NR_UE_dlsch_bugfix
NR_UE_enable_parallelization
NR_UE_stability_fixes
NR_UL_FAPI_programming
NR_UL_SCFDMA_100MHz
NR_UL_scheduler
NR_UL_scheduler_rebased
NR_UL_scheduling
NR_Wireshark
NR_beam_simulation
NR_beamforming_test
NR_gNB_SCF_Indication
NR_ipaccess_testing
NR_mac_uci_functions_rework
NR_msg2_phytest
NR_scheduling_CSIRS
NR_scheduling_request
NR_scheduling_request2
NR_scheduling_request3
NR_test_S1U_RRC_PRACH_procedures
NR_ue_dlsch_dmrs_cdm
OpInConnect_ISIP
PBCHNRTCFIX
PUSCH_TA_update
RA_CI_test
RFquality
Saankhya_NRPRACH_HighSpeed
UE_DL_DCI_hotfix
add-dmrs-test
bch-fixes-bitmap
benetel_5g_prach_fix
benetel_config_file_fix
benetel_driver_uldl_pf_merge
benetel_driver_update
benetel_fixes
benetel_phase_rotation
benetel_phase_rotation_old
bsr-fix
bugfix-free-ra-process
bugfix-minor-remove-wrong-log
bugfix-nr-bands
bugfix-nr-ldpc-post-processing
bugfix-nr-ldpc-size-typo
bugfix-nr-pdcp-sn-size
bugfix-nr-rate-matching-assertion
bugfix-nr-t-reordering
bugfix-x2-SgNBAdditionRequest
bupt-sa-merge
cce_indexing_fix
cce_indexing_fix2
ci-deploy-asterix
ci-deploy-docker-compose
ci-new-docker-pipeline
ci-rd-july-improvements
ci-reduce-nb-vms
ci-test
ci-ul-iperf-from-trf-container
ci_benetel_test
ci_phytest
ci_quectel_support
ci_test_ra_fr2
ci_vm_resource_fix
clean-5G-scope-round2
cleanup_softmodem_main
constant_power
debug_branch_init_sync
develop
develop-CBRA-v3
develop-NR_SA_F1AP_5GRECORDS
develop-NR_SA_F1AP_5GRECORDS-v3
develop-SA-CBRA
develop-SA-CBRA-CUDU
develop-SA-CBRA-Msg5
develop-SA-CBRA-lts
develop-SA-CBRA-ulsch-lts
develop-SA-RA
develop-SnT
develop-nr
develop-nr-fr2-rework
develop-nr_cppcheck
develop-oriecpriupdates
develop-sib1
develop-sib1-local
develop-sib1-lts
develop-sib1-update
develop-sib1-update-test1
develop-sib1-update-ue
develop_inria_ci_deployment
develop_inria_ci_deployment_gp
develop_integration_2020_w15
develop_integration_2020_w19
develop_integration_w08
develop_stable
dfts_alternatives
disable_CSI_measrep
dlsch-all-dlslots
dlsch_encode_mthread
dlsch_parallel
docker-improvements-2021-april
docker-no-cache-option
docupdate_tools
dongzhanyi-zte-develop
dongzhanyi-zte-develop2
dreibh/apt-auth-fix
dreibh/device-load-fix
dreibh/device-load-fix-develop-branch
edrx
enhance-rfsim
episys-merge
episys/nsa_development
extend_sharedlibusage
extend_sharedlibusage2
fapi_for_dmrs_and_ptrs
feature-4g-sched
feature-support-clang-format
feature/make-s1-mme-port-configurable
feature/make-s1-mme-port-configurable-with-astyle-fixes
fembms-enb-ue
fft_bench_hotfix
finalize-oaicn-integration
firas
fix-ci-tun
fix-clock-source
fix-itti-segv
fix-l2-sim
fix-limeSDR-compile
fix-nr-pdcp-timer
fix-nr-rlc-range-nack
fix-quectel
fix-realtime
fix-softmodem-restart
fix-warnings
fix-x2-without-gnb
fix_NR_DLUL_PF
fix_NR_DLUL_PF_benchmark
fix_coreset_dmrs_idx
fix_do_ra_data
fix_pdsch_low_prb
fix_rb_corruption
fix_reestablishment
fix_rfsim_mimo
fix_rrc_x2_ticking
fixes-CE-RLC-PDU-size
fixes-mac-sched-nfapi
fixes-mac-sched-tun
fixes-tun
fixgtpu
flexran-apps
flexran-improvements
flexran-repair-mme-mgmt
fr2-hw-test
fujitsu_lte_contribution
fujitsu_lte_contribution-128
generate_push_ptrs
git-dashboard
gnb-freerun-txru
gnb-n300-fixes
gnb-only-test
gnb-realtime-hotfix
gnb-realtime-quickfix
gnb-threadpool
hack-exit-gnb-when-no-enb-nsa
harq-hotfix
hotfix-minor-remove-nr-rlc-cppcheck-error
hotfix-nr-rlc-tick
hotfix-ocp-executable
hotfix-ue-musim-compilation
improve_build_nr_lte_merge
improve_nr_modulation
improve_ue_stability
integ-w13-test-rt-issue
integration_2020_wk15
integration_2020_wk40
integration_2020_wk41
integration_2020_wk42_2
integration_2020_wk45
integration_2020_wk45_2
integration_2020_wk46
integration_2020_wk46_2
integration_2020_wk47
integration_2020_wk48
integration_2020_wk48_2
integration_2020_wk49
integration_2020_wk50
integration_2020_wk50_1
integration_2020_wk51
integration_2020_wk51_2
integration_2021_wk02
integration_2021_wk02_wMR988
integration_2021_wk04
integration_2021_wk05
integration_2021_wk06
integration_2021_wk06_MR978
integration_2021_wk06_b
integration_2021_wk06_c
integration_2021_wk08
integration_2021_wk08_2
integration_2021_wk08_MR963
integration_2021_wk09
integration_2021_wk09_b
integration_2021_wk10
integration_2021_wk10_b
integration_2021_wk11
integration_2021_wk12
integration_2021_wk12_b
integration_2021_wk13_a
integration_2021_wk13_b
integration_2021_wk13_b_fix_tdas
integration_2021_wk13_b_fixed
integration_2021_wk13_c
integration_2021_wk14_a
integration_2021_wk15_a
integration_2021_wk16
integration_2021_wk17_a
integration_w5GC_CBRA_test
inter-RRU-final
inter-RRU-nr
inter-RRU-oairu
inter-rru-UE
isip_nr
itti-enhancement
l2-fixes
ldpc-decoder-codegen
ldpc-decoder-codegen2
ldpc-offload
ldpc_short_codeword_fixes
load_gnb
lte-ulsch-bugfix
lte_uplink_improvement
mac-fixes-wk45_2
mbms-fix-develop-nr
merging-2019-w51-to-develop-nr
migrate-cpp-check-container
minor-fix-doc-basic-sim
mosaic5g-oai-ran
mosaic5g-oai-sim
msg4_phy_0303_lfq
multiple_ssb_sib1_bugfix
nasmesh_kernel_5.8
new-gtpu
new_rlc_2020
nfapi-bugfix
nfapi_nr_arch_mod
nfapi_nr_develop
nfapi_nr_develop_new
ngap-dlul
ngap-support
ngap-w48-merge2
ngap-wf
ngap-wf-1120
ngap-wf-1120-srb
ngap-wf-1120-srb-gtp
ngap-wf-1120-srb-gtp-hs
ngap-wf-1120-srb-gtp-hs1
ngap-wf-1120-srb-gtp-hs2
ngap-wf-1120-srb-gtp-yhz
ngap-wf-1203-yunsdr
ngap-wf-liuyu
ngap_lfq_1120
ngap_merge
noCore
nr-bsr-fix
nr-dl-mimo-2layer
nr-dlsch-multi-thread
nr-dlsch-thread
nr-dmrs-fixes
nr-dual-connectivity
nr-ip-uplink-noS1
nr-mac-pdu-wireshark
nr-mac-remove-ue-list
nr-pdcp
nr-pdcp-improvements
nr-pdcp-nea2-security
nr-pdcp-nia2-integrity
nr-pdcp-srb-integrity
nr-ra-fix
nr-rlc-am-bugfix-w44
nr-rlc-bugfix-w44
nr-stats-print
nr-ue-buffer-status
nrPBCHTCFix
nrPbchTcFix
nrUE
nrUE-hs
nrUE-upper-layer
nr_bsr
nr_dl_dmrs_type2
nr_dl_pf
nr_dl_pf2
nr_dl_ul_ptrs
nr_fdd_if_fix
nr_fix_easycppcheck
nr_improve_build_procedures
nr_increase_tp
nr_polar_decoder_improvement
nr_power_measurement_fixes
nr_prach_fr2
nr_pucch
nr_pucch2
nr_segmentation_fixes
nr_tdd_configuration
nr_ue_msg3
nr_ue_pdcp_fix
nr_ue_tti_cleanup
nr_ul_pf
nr_ul_scfdma
nrue-multi-thread
nrue_msg2_reception
nsa-ue
nsa_remove_band_hardcodings
oai-sim
oai-ubuntu-docker
oai-ubuntu-docker-for-lmssdr
oairu
oairu-dockerfile-support
oc-docker-october-improvements
openxg/develop
pdcp-benchmark
physim-build-deploy
polar8
prb_based_dl_channel_estimation
ptrs_rrc_config
pusch-mthread-scaling-fix
pusch-retrans-fix-ue
ra-dl-ul
recursive-cmake
remove_nos1_hack_pdcp
remove_x2_gnb_hardcoding
repair-TA
revert_memcpy
rh-ci-add-ue-parallelization
rh_ci_add_runtime_stats
rh_ci_add_uldlharq_stats
rh_ci_fix_autoterminate
rh_ci_fr1_update
rh_ci_gsheet_rt_monitoring
rh_ci_nsa2jenkins
rh_ci_nsa_test_n310
rh_ci_oc
rh_ci_phy_test_improve
rh_ci_py
rh_ci_ra_fr2
rh_ci_rfsim_ra
rh_ci_ue_parallel
rh_doc_update_3
rh_fr1_newjenkins
rh_fr1_update
rh_gnb_compile_fix
rh_wk50_debug
rlc-v2-bugfix-status-reporting
rlc-v2-tick
rlc_v2_coverity_fixes
rohan_ulsim2RxFix
rrc-enb-phy-testmode
runel
runel-reverse-test
s1-subnormal_rewrite
s1_subnormal
s1_subnormal-robert
s1ap-bugfix-rab_setup
sa-demo
sa-demo-hs
sa-merge-rrc-srb
sa-msg4
sa-msg4-rrc
sa-msg4-rrc-yihz
sa-msg4-rrc-yihz-hs
sa_rrc_yihz
sanitize-address
sanitize-v1
sanitize-v1-tmp
sarma_pvnp_oai
sim-channels
small-bugfixes-w40
small-config-change
small_nr_bugfixes
smallcleanup
softmodem_cleanup
split73
t-gnb-tracer
test-panos
test_nsa_gtpu_fix
test_rt-fix_phy-test
testing_2symb_pdcch
testing_with_external_txdata
tools_5Gadapt
tp-ota-test
trx_thread_param
trx_write_thread
ue-csi
ue-dci-false-detection
ue-fixes
ue-fixes-ota
ue-pdsch-pusch-parallel
ue-race-fix
ue-updates-runel-test
ue_beam_selection
ue_nfapi_mch
uhd_priority_set_cleanup
ul-freq-iq-samps-to-file
ul_dl_dci_same_slot
ul_harq
ulsch_decode_mthread
ulsim_changes
usrp_fix_adc_shift_and_pps_sync
usrp_gpio_test
usrp_x400
wf-sa-rrc
wireshark-T-hack-ueid
wireshark-log-scheduling-requests
wk11-with-phytest
x2-endc-processing
xiangwab
xiangwan
xw2
yihongzheng_srb
zzs
2021.wk14_a
2021.wk13_d
2021.wk13_c
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
2021.w06
2021.w05
2021.w04
2021.w02
2020.w51_2
2020.w51
2020.w50
2020.w49
2020.w48_2
2020.w48
2020.w47
2020.w46_2
2020.w46
2020.w45_2
2020.w45
2020.w44
2020.w42_2
2020.w42
2020.w41
2020.w39
2020.w38
2020.w37
2020.w36
2020.w34
2020.w33
2020.w31
2020.w30
2020.w29
2020.w28
2020.w26
2020.w25
2020.w24
2020.w23
2020.w22
2020.w19
2020.w17
2020.w16
2020.w15
2020.w11
2020.w09
2020.w06
2020.w05
2020.w04
2020.w03
develop-nr-2020w03
develop-nr-2020w02
develop-nr-2019w51
benetel_phase_rotation
benetel_gnb_rel_1.0
benetel_enb_rel_1.0
No related merge requests found
Changes
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7 changed files
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47 additions
and
37 deletions
+47
-37
executables/nr-ru.c
executables/nr-ru.c
+6
-6
openair1/PHY/INIT/nr_parms.c
openair1/PHY/INIT/nr_parms.c
+25
-16
openair1/PHY/INIT/phy_init.h
openair1/PHY/INIT/phy_init.h
+1
-1
openair1/SCHED_NR/nr_ru_procedures.c
openair1/SCHED_NR/nr_ru_procedures.c
+6
-5
openair1/SCHED_NR/phy_procedures_nr_common.c
openair1/SCHED_NR/phy_procedures_nr_common.c
+2
-3
openair1/SCHED_NR/phy_procedures_nr_gNB.c
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+6
-5
openair1/SCHED_NR/sched_nr.h
openair1/SCHED_NR/sched_nr.h
+1
-1
No files found.
executables/nr-ru.c
View file @
82880f61
...
@@ -321,7 +321,7 @@ static inline void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t ti
...
@@ -321,7 +321,7 @@ static inline void fh_if4p5_south_out(RU_t *ru, int frame, int slot, uint64_t ti
LOG_D
(
PHY
,
"Sending IF4p5 for frame %d subframe %d
\n
"
,
ru
->
proc
.
frame_tx
,
ru
->
proc
.
tti_tx
);
LOG_D
(
PHY
,
"Sending IF4p5 for frame %d subframe %d
\n
"
,
ru
->
proc
.
frame_tx
,
ru
->
proc
.
tti_tx
);
if
(
nr_slot_select
(
&
ru
->
gNB_list
[
0
]
->
gNB_config
,
ru
->
proc
.
tti_tx
)
!=
SF_UL
)
send_IF4p5
(
ru
,
frame
,
slot
,
IF4p5_PDLFFT
);
if
(
nr_slot_select
(
&
ru
->
gNB_list
[
0
]
->
gNB_config
,
ru
->
proc
.
tti_tx
,
frame
)
!=
SF_UL
)
send_IF4p5
(
ru
,
frame
,
slot
,
IF4p5_PDLFFT
);
}
}
/*************************************************************/
/*************************************************************/
...
@@ -536,10 +536,10 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
...
@@ -536,10 +536,10 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
do
{
do
{
recv_IF4p5
(
ru
,
&
frame_tx
,
&
slot_tx
,
&
packet_type
,
&
symbol_number
);
recv_IF4p5
(
ru
,
&
frame_tx
,
&
slot_tx
,
&
packet_type
,
&
symbol_number
);
if
((
nr_slot_select
(
cfg
,
slot_tx
)
==
SF_DL
)
&&
(
symbol_number
==
0
))
start_meas
(
&
ru
->
rx_fhaul
);
if
((
nr_slot_select
(
cfg
,
slot_tx
,
frame_tx
)
==
SF_DL
)
&&
(
symbol_number
==
0
))
start_meas
(
&
ru
->
rx_fhaul
);
LOG_D
(
PHY
,
"subframe %d (%d): frame %d, subframe %d, symbol %d
\n
"
,
LOG_D
(
PHY
,
"subframe %d (%d): frame %d, subframe %d, symbol %d
\n
"
,
*
slot
,
nr_slot_select
(
cfg
,
*
slot
),
frame_tx
,
slot_tx
,
symbol_number
);
*
slot
,
nr_slot_select
(
cfg
,
*
slot
,
*
frame
),
frame_tx
,
slot_tx
,
symbol_number
);
if
(
proc
->
first_tx
!=
0
)
{
if
(
proc
->
first_tx
!=
0
)
{
*
frame
=
frame_tx
;
*
frame
=
frame_tx
;
...
@@ -558,7 +558,7 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
...
@@ -558,7 +558,7 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *slot) {
}
else
AssertFatal
(
1
==
0
,
"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d
\n
"
,
packet_type
);
}
else
AssertFatal
(
1
==
0
,
"Illegal IF4p5 packet type (should only be IF4p5_PDLFFT%d
\n
"
,
packet_type
);
}
while
(
symbol_mask
!=
symbol_mask_full
);
}
while
(
symbol_mask
!=
symbol_mask_full
);
if
(
nr_slot_select
(
cfg
,
slot_tx
)
==
SF_DL
)
stop_meas
(
&
ru
->
rx_fhaul
);
if
(
nr_slot_select
(
cfg
,
slot_tx
,
frame_tx
)
==
SF_DL
)
stop_meas
(
&
ru
->
rx_fhaul
);
proc
->
tti_tx
=
slot_tx
;
proc
->
tti_tx
=
slot_tx
;
proc
->
frame_tx
=
frame_tx
;
proc
->
frame_tx
=
frame_tx
;
...
@@ -725,7 +725,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
...
@@ -725,7 +725,7 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
T
(
T_ENB_PHY_OUTPUT_SIGNAL
,
T_INT
(
0
),
T_INT
(
0
),
T_INT
(
frame
),
T_INT
(
slot
),
T
(
T_ENB_PHY_OUTPUT_SIGNAL
,
T_INT
(
0
),
T_INT
(
0
),
T_INT
(
frame
),
T_INT
(
slot
),
T_INT
(
0
),
T_BUFFER
(
&
ru
->
common
.
txdata
[
0
][
slot
*
fp
->
samples_per_slot
],
fp
->
samples_per_slot
*
4
));
T_INT
(
0
),
T_BUFFER
(
&
ru
->
common
.
txdata
[
0
][
slot
*
fp
->
samples_per_slot
],
fp
->
samples_per_slot
*
4
));
int
sf_extension
=
0
;
int
sf_extension
=
0
;
//nr_subframe_t SF_type = nr_slot_select(cfg,slot%fp->slots_per_frame);
//nr_subframe_t SF_type = nr_slot_select(cfg,slot%fp->slots_per_frame
,frame
);
if
((
slot
==
0
)
||
if
((
slot
==
0
)
||
(
slot
==
1
)
||
IS_SOFTMODEM_RFSIM
)
{
(
slot
==
1
)
||
IS_SOFTMODEM_RFSIM
)
{
...
@@ -821,7 +821,7 @@ static void *ru_thread_asynch_rxtx( void *param ) {
...
@@ -821,7 +821,7 @@ static void *ru_thread_asynch_rxtx( void *param ) {
if
(
ru
->
fh_south_asynch_in
)
ru
->
fh_south_asynch_in
(
ru
,
&
frame
,
&
subframe
);
if
(
ru
->
fh_south_asynch_in
)
ru
->
fh_south_asynch_in
(
ru
,
&
frame
,
&
subframe
);
// asynchronous receive from north (RRU IF4/IF5)
// asynchronous receive from north (RRU IF4/IF5)
else
if
(
ru
->
fh_north_asynch_in
)
{
else
if
(
ru
->
fh_north_asynch_in
)
{
if
(
nr_slot_select
(
&
ru
->
gNB_list
[
0
]
->
gNB_config
,
subframe
)
!=
SF_UL
)
if
(
nr_slot_select
(
&
ru
->
gNB_list
[
0
]
->
gNB_config
,
subframe
,
frame
)
!=
SF_UL
)
ru
->
fh_north_asynch_in
(
ru
,
&
frame
,
&
subframe
);
ru
->
fh_north_asynch_in
(
ru
,
&
frame
,
&
subframe
);
}
else
AssertFatal
(
1
==
0
,
"Unknown function in ru_thread_asynch_rxtx
\n
"
);
}
else
AssertFatal
(
1
==
0
,
"Unknown function in ru_thread_asynch_rxtx
\n
"
);
}
}
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/INIT/nr_parms.c
View file @
82880f61
...
@@ -79,30 +79,39 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_f
...
@@ -79,30 +79,39 @@ int nr_get_ssb_start_symbol(NR_DL_FRAME_PARMS *fp, uint8_t i_ssb, uint8_t half_f
return
symbol
;
return
symbol
;
}
}
int
nr_is_ssb_slot
(
nfapi_nr_config_request_t
*
cfg
,
int
slot
)
int
nr_is_ssb_slot
(
nfapi_nr_config_request_t
*
cfg
,
int
slot
,
int
frame
)
{
{
uint8_t
n_hf
;
uint8_t
n_hf
;
uint16_t
p
,
mu
,
hf_slots
;
uint64_t
ssb_map
;
int
rel_slot
;
int
rel_slot
;
n_hf
=
cfg
->
sch_config
.
half_frame_index
.
value
;
mu
=
cfg
->
subframe_config
.
numerology_index_mu
.
value
;
// if SSB periodicity is 5ms, they are transmitted in both half frames
if
(
cfg
->
sch_config
.
ssb_periodicity
.
value
==
5
)
{
if
(
slot
<
10
)
n_hf
=
0
;
else
n_hf
=
1
;
}
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
ssb_map
=
cfg
->
sch_config
.
ssb_scg_position_in_burst
.
value
;
rel_slot
=
(
n_hf
)
?
(
slot
-
10
)
:
slot
;
p
=
cfg
->
sch_config
.
ssb_periodicity
.
value
;
n_hf
=
cfg
->
sch_config
.
half_frame_index
.
value
;
if
(
rel_slot
<
10
&&
rel_slot
>=
0
)
// checking if the ssb is transmitted in given frame according to periodicity
return
1
;
if
(
(
p
>
10
)
&&
(
frame
%
(
p
/
10
))
)
else
return
0
;
return
0
;
else
{
hf_slots
=
(
10
<<
mu
)
>>
1
;
// number of slots per half frame
// if SSB periodicity is 5ms, they are transmitted in both half frames
if
(
p
==
5
)
{
if
(
slot
<
hf_slots
)
n_hf
=
0
;
else
n_hf
=
1
;
}
// to set a effective slot number between 0 to hf_slots-1 in the half frame where the SSB is supposed to be
rel_slot
=
(
n_hf
)
?
(
slot
-
hf_slots
)
:
slot
;
// there are two potential SSB per slot
return
(
((
ssb_map
>>
rel_slot
*
2
)
&
0x01
)
||
((
ssb_map
>>
(
1
+
rel_slot
*
2
))
&
0x01
)
);
}
}
}
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/INIT/phy_init.h
View file @
82880f61
...
@@ -378,7 +378,7 @@ void phy_config_request(PHY_Config_t *phy_config);
...
@@ -378,7 +378,7 @@ void phy_config_request(PHY_Config_t *phy_config);
int
init_frame_parms
(
LTE_DL_FRAME_PARMS
*
frame_parms
,
uint8_t
osf
);
int
init_frame_parms
(
LTE_DL_FRAME_PARMS
*
frame_parms
,
uint8_t
osf
);
void
dump_frame_parms
(
LTE_DL_FRAME_PARMS
*
frame_parms
);
void
dump_frame_parms
(
LTE_DL_FRAME_PARMS
*
frame_parms
);
int
nr_get_ssb_start_symbol
(
NR_DL_FRAME_PARMS
*
fp
,
uint8_t
i_ssb
,
uint8_t
half_frame_index
);
int
nr_get_ssb_start_symbol
(
NR_DL_FRAME_PARMS
*
fp
,
uint8_t
i_ssb
,
uint8_t
half_frame_index
);
int
nr_is_ssb_slot
(
nfapi_nr_config_request_t
*
cfg
,
int
slot
);
int
nr_is_ssb_slot
(
nfapi_nr_config_request_t
*
cfg
,
int
slot
,
int
frame
);
int
nr_init_frame_parms
(
nfapi_nr_config_request_t
*
config
,
NR_DL_FRAME_PARMS
*
frame_parms
);
int
nr_init_frame_parms
(
nfapi_nr_config_request_t
*
config
,
NR_DL_FRAME_PARMS
*
frame_parms
);
int
nr_init_frame_parms_ue
(
NR_DL_FRAME_PARMS
*
frame_parms
,
int
mu
,
int
Ncp
,
int
N_RB_DL
,
int
n_ssb_crb
,
int
ssb_subcarrier_offset
);
int
nr_init_frame_parms_ue
(
NR_DL_FRAME_PARMS
*
frame_parms
,
int
mu
,
int
Ncp
,
int
N_RB_DL
,
int
n_ssb_crb
,
int
ssb_subcarrier_offset
);
int
init_nr_ue_signal
(
PHY_VARS_NR_UE
*
ue
,
int
nb_connected_eNB
,
uint8_t
abstraction_flag
);
int
init_nr_ue_signal
(
PHY_VARS_NR_UE
*
ue
,
int
nb_connected_eNB
,
uint8_t
abstraction_flag
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED_NR/nr_ru_procedures.c
View file @
82880f61
...
@@ -127,7 +127,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
...
@@ -127,7 +127,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
int
ofdm_mask_full
=
(
1
<<
(
ru
->
nb_tx
*
2
))
-
1
;
int
ofdm_mask_full
=
(
1
<<
(
ru
->
nb_tx
*
2
))
-
1
;
int
txdataF_offset
=
((
tti_tx
%
2
)
*
fp
->
samples_per_slot_wCP
);
int
txdataF_offset
=
((
tti_tx
%
2
)
*
fp
->
samples_per_slot_wCP
);
if
(
nr_slot_select
(
cfg
,
slot
)
==
SF_UL
)
return
;
if
(
nr_slot_select
(
cfg
,
slot
,
frame_tx
)
==
SF_UL
)
return
;
for
(
aa
=
0
;
aa
<
fp
->
Lmax
;
aa
++
)
{
for
(
aa
=
0
;
aa
<
fp
->
Lmax
;
aa
++
)
{
memset
(
ru
->
common
.
txdataF
[
aa
],
0
,
fp
->
samples_per_slot_wCP
*
sizeof
(
int32_t
));
memset
(
ru
->
common
.
txdataF
[
aa
],
0
,
fp
->
samples_per_slot_wCP
*
sizeof
(
int32_t
));
}
}
...
@@ -154,7 +154,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
...
@@ -154,7 +154,7 @@ void nr_feptx_ofdm_2thread(RU_t *ru,int frame_tx,int tti_tx) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM
,
1
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM
,
1
);
if
(
nr_slot_select
(
cfg
,
slot
)
==
SF_DL
)
{
if
(
nr_slot_select
(
cfg
,
slot
,
frame_tx
)
==
SF_DL
)
{
// If this is not an S-tti
// If this is not an S-tti
for
(
i
=
0
;
i
<
ru
->
nb_tx
;
++
i
){
for
(
i
=
0
;
i
<
ru
->
nb_tx
;
++
i
){
if
(
j
%
2
==
0
){
if
(
j
%
2
==
0
){
...
@@ -305,8 +305,9 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
...
@@ -305,8 +305,9 @@ void nr_feptx_ofdm(RU_t *ru,int frame_tx,int tti_tx) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM
,
1
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM
,
1
);
start_meas
(
&
ru
->
ofdm_mod_stats
);
start_meas
(
&
ru
->
ofdm_mod_stats
);
if
((
nr_slot_select
(
cfg
,
slot
)
==
SF_DL
)
||
if
((
nr_slot_select
(
cfg
,
slot
,
frame_tx
)
==
SF_DL
)
||
((
nr_slot_select
(
cfg
,
slot
)
==
SF_S
)))
{
((
nr_slot_select
(
cfg
,
slot
,
frame_tx
)
==
SF_S
)))
{
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
// LOG_D(HW,"Frame %d: Generating slot %d\n",frame,next_slot);
nr_feptx0
(
ru
,
slot
,
0
,
fp
->
symbols_per_slot
,
aa
);
nr_feptx0
(
ru
,
slot
,
0
,
fp
->
symbols_per_slot
,
aa
);
...
@@ -425,7 +426,7 @@ void nr_feptx_prec(RU_t *ru,int frame,int tti_tx) {
...
@@ -425,7 +426,7 @@ void nr_feptx_prec(RU_t *ru,int frame,int tti_tx) {
if
(
ru
->
num_gNB
==
1
){
if
(
ru
->
num_gNB
==
1
){
gNB
=
gNB_list
[
0
];
gNB
=
gNB_list
[
0
];
cfg
=
&
gNB
->
gNB_config
;
cfg
=
&
gNB
->
gNB_config
;
if
(
nr_slot_select
(
cfg
,
tti_tx
)
==
SF_UL
)
return
;
if
(
nr_slot_select
(
cfg
,
tti_tx
,
frame
)
==
SF_UL
)
return
;
for
(
i
=
0
;
i
<
fp
->
Lmax
;
++
i
)
for
(
i
=
0
;
i
<
fp
->
Lmax
;
++
i
)
memcpy
((
void
*
)
ru
->
common
.
txdataF
[
i
],
memcpy
((
void
*
)
ru
->
common
.
txdataF
[
i
],
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED_NR/phy_procedures_nr_common.c
View file @
82880f61
...
@@ -33,10 +33,9 @@
...
@@ -33,10 +33,9 @@
#include "sched_nr.h"
#include "sched_nr.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/INIT/phy_init.h"
nr_subframe_t
nr_slot_select
(
nfapi_nr_config_request_t
*
cfg
,
nr_subframe_t
nr_slot_select
(
nfapi_nr_config_request_t
*
cfg
,
unsigned
char
slot
,
int
frame
)
unsigned
char
slot
)
{
{
if
(
cfg
->
subframe_config
.
duplex_mode
.
value
==
FDD
||
slot
==
NR_DOWNLINK_SLOT
)
if
(
cfg
->
subframe_config
.
duplex_mode
.
value
==
FDD
||
slot
==
NR_DOWNLINK_SLOT
||
nr_is_ssb_slot
(
cfg
,
slot
,
frame
)
==
1
)
return
(
SF_DL
);
return
(
SF_DL
);
else
if
(
slot
==
NR_UPLINK_SLOT
)
else
if
(
slot
==
NR_UPLINK_SLOT
)
return
(
SF_UL
);
return
(
SF_UL
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @
82880f61
...
@@ -97,24 +97,25 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
...
@@ -97,24 +97,25 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame, int slot) {
uint8_t
ssb_index
,
n_hf
;
uint8_t
ssb_index
,
n_hf
;
int
ssb_start_symbol
,
rel_slot
;
int
ssb_start_symbol
,
rel_slot
;
int
txdataF_offset
=
(
slot
%
2
)
*
fp
->
samples_per_slot_wCP
;
int
txdataF_offset
=
(
slot
%
2
)
*
fp
->
samples_per_slot_wCP
;
uint16_t
slots_per_hf
=
fp
->
slots_per_frame
/
2
;
n_hf
=
cfg
->
sch_config
.
half_frame_index
.
value
;
n_hf
=
cfg
->
sch_config
.
half_frame_index
.
value
;
// if SSB periodicity is 5ms, they are transmitted in both half frames
// if SSB periodicity is 5ms, they are transmitted in both half frames
if
(
cfg
->
sch_config
.
ssb_periodicity
.
value
==
5
)
{
if
(
cfg
->
sch_config
.
ssb_periodicity
.
value
==
5
)
{
if
(
slot
<
10
)
if
(
slot
<
slots_per_hf
)
n_hf
=
0
;
n_hf
=
0
;
else
else
n_hf
=
1
;
n_hf
=
1
;
}
}
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
// to set a effective slot number between 0 to 9 in the half frame where the SSB is supposed to be
rel_slot
=
(
n_hf
)
?
(
slot
-
10
)
:
slot
;
rel_slot
=
(
n_hf
)
?
(
slot
-
slots_per_hf
)
:
slot
;
LOG_D
(
PHY
,
"common_signal_procedures: frame %d, slot %d
\n
"
,
frame
,
slot
);
LOG_D
(
PHY
,
"common_signal_procedures: frame %d, slot %d
\n
"
,
frame
,
slot
);
if
(
rel_slot
<
10
&&
rel_slot
>=
0
)
{
if
(
rel_slot
<
slots_per_hf
&&
rel_slot
>=
0
)
{
for
(
int
i
=
0
;
i
<
2
;
i
++
)
{
// max two SSB per
slot
for
(
int
i
=
0
;
i
<
2
;
i
++
)
{
// max two SSB per
frame
ssb_index
=
i
+
2
*
rel_slot
;
// computing the ssb_index
ssb_index
=
i
+
2
*
rel_slot
;
// computing the ssb_index
if
((
fp
->
L_ssb
>>
ssb_index
)
&
0x01
)
{
// generating the ssb only if the bit of L_ssb at current ssb index is 1
if
((
fp
->
L_ssb
>>
ssb_index
)
&
0x01
)
{
// generating the ssb only if the bit of L_ssb at current ssb index is 1
...
@@ -163,7 +164,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
...
@@ -163,7 +164,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
else
else
ssb_frame_periodicity
=
(
cfg
->
sch_config
.
ssb_periodicity
.
value
)
/
10
;
// 10ms is the frame length
ssb_frame_periodicity
=
(
cfg
->
sch_config
.
ssb_periodicity
.
value
)
/
10
;
// 10ms is the frame length
if
((
cfg
->
subframe_config
.
duplex_mode
.
value
==
TDD
)
&&
(
nr_slot_select
(
cfg
,
slot
)
==
SF_UL
))
return
;
if
((
cfg
->
subframe_config
.
duplex_mode
.
value
==
TDD
)
&&
(
nr_slot_select
(
cfg
,
slot
,
frame
)
==
SF_UL
))
return
;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX
+
offset
,
1
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_ENB_TX
+
offset
,
1
);
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED_NR/sched_nr.h
View file @
82880f61
...
@@ -34,7 +34,7 @@
...
@@ -34,7 +34,7 @@
#include "PHY/NR_TRANSPORT/nr_dci.h"
#include "PHY/NR_TRANSPORT/nr_dci.h"
nr_slot_t
nr_slot_select
(
nfapi_nr_config_request_t
*
cfg
,
unsigned
char
slot
);
nr_slot_t
nr_slot_select
(
nfapi_nr_config_request_t
*
cfg
,
unsigned
char
slot
,
int
frame
);
void
nr_set_ssb_first_subcarrier
(
nfapi_nr_config_request_t
*
cfg
,
NR_DL_FRAME_PARMS
*
fp
);
void
nr_set_ssb_first_subcarrier
(
nfapi_nr_config_request_t
*
cfg
,
NR_DL_FRAME_PARMS
*
fp
);
void
phy_procedures_gNB_TX
(
PHY_VARS_gNB
*
gNB
,
int
frame_tx
,
int
slot_tx
,
int
do_meas
);
void
phy_procedures_gNB_TX
(
PHY_VARS_gNB
*
gNB
,
int
frame_tx
,
int
slot_tx
,
int
do_meas
);
void
phy_procedures_gNB_common_RX
(
PHY_VARS_gNB
*
gNB
,
int
frame_rx
,
int
slot_rx
);
void
phy_procedures_gNB_common_RX
(
PHY_VARS_gNB
*
gNB
,
int
frame_rx
,
int
slot_rx
);
...
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