Commit 49903110 authored by Raymond Knopp's avatar Raymond Knopp

Further modification for particular use of ID

i Please enter the commit message for your changes. Lines starting
parent dc7fc1fd
...@@ -102,6 +102,8 @@ int attach_rru(RU_t *ru); ...@@ -102,6 +102,8 @@ int attach_rru(RU_t *ru);
int connect_rau(RU_t *ru); int connect_rau(RU_t *ru);
static void NRRCconfig_RU(configmodule_interface_t *cfg); static void NRRCconfig_RU(configmodule_interface_t *cfg);
extern uint32_t timing_advance;
extern int emulate_rf; extern int emulate_rf;
extern int numerology; extern int numerology;
...@@ -752,7 +754,7 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot) ...@@ -752,7 +754,7 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot)
const uint8_t *beam_ids = ru->common.beam_id[0]; const uint8_t *beam_ids = ru->common.beam_id[0];
int prev_beam = beam_ids[prev_slot * fp->symbols_per_slot]; int prev_beam = beam_ids[prev_slot * fp->symbols_per_slot];
int beam = beam_ids[slot * fp->symbols_per_slot]; int beam = beam_ids[slot * fp->symbols_per_slot];
if (prev_beam != beam) { if (prev_beam != beam && beam!=255) {
flags_gpio = beam | TX_GPIO_CHANGE; // enable change of gpio flags_gpio = beam | TX_GPIO_CHANGE; // enable change of gpio
LOG_I(HW, "slot %d, beam %d\n", slot, ru->common.beam_id[0][slot * fp->symbols_per_slot]); LOG_I(HW, "slot %d, beam %d\n", slot, ru->common.beam_id[0][slot * fp->symbols_per_slot]);
} }
...@@ -761,16 +763,27 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot) ...@@ -761,16 +763,27 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot)
case RU_GPIO_CONTROL_INTERDIGITAL: { case RU_GPIO_CONTROL_INTERDIGITAL: {
// the beam index is written in bits 8-10 of the flags // the beam index is written in bits 8-10 of the flags
// bit 11 enables the gpio programming // bit 11 enables the gpio programming
int beam = 0; // the beam index is written in bits 8-10 of the flags
if ((slot % 10 == 0) && ru->common.beam_id && (ru->common.beam_id[0][slot * fp->symbols_per_slot] < 64)) { // bit 11 enables the gpio programming
int beam = 0; int beamID =0;
if (ru->common.beam_id) {
// if ((slot % 10 == 0) && ru->common.beam_id && (ru->common.beam_id[0][slot * fp->symbols_per_slot] < 64)) {
// beam = ru->common.beam_id[0][slot*fp->symbols_per_slot] | 64; // beam = ru->common.beam_id[0][slot*fp->symbols_per_slot] | 64;
beam = 1024; // hardcoded now for beam32 boresight int prev_slot = (slot - 1 + fp->slots_per_frame) % fp->slots_per_frame;
const uint8_t *beam_ids = ru->common.beam_id[0];
int prev_beam = beam_ids[prev_slot * fp->symbols_per_slot];
beam = beam_ids[slot * fp->symbols_per_slot];
if (prev_beam != beam && beam!= 255) {
beamID = 32 + (beam * 32);
//int beam = 1024; // hardcoded now for beam32 boresight
// beam = 127; //for the sake of trying beam63 // beam = 127; //for the sake of trying beam63
LOG_D(HW, "slot %d, beam %d\n", slot, beam); LOG_D(HW, "slot %d, beam %d\n", slot, beam);
} flags_gpio = beamID | TX_GPIO_CHANGE;
flags_gpio = beam | TX_GPIO_CHANGE;
// flags_gpio |= beam << 8; // MSB 8 bits are used for beam // flags_gpio |= beam << 8; // MSB 8 bits are used for beam
LOG_I(HW, "slot %d, beam %d, flags_gpio %d\n", slot, beam, flags_gpio); LOG_D(HW, "slot %d, beamID %d, flags_gpio %d\n", slot, beamID, flags_gpio);
}
}
break; break;
} }
default: default:
......
...@@ -135,7 +135,7 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB,int frame,int slot, nfapi_nr_ ...@@ -135,7 +135,7 @@ void nr_common_signal_procedures(PHY_VARS_gNB *gNB,int frame,int slot, nfapi_nr_
// Beam_id is currently used only for FR2 // Beam_id is currently used only for FR2
if (fp->freq_range == FR2){ if (fp->freq_range == FR2){
LOG_D(PHY,"slot %d, ssb_index %d, beam %d\n",slot,ssb_index,cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value); LOG_I(PHY,"slot %d, ssb_index %d, beam %d\n",slot,ssb_index,cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value);
for (int j=0;j<fp->symbols_per_slot;j++) for (int j=0;j<fp->symbols_per_slot;j++)
gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value; gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot+j] = cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value;
} }
......
...@@ -600,7 +600,7 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant ...@@ -600,7 +600,7 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant
for (int i = 0; i < 32; i++) { for (int i = 0; i < 32; i++) {
cfg->ssb_table.ssb_beam_id_list[i].beam_id.tl.tag = NFAPI_NR_CONFIG_BEAM_ID_TAG; cfg->ssb_table.ssb_beam_id_list[i].beam_id.tl.tag = NFAPI_NR_CONFIG_BEAM_ID_TAG;
if ((cfg->ssb_table.ssb_mask_list[0].ssb_mask.value >> (31 - i)) & 1) { if ((cfg->ssb_table.ssb_mask_list[0].ssb_mask.value >> (31 - i)) & 1) {
cfg->ssb_table.ssb_beam_id_list[i].beam_id.value = num_ssb; cfg->ssb_table.ssb_beam_id_list[i].beam_id.value = i; // num_ssb;
num_ssb++; num_ssb++;
} }
cfg->num_tlv++; cfg->num_tlv++;
...@@ -608,7 +608,7 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant ...@@ -608,7 +608,7 @@ static void config_common(gNB_MAC_INST *nrmac, nr_pdsch_AntennaPorts_t pdsch_Ant
for (int i = 0; i < 32; i++) { for (int i = 0; i < 32; i++) {
cfg->ssb_table.ssb_beam_id_list[32 + i].beam_id.tl.tag = NFAPI_NR_CONFIG_BEAM_ID_TAG; cfg->ssb_table.ssb_beam_id_list[32 + i].beam_id.tl.tag = NFAPI_NR_CONFIG_BEAM_ID_TAG;
if ((cfg->ssb_table.ssb_mask_list[1].ssb_mask.value >> (31 - i)) & 1) { if ((cfg->ssb_table.ssb_mask_list[1].ssb_mask.value >> (31 - i)) & 1) {
cfg->ssb_table.ssb_beam_id_list[32 + i].beam_id.value = num_ssb; cfg->ssb_table.ssb_beam_id_list[32 + i].beam_id.value = 32+i; //num_ssb;
num_ssb++; num_ssb++;
} }
cfg->num_tlv++; cfg->num_tlv++;
......
...@@ -157,7 +157,7 @@ void clear_beam_information(NR_beam_info_t *beam_info, int frame, int slot, int ...@@ -157,7 +157,7 @@ void clear_beam_information(NR_beam_info_t *beam_info, int frame, int slot, int
if(beam_info->beam_allocation_size == -1) { if(beam_info->beam_allocation_size == -1) {
int size = mu == 0 ? slots_per_frame << 1 : slots_per_frame; int size = mu == 0 ? slots_per_frame << 1 : slots_per_frame;
// slots in beam period gives the number of consecutive slots tied the the same beam // slots in beam period gives the number of consecutive slots tied the the same beam
AssertFatal(size % beam_info->slots_in_beam_period, AssertFatal(size % beam_info->slots_in_beam_period == 0,
"Beam period %d should be divider of number of slots per frame %d\n", "Beam period %d should be divider of number of slots per frame %d\n",
beam_info->slots_in_beam_period, slots_per_frame); beam_info->slots_in_beam_period, slots_per_frame);
beam_info->beam_allocation_size = size / beam_info->slots_in_beam_period; beam_info->beam_allocation_size = size / beam_info->slots_in_beam_period;
...@@ -168,9 +168,14 @@ void clear_beam_information(NR_beam_info_t *beam_info, int frame, int slot, int ...@@ -168,9 +168,14 @@ void clear_beam_information(NR_beam_info_t *beam_info, int frame, int slot, int
} }
} }
const int prev_slot = (frame * slots_per_frame + slot + beam_info->beam_allocation_size - 1) % beam_info->beam_allocation_size; const int prev_slot = (frame * slots_per_frame + slot + beam_info->beam_allocation_size - 1) % beam_info->beam_allocation_size;
// resetting previous slot allocation // resetting previous beam allocation
for (int i = 0; i < beam_info->beams_per_period; i++) int j = (int) (prev_slot / beam_info->slots_in_beam_period);
beam_info->beam_allocation[i][prev_slot] = -1; int k = (int) (slot / beam_info->slots_in_beam_period);
if(j == k)
return;
else
for (int i = 0; i < beam_info->beams_per_period; i++)
beam_info->beam_allocation[i][j] = -1;
} }
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) { bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
......
...@@ -138,10 +138,10 @@ static int16_t ssb_index_from_prach(module_id_t module_idP, ...@@ -138,10 +138,10 @@ static int16_t ssb_index_from_prach(module_id_t module_idP,
prach_occasion_id = (((frameP % (cc->max_association_period * config_period)) / config_period) * cc->total_prach_occasions_per_config_period) + prach_occasion_id = (((frameP % (cc->max_association_period * config_period)) / config_period) * cc->total_prach_occasions_per_config_period) +
(RA_sfn_index + slot_index) * N_t_slot * fdm + start_symbol_index * fdm + freq_index; (RA_sfn_index + slot_index) * N_t_slot * fdm + start_symbol_index * fdm + freq_index;
//one SSB have more than one continuous RO // one RO is shared by one or more SSB // dont think this statement is true, it should be one SSB is shared by multiple ROs like if it is 1/2 then two ROs shared the same SSB
if(num_ssb_per_RO <= 1) if(num_ssb_per_RO <= 1)
index = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % num_active_ssb; index = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % num_active_ssb;
//one RO is shared by one or more SSB // one SSB have more than one continuous RO // same applies here, i dont think it's true, should be one RO has more than one SSB like 8 SSBs
else if (num_ssb_per_RO > 1) { else if (num_ssb_per_RO > 1) {
index = (prach_occasion_id * (int)num_ssb_per_RO) % num_active_ssb; index = (prach_occasion_id * (int)num_ssb_per_RO) % num_active_ssb;
for(int j = 0; j < num_ssb_per_RO; j++) { for(int j = 0; j < num_ssb_per_RO; j++) {
...@@ -150,7 +150,7 @@ static int16_t ssb_index_from_prach(module_id_t module_idP, ...@@ -150,7 +150,7 @@ static int16_t ssb_index_from_prach(module_id_t module_idP,
} }
} }
LOG_D(NR_MAC, "Frame %d, Slot %d: Prach Occasion id = %d ssb per RO = %f number of active SSB %u index = %d fdm %u symbol index %u freq_index %u total_RApreambles %u\n", LOG_I(NR_MAC, "Frame %d, Slot %d: Prach Occasion id = %d ssb per RO = %f number of active SSB %u index = %d fdm %u symbol index %u freq_index %u total_RApreambles %u\n",
frameP, slotP, prach_occasion_id, num_ssb_per_RO, num_active_ssb, index, fdm, start_symbol_index, freq_index, total_RApreambles); frameP, slotP, prach_occasion_id, num_ssb_per_RO, num_active_ssb, index, fdm, start_symbol_index, freq_index, total_RApreambles);
return index; return index;
...@@ -248,14 +248,15 @@ void find_SSB_and_RO_available(gNB_MAC_INST *nrmac) ...@@ -248,14 +248,15 @@ void find_SSB_and_RO_available(gNB_MAC_INST *nrmac)
cc->total_prach_occasions = total_RA_occasions - unused_RA_occasion; cc->total_prach_occasions = total_RA_occasions - unused_RA_occasion;
cc->num_active_ssb = num_active_ssb; cc->num_active_ssb = num_active_ssb;
LOG_D(NR_MAC, LOG_I(NR_MAC,
"Total available RO %d, num of active SSB %d: unused RO = %d association_period %u N_RA_sfn %u total_prach_occasions_per_config_period %u\n", "Total available RO %d, num of active SSB %d: unused RO = %d association_period %u N_RA_sfn %u total_prach_occasions_per_config_period %u cc->ssb_index %d\n",
cc->total_prach_occasions, cc->total_prach_occasions,
cc->num_active_ssb, cc->num_active_ssb,
unused_RA_occasion, unused_RA_occasion,
cc->max_association_period, cc->max_association_period,
N_RA_sfn, N_RA_sfn,
cc->total_prach_occasions_per_config_period); cc->total_prach_occasions_per_config_period,
cc->ssb_index[num_active_ssb-1]);
} }
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP) void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
...@@ -331,13 +332,15 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP ...@@ -331,13 +332,15 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
float num_ssb_per_RO = ssb_per_rach_occasion[cfg->prach_config.ssb_per_rach.value]; float num_ssb_per_RO = ssb_per_rach_occasion[cfg->prach_config.ssb_per_rach.value];
if(num_ssb_per_RO <= 1) { if(num_ssb_per_RO <= 1) {
int ssb_index = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % cc->num_active_ssb; int ssb_index = (int) (prach_occasion_id / (int)(1 / num_ssb_per_RO)) % cc->num_active_ssb;
bool ret = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, ssb_index, nr_slots_per_frame[mu]); int beam_id = cc->ssb_index[ssb_index];
bool ret = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_id, nr_slots_per_frame[mu]);// this is absoultely wrong as this is not ssb_index but just an index and def notbeamID
AssertFatal(ret, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", ssb_index); AssertFatal(ret, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", ssb_index);
} }
else { else {
int first_ssb_index = (prach_occasion_id * (int)num_ssb_per_RO) % cc->num_active_ssb; int first_ssb_index = (prach_occasion_id * (int)num_ssb_per_RO) % cc->num_active_ssb;
for(int j = first_ssb_index; j < num_ssb_per_RO; j++) { for(int j = first_ssb_index; j < num_ssb_per_RO; j++) {
bool ret = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, j, nr_slots_per_frame[mu]); int beam_id = cc->ssb_index[j];
bool ret = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, beam_id , nr_slots_per_frame[mu]);
AssertFatal(ret, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j); AssertFatal(ret, "Cannot allocate PRACH corresponding to SSB %d in any available beam\n", j);
} }
} }
...@@ -493,6 +496,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, ...@@ -493,6 +496,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
uint8_t symbol, uint8_t symbol,
int16_t timing_offset) int16_t timing_offset)
{ {
timing_offset = 4;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
...@@ -542,7 +546,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, ...@@ -542,7 +546,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
configure_UE_BWP(nr_mac, scc, NULL, ra, NULL, -1, -1); configure_UE_BWP(nr_mac, scc, NULL, ra, NULL, -1, -1);
uint8_t beam_index = ssb_index_from_prach(module_idP, frameP, slotP, preamble_index, freq_index, symbol); uint8_t beam_index = ssb_index_from_prach(module_idP, frameP, slotP, preamble_index, freq_index, symbol); // should be called index for the SSB array to give the beam index.
ra->beam_id = cc->ssb_index[beam_index]; ra->beam_id = cc->ssb_index[beam_index];
NR_SCHED_UNLOCK(&nr_mac->sched_lock); NR_SCHED_UNLOCK(&nr_mac->sched_lock);
...@@ -1311,7 +1315,7 @@ static void nr_generate_Msg2(module_id_t module_idP, ...@@ -1311,7 +1315,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
return; return;
} }
LOG_D(NR_MAC, "Msg2 startSymbolIndex.nrOfSymbols %d.%d\n", tda_info.startSymbolIndex, tda_info.nrOfSymbols); LOG_I(NR_MAC, "Msg2 startSymbolIndex.nrOfSymbols %d.%d\n", tda_info.startSymbolIndex, tda_info.nrOfSymbols);
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially // look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them // important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
...@@ -1340,7 +1344,7 @@ static void nr_generate_Msg2(module_id_t module_idP, ...@@ -1340,7 +1344,7 @@ static void nr_generate_Msg2(module_id_t module_idP,
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0; pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0; pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = 0;
LOG_A(NR_MAC, LOG_I(NR_MAC,
"UE %04x: %d.%d Generating RA-Msg2 DCI, RA RNTI 0x%x, state %d, CoreSetType %d, RAPID %d\n", "UE %04x: %d.%d Generating RA-Msg2 DCI, RA RNTI 0x%x, state %d, CoreSetType %d, RAPID %d\n",
ra->rnti, ra->rnti,
frameP, frameP,
...@@ -1733,10 +1737,32 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1733,10 +1737,32 @@ static void nr_generate_Msg4(module_id_t module_idP,
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_UE_DL_BWP_t *dl_bwp = &ra->DL_BWP; NR_UE_DL_BWP_t *dl_bwp = &ra->DL_BWP;
// ADDED but might not be nessecary , just for forcing the MSG4 in certain slots////
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
// lenght of tdd period in slots
const int n_slots_frame = nr_slots_per_frame[dl_bwp->scs];
int tdd_period_slot =n_slots_frame;
if (tdd) {
tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else{
if(cc->frame_type == TDD)
AssertFatal(cc->frame_type == FDD, "Dynamic TDD not handled yet\n");
}
// FR2 schedule Msg4 in slot 2 of TDD period
if (dl_bwp->scs >= 3 &&(!(slotP%tdd_period_slot == 4 || slotP%tdd_period_slot == 4 || slotP%tdd_period_slot == 2))) return;
LOG_I(NR_MAC, "frame %d and slot %d\n", frameP, slotP );
///////end of not necessary //////
// if it is a DL slot, if the RA is in MSG4 state // if it is a DL slot, if the RA is in MSG4 state
if (is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[slotP / 64], slotP)) { if (is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[slotP / 64], slotP)) {
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; // NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_SearchSpace_t *ss = ra->ra_ss; NR_SearchSpace_t *ss = ra->ra_ss;
NR_ControlResourceSet_t *coreset = ra->coreset; NR_ControlResourceSet_t *coreset = ra->coreset;
...@@ -1984,7 +2010,11 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1984,7 +2010,11 @@ static void nr_generate_Msg4(module_id_t module_idP,
} }
ra->ra_state = nrRA_WAIT_Msg4_ACK; ra->ra_state = nrRA_WAIT_Msg4_ACK;
LOG_I(NR_MAC,"UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", ra->rnti, pucch->frame, pucch->ul_slot, harq->tb_size); // LOG_I(NR_MAC,"UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", ra->rnti, pucch->frame, pucch->ul_slot, harq->tb_size);
LOG_I(NR_MAC,"UE %04x Generate msg4 in %d.%d: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", ra->rnti, frameP, slotP, pucch->frame, pucch->ul_slot, harq->tb_size);
} }
} }
......
...@@ -89,6 +89,10 @@ static void schedule_ssb(frame_t frame, ...@@ -89,6 +89,10 @@ static void schedule_ssb(frame_t frame,
dl_req->nPDUs++; dl_req->nPDUs++;
LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n",i_ssb,frame,slot); LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n",i_ssb,frame,slot);
LOG_D(MAC," Scheduling SSB %d with offsetPointA %d and Kssb %d\n", i_ssb, offset_pointa, scoffset);
LOG_D(MAC,"Scheduling the SSBBeamfromtheMAC %d\n", dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx);
} }
static void fill_ssb_vrb_map(NR_COMMON_channels_t *cc, int rbStart, int ssb_subcarrier_offset, uint16_t symStart, int CC_id) static void fill_ssb_vrb_map(NR_COMMON_channels_t *cc, int rbStart, int ssb_subcarrier_offset, uint16_t symStart, int CC_id)
...@@ -241,7 +245,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, ...@@ -241,7 +245,7 @@ void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP,
ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb); ssb_start_symbol = get_ssb_start_symbol(band, scs, i_ssb);
// if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters // if start symbol is in current slot, schedule current SSB, fill VRB map and call get_type0_PDCCH_CSS_config_parameters
if ((ssb_start_symbol / 14) == rel_slot){ if ((ssb_start_symbol / 14) == rel_slot){
bool ret = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame); bool ret = beam_allocation_procedure(&gNB->beam_info, frameP, slotP, i_ssb, n_slots_frame); //check this i_ssb thing
AssertFatal(ret, "Cannot allocate SSB %d in any available beam\n", i_ssb); AssertFatal(ret, "Cannot allocate SSB %d in any available beam\n", i_ssb);
const int prb_offset = offset_pointa >> (scs-2); // reference 60kHz const int prb_offset = offset_pointa >> (scs-2); // reference 60kHz
schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu); schedule_ssb(frameP, slotP, scc, dl_req, i_ssb, ssbSubcarrierOffset, offset_pointa, mib_pdu);
......
...@@ -3096,7 +3096,8 @@ bool beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, i ...@@ -3096,7 +3096,8 @@ bool beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, i
// if digital beamforming, no restriction // if digital beamforming, no restriction
if(!beam_info->beam_allocation) if(!beam_info->beam_allocation)
return true; return true;
const int index = (frame * slots_per_frame + slot) % beam_info->beam_allocation_size; const int curr_slot = (frame * slots_per_frame + slot) % beam_info->beam_allocation_size;
const int index = (int) (curr_slot / beam_info->slots_in_beam_period);
for (int i = 0; i < beam_info->beams_per_period; i++) { for (int i = 0; i < beam_info->beams_per_period; i++) {
if (beam_info->beam_allocation[i][index] == -1 || if (beam_info->beam_allocation[i][index] == -1 ||
beam_info->beam_allocation[i][index] == beam_index) { beam_info->beam_allocation[i][index] == beam_index) {
...@@ -3112,7 +3113,9 @@ void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_ ...@@ -3112,7 +3113,9 @@ void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_
// if digital beamforming, no restriction // if digital beamforming, no restriction
if(!beam_info->beam_allocation) if(!beam_info->beam_allocation)
return; return;
const int index = (frame * slots_per_frame + slot) % beam_info->beam_allocation_size; const int curr_slot = (frame * slots_per_frame + slot) % beam_info->beam_allocation_size;
const int index = (int) (curr_slot / beam_info->slots_in_beam_period);
// const int index = (frame * slots_per_frame + slot) % beam_info->beam_allocation_size;
for (int i = 0; i < beam_info->beams_per_period; i++) { for (int i = 0; i < beam_info->beams_per_period; i++) {
if (beam_info->beam_allocation[i][index] == beam_index) if (beam_info->beam_allocation[i][index] == beam_index)
beam_info->beam_allocation[i][index] = -1; beam_info->beam_allocation[i][index] = -1;
......
...@@ -264,6 +264,8 @@ static int sync_to_gps(openair0_device *device) { ...@@ -264,6 +264,8 @@ static int sync_to_gps(openair0_device *device) {
#define ATR_RX 0x50 //data[4] and data[6] #define ATR_RX 0x50 //data[4] and data[6]
#define ATR_XX 0x20 //data[5] #define ATR_XX 0x20 //data[5]
#define MAN_MASK ATR_MASK ^ 0xFFF // manually controlled pins #define MAN_MASK ATR_MASK ^ 0xFFF // manually controlled pins
#define MAN_MASK_ID 0x7E0 // manually controlled pins for ID in particular for Beams switching
static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state_t *s) static void trx_usrp_start_interdigital_gpio(openair0_device *device, usrp_state_t *s)
{ {
...@@ -498,7 +500,10 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_BEAM_SWITCHI ...@@ -498,7 +500,10 @@ VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_BEAM_SWITCHI
if ((flags_gpio & TX_GPIO_CHANGE) != 0) { if ((flags_gpio & TX_GPIO_CHANGE) != 0) {
// push GPIO bits // push GPIO bits
s->usrp->set_command_time(s->tx_md.time_spec); s->usrp->set_command_time(s->tx_md.time_spec);
s->usrp->set_gpio_attr(s->gpio_bank, "OUT", flags_gpio, MAN_MASK); if (device->openair0_cfg->gpio_controller == RU_GPIO_CONTROL_INTERDIGITAL)
s->usrp->set_gpio_attr(s->gpio_bank, "OUT", flags_gpio, MAN_MASK_ID);
else
s->usrp->set_gpio_attr(s->gpio_bank, "OUT", flags_gpio, MAN_MASK);
s->usrp->clear_command_time(); s->usrp->clear_command_time();
} }
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_BEAM_SWITCHING_GPIO,0); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_BEAM_SWITCHING_GPIO,0);
...@@ -627,7 +632,10 @@ void *trx_usrp_write_thread(void * arg){ ...@@ -627,7 +632,10 @@ void *trx_usrp_write_thread(void * arg){
if (flags_gpio&0x1000) { if (flags_gpio&0x1000) {
// push GPIO bits // push GPIO bits
s->usrp->set_command_time(s->tx_md.time_spec); s->usrp->set_command_time(s->tx_md.time_spec);
s->usrp->set_gpio_attr(s->gpio_bank, "OUT", flags_gpio, MAN_MASK); if (device->openair0_cfg->gpio_controller == RU_GPIO_CONTROL_INTERDIGITAL)
s->usrp->set_gpio_attr(s->gpio_bank, "OUT", flags_gpio, MAN_MASK_ID);
else
s->usrp->set_gpio_attr(s->gpio_bank, "OUT", flags_gpio, MAN_MASK);
s->usrp->clear_command_time(); s->usrp->clear_command_time();
} }
...@@ -1231,7 +1239,7 @@ extern "C" { ...@@ -1231,7 +1239,7 @@ extern "C" {
case 184320000: case 184320000:
// from usrp_time_offset // from usrp_time_offset
// openair0_cfg[0].samples_per_packet = 2048; // openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15; // to be checked openair0_cfg[0].tx_sample_advance = 15; // to be checked
openair0_cfg[0].tx_bw = 100e6; openair0_cfg[0].tx_bw = 100e6;
openair0_cfg[0].rx_bw = 100e6; openair0_cfg[0].rx_bw = 100e6;
break; break;
...@@ -1239,7 +1247,7 @@ extern "C" { ...@@ -1239,7 +1247,7 @@ extern "C" {
case 122880000: case 122880000:
// from usrp_time_offset // from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048; //openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15; //to be checked openair0_cfg[0].tx_sample_advance = 164; //it was 15; //to be checked
openair0_cfg[0].tx_bw = 80e6; openair0_cfg[0].tx_bw = 80e6;
openair0_cfg[0].rx_bw = 80e6; openair0_cfg[0].rx_bw = 80e6;
break; break;
......
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