Commit f86e6cc7 authored by Thomas Schlichter's avatar Thomas Schlichter

NR UE: add NTN specific parameter cellSpecificKoffset_r17 and use it for UL scheduling

According to the RRC specification, cellSpecificKoffset is:
Scheduling offset used for the timing relationships that are modified for NTN (see TS 38.213 [13]).
The unit of the field K_offset is number of slots for a given subcarrier spacing of 15 kHz.
If the field is absent UE assumes value 0

This parameter `cellSpecificKoffset_r17` can be set via UE command line parameter `--ntn-koffset`.
parent f7c27328
......@@ -159,6 +159,9 @@ int oaisim_flag = 0;
int emulate_rf = 0;
uint32_t N_RB_DL = 106;
// NTN cellSpecificKoffset-r17, but in slots for DL SCS
unsigned int NTN_UE_Koffset = 0;
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
* this is very hackish - find a proper solution
*/
......@@ -566,6 +569,9 @@ int main(int argc, char **argv)
init_nr_ue_vars(UE[CC_id], 0, abstraction_flag);
}
// NTN cellSpecificKoffset-r17, but in slots for DL SCS
NTN_UE_Koffset = nrUE_params.ntn_koffset << UE[0]->frame_parms.numerology_index;
init_openair0();
set_latency_target();
......
......@@ -12,6 +12,7 @@
#define CONFIG_HLP_DLSCH_PARA "number of threads for dlsch processing 0 for no parallelization\n"
#define CONFIG_HLP_OFFSET_DIV "Divisor for computing OFDM symbol offset in Rx chain (num samples in CP/<the value>). Default value is 8. To set the sample offset to 0, set this value ~ 10e6\n"
#define CONFIG_HLP_MAX_LDPC_ITERATIONS "Maximum LDPC decoder iterations\n"
#define CONFIG_HLP_NTN_KOFFSET "NTN cellSpecificKoffset-r17 (number of slots for a given subcarrier spacing of 15 kHz)\n"
/***************************************************************************************************************************************/
/* command line options definitions, CMDLINE_XXXX_DESC macros are used to initialize paramdef_t arrays which are then used as argument
when calling config_get or config_getlist functions */
......@@ -61,6 +62,7 @@
{"chest-time", CONFIG_HLP_CHESTTIME, 0, .iptr=&(nrUE_params.chest_time), .defintval=0, TYPE_INT, 0}, \
{"ue-timing-correction-disable", CONFIG_HLP_DISABLETIMECORR, PARAMFLAG_BOOL, .iptr=&(nrUE_params.no_timing_correction), .defintval=0, TYPE_INT, 0}, \
{"SLC", CONFIG_HLP_SLF, 0, .u64ptr=&(sidelink_frequency[0][0]), .defuintval=2600000000,TYPE_UINT64,0}, \
{"ntn-koffset", CONFIG_HLP_NTN_KOFFSET, 0, .uptr=&(nrUE_params.ntn_koffset), .defuintval=0, TYPE_UINT, 0}, \
}
// clang-format on
......@@ -80,6 +82,7 @@ typedef struct {
int nb_antennas_tx;
int N_RB_DL;
int ssb_start_subcarrier;
unsigned int ntn_koffset;
} nrUE_params_t;
extern uint64_t get_nrUE_optmask(void);
extern uint64_t set_nrUE_optmask(uint64_t bitmask);
......
......@@ -196,7 +196,7 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
uint8_t pucch_id,
uint8_t harq_id,
int8_t delta_pucch,
uint8_t data_toul_fb,
uint16_t data_toul_fb,
uint8_t dai,
int n_CCE,
int N_CCE,
......
......@@ -41,6 +41,8 @@
#include <executables/softmodem-common.h>
#include "openair2/LAYER2/RLC/rlc.h"
extern unsigned int NTN_UE_Koffset;
int16_t get_prach_tx_power(NR_UE_MAC_INST_t *mac)
{
RA_config_t *ra = &mac->ra;
......@@ -571,12 +573,12 @@ void nr_Msg3_transmitted(NR_UE_MAC_INST_t *mac, uint8_t CC_id, frame_t frameP, s
RA_config_t *ra = &mac->ra;
NR_RACH_ConfigCommon_t *nr_rach_ConfigCommon = mac->current_UL_BWP->rach_ConfigCommon;
long mu = mac->current_UL_BWP->scs;
int subframes_per_slot = nr_slots_per_frame[mu] / 10;
int slots_per_subframe = nr_slots_per_frame[mu] / 10;
// start contention resolution timer
int RA_contention_resolution_timer_subframes = (nr_rach_ConfigCommon->ra_ContentionResolutionTimer + 1) << 3;
// timer step 1 slot and timer target given by ra_ContentionResolutionTimer
nr_timer_setup(&ra->contention_resolution_timer, RA_contention_resolution_timer_subframes * subframes_per_slot, 1);
nr_timer_setup(&ra->contention_resolution_timer, RA_contention_resolution_timer_subframes * slots_per_subframe + NTN_UE_Koffset, 1);
nr_timer_start(&ra->contention_resolution_timer);
ra->ra_state = nrRA_WAIT_CONTENTION_RESOLUTION;
......@@ -782,7 +784,7 @@ void nr_get_RA_window(NR_UE_MAC_INST_t *mac)
int ra_ResponseWindow = rach_ConfigGeneric->ra_ResponseWindow;
int mu = mac->current_DL_BWP->scs;
ra->RA_window_cnt = ra->RA_offset * nr_slots_per_frame[mu]; // taking into account the 2 frames gap introduced by OAI gNB
ra->RA_window_cnt = ra->RA_offset * nr_slots_per_frame[mu] + NTN_UE_Koffset; // taking into account the 2 frames gap introduced by OAI gNB
switch (ra_ResponseWindow) {
case NR_RACH_ConfigGeneric__ra_ResponseWindow_sl1:
......
......@@ -66,6 +66,8 @@
// #define DEBUG_RAR
extern uint32_t N_RB_DL;
extern unsigned int NTN_UE_Koffset;
/* TS 38.213 9.2.5.2 UE procedure for multiplexing HARQ-ACK/SR and CSI in a PUCCH */
/* this is a counter of number of pucch format 4 per subframe */
static int nb_pucch_format_4_in_subframes[LTE_NUMBER_OF_SUBFRAMES_PER_FRAME] = { 0 } ;
......@@ -434,7 +436,7 @@ static int nr_ue_process_dci_ul_00(NR_UE_MAC_INST_t *mac,
if (tda_info.nrOfSymbols == 0)
return -1;
if (-1 == nr_ue_pusch_scheduler(mac, 0, frame, slot, &frame_tx, &slot_tx, tda_info.k2)) {
if (-1 == nr_ue_pusch_scheduler(mac, 0, frame, slot, &frame_tx, &slot_tx, tda_info.k2 + NTN_UE_Koffset)) {
LOG_E(MAC, "Cannot schedule PUSCH\n");
return -1;
}
......@@ -507,7 +509,7 @@ static int nr_ue_process_dci_ul_01(NR_UE_MAC_INST_t *mac,
if (tda_info.nrOfSymbols == 0)
return -1;
if (-1 == nr_ue_pusch_scheduler(mac, 0, frame, slot, &frame_tx, &slot_tx, tda_info.k2)) {
if (-1 == nr_ue_pusch_scheduler(mac, 0, frame, slot, &frame_tx, &slot_tx, tda_info.k2 + NTN_UE_Koffset)) {
LOG_E(MAC, "Cannot schedule PUSCH\n");
return -1;
}
......@@ -797,10 +799,14 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
return -1;
}
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
// according to TS 38.213 9.2.3
uint16_t feedback_ti = 1 + dci->pdsch_to_harq_feedback_timing_indicator.val + NTN_UE_Koffset;
if (dci_ind->rnti != mac->ra.ra_rnti && dci_ind->rnti != SI_RNTI) {
AssertFatal(1 + dci->pdsch_to_harq_feedback_timing_indicator.val > DURATION_RX_TO_TX,
AssertFatal(feedback_ti > DURATION_RX_TO_TX,
"PDSCH to HARQ feedback time (%d) needs to be higher than DURATION_RX_TO_TX (%d).\n",
1 + dci->pdsch_to_harq_feedback_timing_indicator.val,
feedback_ti,
DURATION_RX_TO_TX);
// set the harq status at MAC for feedback
const int tpc[] = {-1, 0, 1, 3};
......@@ -808,7 +814,7 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
dci->pucch_resource_indicator,
dci->harq_pid,
tpc[dci->tpc],
1 + dci->pdsch_to_harq_feedback_timing_indicator.val,
feedback_ti,
dci->dai[0].val,
dci_ind->n_CCE,
dci_ind->N_CCE,
......@@ -842,9 +848,9 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
dlsch_pdu->scaling_factor_S,
dci->tpc,
dci->pucch_resource_indicator,
1 + dci->pdsch_to_harq_feedback_timing_indicator.val);
feedback_ti);
dlsch_pdu->k1_feedback = 1 + dci->pdsch_to_harq_feedback_timing_indicator.val;
dlsch_pdu->k1_feedback = feedback_ti;
LOG_D(MAC, "(nr_ue_procedures.c) pdu_type=%d\n\n", dl_conf_req->pdu_type);
......@@ -1126,7 +1132,7 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
// according to TS 38.213 Table 9.2.3-1
uint8_t feedback_ti = pucch_Config->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0];
uint16_t feedback_ti = pucch_Config->dl_DataToUL_ACK->list.array[dci->pdsch_to_harq_feedback_timing_indicator.val][0] + NTN_UE_Koffset;
AssertFatal(feedback_ti > DURATION_RX_TO_TX,
"PDSCH to HARQ feedback time (%d) needs to be higher than DURATION_RX_TO_TX (%d). Min feedback time set in config "
......@@ -1318,7 +1324,7 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
uint8_t pucch_id,
uint8_t harq_id,
int8_t delta_pucch,
uint8_t data_toul_fb,
uint16_t data_toul_fb,
uint8_t dai,
int n_CCE,
int N_CCE,
......@@ -1339,7 +1345,7 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
current_harq->ul_frame = frame;
current_harq->ul_slot = slot + data_toul_fb;
if (current_harq->ul_slot >= slots_per_frame) {
current_harq->ul_frame = (frame + 1) % 1024;
current_harq->ul_frame = (frame + current_harq->ul_slot / slots_per_frame) % MAX_FRAME_NUMBER;
current_harq->ul_slot %= slots_per_frame;
}
// counter DAI in DCI ranges from 0 to 3
......@@ -3527,9 +3533,12 @@ void nr_ue_process_mac_pdu(NR_UE_MAC_INST_t *mac, nr_downlink_indication_t *dl_i
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &mac->ul_time_alignment;
ul_time_alignment->tag_id = tag;
ul_time_alignment->ta_command = ta;
ul_time_alignment->frame = frameP;
ul_time_alignment->slot = slot;
ul_time_alignment->ta_apply = adjustment_ta;
const int n_slots_frame = nr_slots_per_frame[mac->current_UL_BWP->scs];
ul_time_alignment->frame = (frameP + (slot + NTN_UE_Koffset) / n_slots_frame) % MAX_FRAME_NUMBER;
ul_time_alignment->slot = (slot + NTN_UE_Koffset) % n_slots_frame;
/*
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] CE %d : UE Timing Advance : %d\n", i, pduP[1]);
......@@ -4006,9 +4015,11 @@ static void nr_ue_process_rar(NR_UE_MAC_INST_t *mac, nr_downlink_indication_t *d
LOG_E(MAC, "Cannot schedule Msg3. Something wrong in TDA information\n");
return;
}
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2);
ul_time_alignment->frame = frame_tx;
ul_time_alignment->slot = slot_tx;
ret = nr_ue_pusch_scheduler(mac, is_Msg3, frame, slot, &frame_tx, &slot_tx, tda_info.k2 + NTN_UE_Koffset);
const int n_slots_frame = nr_slots_per_frame[current_UL_BWP->scs];
ul_time_alignment->frame = (frame_tx + (slot_tx + NTN_UE_Koffset) / n_slots_frame) % MAX_FRAME_NUMBER;
ul_time_alignment->slot = (slot_tx + NTN_UE_Koffset) % n_slots_frame;
if (ret != -1) {
uint16_t rnti = mac->crnti;
......
......@@ -1019,7 +1019,7 @@ void nr_ue_aperiodic_srs_scheduling(NR_UE_MAC_INST_t *mac, long resource_trigger
LOG_E(NR_MAC, "Slot for scheduling aperiodic SRS %d is not an UL slot\n", sched_slot);
return;
}
int sched_frame = frame + (slot + slot_offset >= n_slots_frame) % 1024;
int sched_frame = frame + (slot + slot_offset / n_slots_frame) % MAX_FRAME_NUMBER;
fapi_nr_ul_config_request_pdu_t *pdu = lockGet_ul_config(mac, sched_frame, sched_slot, FAPI_NR_UL_CONFIG_TYPE_SRS);
if (!pdu)
return;
......@@ -1476,11 +1476,7 @@ int nr_ue_pusch_scheduler(const NR_UE_MAC_INST_t *mac,
DURATION_RX_TO_TX);
*slot_tx = (current_slot + k2 + delta) % nr_slots_per_frame[mu];
if (current_slot + k2 + delta >= nr_slots_per_frame[mu]){
*frame_tx = (current_frame + 1) % 1024;
} else {
*frame_tx = current_frame;
}
*frame_tx = (current_frame + (current_slot + k2 + delta) / nr_slots_per_frame[mu]) % MAX_FRAME_NUMBER;
} else {
......@@ -1498,7 +1494,7 @@ int nr_ue_pusch_scheduler(const NR_UE_MAC_INST_t *mac,
// Calculate TX slot and frame
*slot_tx = (current_slot + k2) % nr_slots_per_frame[mu];
*frame_tx = ((current_slot + k2) > (nr_slots_per_frame[mu]-1)) ? (current_frame + 1) % 1024 : current_frame;
*frame_tx = (current_frame + (current_slot + k2) / nr_slots_per_frame[mu]) % MAX_FRAME_NUMBER;
}
......
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