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lizhongxiao
OpenXG-RAN
Commits
eff40508
Commit
eff40508
authored
Oct 08, 2023
by
Robert Schmidt
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Revert "wrong? Switch FAPI CCE REG Mapping order"
This reverts commit e8326dded763e34d1023377eb1c627e3634d29d8.
parent
b4995f88
Changes
2
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2 changed files
with
5 additions
and
10 deletions
+5
-10
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+2
-2
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+3
-8
No files found.
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
View file @
eff40508
...
@@ -292,8 +292,8 @@ typedef enum {
...
@@ -292,8 +292,8 @@ typedef enum {
}
nfapi_nr_ssb_and_cset_mux_pattern_type_e
;
}
nfapi_nr_ssb_and_cset_mux_pattern_type_e
;
typedef
enum
{
typedef
enum
{
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED
=
0
,
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED
=
1
,
NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
=
1
NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
=
0
}
nfapi_nr_cce_reg_mapping_type_e
;
}
nfapi_nr_cce_reg_mapping_type_e
;
typedef
enum
{
typedef
enum
{
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @
eff40508
...
@@ -1134,10 +1134,10 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
...
@@ -1134,10 +1134,10 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
int
bwp_id
,
int
bwp_id
,
NR_SearchSpace_t
*
ss
,
NR_SearchSpace_t
*
ss
,
NR_ControlResourceSet_t
*
coreset
,
NR_ControlResourceSet_t
*
coreset
,
uint16_t
cset0_bwp_size
)
{
uint16_t
cset0_bwp_size
)
uint8_t
fsize
=
0
,
pos
=
0
;
{
gNB_MAC_INST
*
gNB_mac
=
RC
.
nrmac
[
0
];
uint8_t
fsize
=
0
,
pos
=
0
;
uint64_t
*
dci_pdu
=
(
uint64_t
*
)
pdcch_dci_pdu
->
Payload
;
uint64_t
*
dci_pdu
=
(
uint64_t
*
)
pdcch_dci_pdu
->
Payload
;
*
dci_pdu
=
0
;
*
dci_pdu
=
0
;
uint16_t
alt_size
=
0
;
uint16_t
alt_size
=
0
;
...
@@ -1352,13 +1352,8 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
...
@@ -1352,13 +1352,8 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
// Time domain assignment 4 bit
// Time domain assignment 4 bit
for
(
int
i
=
0
;
i
<
4
;
i
++
)
for
(
int
i
=
0
;
i
<
4
;
i
++
)
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
>>
(
3
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
(((
uint64_t
)
dci_pdu_rel15
->
time_domain_assignment
.
val
>>
(
3
-
i
))
&
1
)
<<
(
dci_size
-
pos
++
);
LOG_D
(
NR_MAC
,
"dci_pdu_rel15->time_domain_assignment.val = %i
\n
"
,
dci_pdu_rel15
->
time_domain_assignment
.
val
);
LOG_D
(
NR_MAC
,
"dci_pdu_rel15->time_domain_assignment.val = %i
\n
"
,
dci_pdu_rel15
->
time_domain_assignment
.
val
);
// VRB to PRB mapping 1 bit
// VRB to PRB mapping 1 bit
if
(
gNB_mac
->
sched_ctrlCommon
->
sched_pdcch
.
CceRegMappingType
)
{
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
=
1
;
}
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
&
1
)
<<
(
dci_size
-
pos
++
);
*
dci_pdu
|=
((
uint64_t
)
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
&
1
)
<<
(
dci_size
-
pos
++
);
LOG_D
(
NR_MAC
,
"dci_pdu_rel15->vrb_to_prb_mapping.val = %i
\n
"
,
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
);
LOG_D
(
NR_MAC
,
"dci_pdu_rel15->vrb_to_prb_mapping.val = %i
\n
"
,
dci_pdu_rel15
->
vrb_to_prb_mapping
.
val
);
// MCS 5bit //bit over 32, so dci_pdu ++
// MCS 5bit //bit over 32, so dci_pdu ++
...
...
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