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zzha zzha
OpenXG-RAN
Commits
41d16f16
Commit
41d16f16
authored
7 years ago
by
Cedric Roux
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Merge remote-tracking branch 'internal/mac-multi-ue' into develop_integration_w34
parents
a35865b7
622b919b
Branches unavailable
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2024.w04
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2023.w47
2023.w45
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2023.w41
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2023.w07
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2022.42
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2022.w14a
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2022.w13a
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2022.w07
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2022.w06a
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2022.w03_hotfix
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2022.w02
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2021.wk46
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2021.wk13_c
2021.w51_c
2021.w51_a
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2021.w49_b
2021.w49_a
2021.w48
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2021.w18_b
2021.w18_a
2021.w17_b
2021.w16
2021.w15
2021.w14
2021.w13_a
2021.w12
2021.w11
2021.w10
2021.w09
2021.w08
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2020.w51_2
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2020.w48_2
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2020.w45
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2020.w24
2020.w23
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2020.w19
2020.w17
2020.w16
2020.w15
2020.w11
2020.w09
2020.w06
2020.w05
2020.w04
2020.w03
2019.w51
2019.w44
2019.w41
2019.w36
2019.w30
2019.w28
2019.w27
2019.w25
2019.w23
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2019.w17
2019.w15
2019.w13
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2019.w10
2019.w09
2019.w08
2019.w07
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2019.w04
2019.w03
2018.w51
2018.w48
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2018.w41
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2018.w39
2018.w36
2018.w33
2018.w31
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2018.w10
2018.w09
2018.w08
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2018.w06
2018.w05
2018.w04
2018.w03
2018.w02
2017.w48
2017.w46
2017.w43
2017.w42
2017.w34
v2.1.0
v2.0.0
v1.2.2
v1.2.1
v1.2.0
v1.1.1
v1.1.0
v1.0.3
v1.0.2
v1.0.1
v1.0.0
v0.6.1
v0.6.1_tdd
setparam
osa-etsi-ws-ue
osa-etsi-ws-try2
osa-etsi-ws-try1
osa-etsi-ws-gNB
oai_nr_sync
nr-ip-over-lte
nr-ip-over-lte-v.1.5
nr-ip-over-lte-v.1.4
nr-ip-over-lte-v.1.3
nr-ip-over-lte-v.1.2
nr-ip-over-lte-v.1.1
nr-ip-over-lte-v.1.0
flexran-eol
develop-nr-pdcch
develop-nr-2020w03
develop-nr-2020w02
develop-nr-2019w51
develop-nr-2019w50
develop-nr-2019w48
develop-nr-2019w47
develop-nr-2019w45
develop-nr-2019w43
develop-nr-2019w42
develop-nr-2019w40
develop-nr-2019w28
develop-nr-2019w23
benetel_phase_rotation
benetel_gnb_rel_2.0
benetel_gnb_rel_1.0
benetel_enb_rel_2.0
benetel_enb_rel_1.0
No related merge requests found
Changes
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21 changed files
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225 additions
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64 deletions
+225
-64
cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.10MHz.conf
...utotests/v2/config/enb.band38.tm1.usrpb210.tdd.10MHz.conf
+1
-1
cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.20MHz.conf
...utotests/v2/config/enb.band38.tm1.usrpb210.tdd.20MHz.conf
+1
-1
cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.5MHz.conf
...autotests/v2/config/enb.band38.tm1.usrpb210.tdd.5MHz.conf
+1
-1
cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.10MHz.conf
...autotests/v2/config/enb.band7.tm1.usrpb210.fdd.10MHz.conf
+1
-1
cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.20MHz.conf
...autotests/v2/config/enb.band7.tm1.usrpb210.fdd.20MHz.conf
+1
-1
cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.5MHz.conf
.../autotests/v2/config/enb.band7.tm1.usrpb210.fdd.5MHz.conf
+1
-1
cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.10MHz.conf
...argets/autotests/v2/config/rcc.band7.tm1.if4p5.10MHz.conf
+1
-1
cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.20MHz.conf
...argets/autotests/v2/config/rcc.band7.tm1.if4p5.20MHz.conf
+1
-1
cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.5MHz.conf
...targets/autotests/v2/config/rcc.band7.tm1.if4p5.5MHz.conf
+1
-1
cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.10MHz.udp.usrpb210.conf
...sts/v2/config/rru.band7.tm1.if4p5.10MHz.udp.usrpb210.conf
+1
-1
cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.20MHz.udp.usrpb210.conf
...sts/v2/config/rru.band7.tm1.if4p5.20MHz.udp.usrpb210.conf
+1
-1
cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.5MHz.udp.usrpb210.conf
...ests/v2/config/rru.band7.tm1.if4p5.5MHz.udp.usrpb210.conf
+1
-1
openair1/PHY/LTE_TRANSPORT/dci.c
openair1/PHY/LTE_TRANSPORT/dci.c
+1
-0
openair1/PHY/LTE_TRANSPORT/pucch.c
openair1/PHY/LTE_TRANSPORT/pucch.c
+9
-8
openair1/SCHED/phy_procedures_lte_eNb.c
openair1/SCHED/phy_procedures_lte_eNb.c
+24
-0
openair2/LAYER2/MAC/eNB_scheduler.c
openair2/LAYER2/MAC/eNB_scheduler.c
+7
-1
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+23
-2
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+81
-3
openair2/LAYER2/MAC/pre_processor.c
openair2/LAYER2/MAC/pre_processor.c
+66
-36
openair2/RRC/LITE/MESSAGES/asn1_msg.c
openair2/RRC/LITE/MESSAGES/asn1_msg.c
+1
-1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band7.tm1.50PRB.if4p5-ercom.conf
...GENERIC-LTE-EPC/CONF/rcc.band7.tm1.50PRB.if4p5-ercom.conf
+1
-1
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cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.10MHz.conf
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41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
24
;
pdsch_referenceSignalPower
= -
24
;
...
...
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cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.20MHz.conf
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41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
24
;
pdsch_referenceSignalPower
= -
24
;
...
...
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cmake_targets/autotests/v2/config/enb.band38.tm1.usrpb210.tdd.5MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
24
;
pdsch_referenceSignalPower
= -
24
;
...
...
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cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.10MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
24
;
pdsch_referenceSignalPower
= -
24
;
...
...
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cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.20MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
24
;
pdsch_referenceSignalPower
= -
24
;
...
...
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cmake_targets/autotests/v2/config/enb.band7.tm1.usrpb210.fdd.5MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
24
;
pdsch_referenceSignalPower
= -
24
;
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...
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cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.10MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
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...
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cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.20MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
...
...
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cmake_targets/autotests/v2/config/rcc.band7.tm1.if4p5.5MHz.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
...
...
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cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.10MHz.udp.usrpb210.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
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cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.20MHz.udp.usrpb210.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
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cmake_targets/autotests/v2/config/rru.band7.tm1.if4p5.5MHz.udp.usrpb210.conf
View file @
41d16f16
...
@@ -47,7 +47,7 @@ eNBs =
...
@@ -47,7 +47,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/LTE_TRANSPORT/dci.c
View file @
41d16f16
...
@@ -2176,6 +2176,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
...
@@ -2176,6 +2176,7 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
// printf("dci_alloc[%d].L = %d\n",i,dci_alloc[i].L);
// printf("dci_alloc[%d].L = %d\n",i,dci_alloc[i].L);
//}
//}
//exit(-1);
//exit(-1);
exit
(
1
);
return
(
0
);
return
(
0
);
}
}
...
...
This diff is collapsed.
Click to expand it.
openair1/PHY/LTE_TRANSPORT/pucch.c
View file @
41d16f16
...
@@ -2074,12 +2074,12 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
...
@@ -2074,12 +2074,12 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
rxptr
=
(
int16_t
*
)
&
common_vars
->
rxdataF
[
0
][
aa
][
symbol_offset
];
rxptr
=
(
int16_t
*
)
&
common_vars
->
rxdataF
[
0
][
aa
][
symbol_offset
];
for
(
i
=
0
;
i
<
12
;
i
++
,
j
+=
2
,
re_offset
++
)
{
for
(
i
=
0
;
i
<
12
;
i
++
,
j
+=
2
,
re_offset
++
)
{
rxcomp
[
aa
][
j
]
=
(
int16_t
)((
rxptr
[
re_offset
<<
1
]
*
(
int32_t
)
zptr
[
j
])
>>
15
)
-
((
rxptr
[
1
+
(
re_offset
<<
1
)]
*
(
int32_t
)
zptr
[
1
+
j
])
>>
15
);
rxcomp
[
aa
][
1
+
j
]
=
(
int16_t
)((
rxptr
[
re_offset
<<
1
]
*
(
int32_t
)
zptr
[
1
+
j
])
>>
15
)
+
((
rxptr
[
1
+
(
re_offset
<<
1
)]
*
(
int32_t
)
zptr
[
j
])
>>
15
);
if
(
re_offset
==
frame_parms
->
ofdm_symbol_size
)
if
(
re_offset
==
frame_parms
->
ofdm_symbol_size
)
re_offset
=
0
;
re_offset
=
0
;
rxcomp
[
aa
][
j
]
=
(
int16_t
)((
rxptr
[
re_offset
<<
1
]
*
(
int32_t
)
zptr
[
j
])
>>
15
)
-
((
rxptr
[
1
+
(
re_offset
<<
1
)]
*
(
int32_t
)
zptr
[
1
+
j
])
>>
15
);
rxcomp
[
aa
][
1
+
j
]
=
(
int16_t
)((
rxptr
[
re_offset
<<
1
]
*
(
int32_t
)
zptr
[
1
+
j
])
>>
15
)
+
((
rxptr
[
1
+
(
re_offset
<<
1
)]
*
(
int32_t
)
zptr
[
j
])
>>
15
);
#ifdef DEBUG_PUCCH_RX
#ifdef DEBUG_PUCCH_RX
printf
(
"[eNB] PUCCH subframe %d (%d,%d,%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)
\n
"
,
subframe
,
l
,
i
,
re_offset
,
m
,
j
,
printf
(
"[eNB] PUCCH subframe %d (%d,%d,%d,%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)
\n
"
,
subframe
,
l
,
i
,
re_offset
,
m
,
j
,
rxptr
[
re_offset
<<
1
],
rxptr
[
1
+
(
re_offset
<<
1
)],
rxptr
[
re_offset
<<
1
],
rxptr
[
1
+
(
re_offset
<<
1
)],
...
@@ -2153,8 +2153,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
...
@@ -2153,8 +2153,9 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
}
//phase
}
//phase
stat_max
*=
nsymb
;
// normalize to energy per symbol
// stat_max *= nsymb; // normalize to energy per symbol
stat_max
/=
(
frame_parms
->
N_RB_UL
*
12
);
//
// stat_max /= (frame_parms->N_RB_UL*12); //
stat_max
/=
(
nsymb
*
12
);
#ifdef DEBUG_PUCCH_RX
#ifdef DEBUG_PUCCH_RX
printf
(
"[eNB] PUCCH: stat %d, stat_max %d, phase_max %d
\n
"
,
stat
,
stat_max
,
phase_max
);
printf
(
"[eNB] PUCCH: stat %d, stat_max %d, phase_max %d
\n
"
,
stat
,
stat_max
,
phase_max
);
#endif
#endif
...
@@ -2202,7 +2203,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
...
@@ -2202,7 +2203,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
LOG_I
(
PHY
,
"Doing PUCCH detection for format 1a/1b
\n
"
);
LOG_I
(
PHY
,
"Doing PUCCH detection for format 1a/1b
\n
"
);
#endif
#endif
for
(
phase
=
3
;
phase
<
4
;
phase
++
){
//phase=
0; phase<7; phase++) {
for
(
phase
=
0
;
phase
<
7
;
phase
++
)
{
stat
=
0
;
stat
=
0
;
for
(
aa
=
0
;
aa
<
frame_parms
->
nb_antennas_rx
;
aa
++
)
{
for
(
aa
=
0
;
aa
<
frame_parms
->
nb_antennas_rx
;
aa
++
)
{
...
@@ -2339,8 +2340,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
...
@@ -2339,8 +2340,8 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
off
=
(
re
<<
1
)
+
(
24
*
l
);
off
=
(
re
<<
1
)
+
(
24
*
l
);
tmp_re
=
((
rxcomp
[
aa
][
off
]
*
(
int32_t
)
cfo
[
l
<<
1
])
>>
15
)
-
((
rxcomp
[
aa
][
1
+
off
]
*
(
int32_t
)
cfo
[
1
+
(
l
<<
1
)])
>>
15
);
tmp_re
=
((
rxcomp
[
aa
][
off
]
*
(
int32_t
)
cfo
[
l
<<
1
])
>>
15
)
-
((
rxcomp
[
aa
][
1
+
off
]
*
(
int32_t
)
cfo
[
1
+
(
l
<<
1
)])
>>
15
);
tmp_im
=
((
rxcomp
[
aa
][
off
]
*
(
int32_t
)
cfo
[
1
+
(
l
<<
1
)])
>>
15
)
+
((
rxcomp
[
aa
][
1
+
off
]
*
(
int32_t
)
cfo
[(
l
<<
1
)])
>>
15
);
tmp_im
=
((
rxcomp
[
aa
][
off
]
*
(
int32_t
)
cfo
[
1
+
(
l
<<
1
)])
>>
15
)
+
((
rxcomp
[
aa
][
1
+
off
]
*
(
int32_t
)
cfo
[(
l
<<
1
)])
>>
15
);
stat_re
+=
(((
tmp_re
*
chest_re
)
>>
15
)
+
((
tmp_im
*
chest_im
)
>>
15
)
/
4
)
;
stat_re
+=
(((
tmp_re
*
chest_re
)
>>
15
)
+
((
tmp_im
*
chest_im
)
>>
15
)
)
/
4
;
stat_im
+=
(((
tmp_re
*
chest_im
)
>>
15
)
-
((
tmp_im
*
chest_re
)
>>
15
)
/
4
)
;
stat_im
+=
(((
tmp_re
*
chest_im
)
>>
15
)
-
((
tmp_im
*
chest_re
)
>>
15
)
)
/
4
;
off
+=
2
;
off
+=
2
;
#ifdef DEBUG_PUCCH_RX
#ifdef DEBUG_PUCCH_RX
printf
(
"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)
\n
"
,
subframe
,
l
,
re
,
printf
(
"[eNB] PUCCH subframe %d (%d,%d) => (%d,%d) x (%d,%d) : (%d,%d)
\n
"
,
subframe
,
l
,
re
,
...
...
This diff is collapsed.
Click to expand it.
openair1/SCHED/phy_procedures_lte_eNb.c
View file @
41d16f16
...
@@ -290,6 +290,30 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
...
@@ -290,6 +290,30 @@ int get_ue_active_harq_pid(const uint8_t Mod_id,const uint8_t CC_id,const uint16
return
(
0
);
return
(
0
);
}
}
int
get_ue_rbs
(
int
Mod_id
,
int
CC_id
,
int
rnti
,
int
frame
,
int
subframe
,
int
*
start_rb
,
int
*
nb_rb
)
{
LTE_eNB_ULSCH_t
*
ULSCH_ptr
;
uint8_t
ulsch_subframe
,
ulsch_frame
;
int8_t
UE_id
=
find_ue
(
rnti
,
PHY_vars_eNB_g
[
Mod_id
][
CC_id
]);
int
harq_pid
;
if
(
UE_id
==-
1
)
{
LOG_E
(
PHY
,
"Cannot find UE with rnti %x (Mod_id %d, CC_id %d)
\n
"
,
rnti
,
Mod_id
,
CC_id
);
return
(
-
1
);
}
ULSCH_ptr
=
PHY_vars_eNB_g
[
Mod_id
][
CC_id
]
->
ulsch
[(
uint32_t
)
UE_id
];
ulsch_subframe
=
pdcch_alloc2ul_subframe
(
&
PHY_vars_eNB_g
[
Mod_id
][
CC_id
]
->
frame_parms
,
subframe
);
ulsch_frame
=
pdcch_alloc2ul_frame
(
&
PHY_vars_eNB_g
[
Mod_id
][
CC_id
]
->
frame_parms
,
frame
,
subframe
);
harq_pid
=
subframe2harq_pid
(
&
PHY_vars_eNB_g
[
Mod_id
][
CC_id
]
->
frame_parms
,
ulsch_frame
,
ulsch_subframe
);
*
nb_rb
=
ULSCH_ptr
->
harq_processes
[
harq_pid
]
->
nb_rb
;
*
start_rb
=
ULSCH_ptr
->
harq_processes
[
harq_pid
]
->
first_rb
;
return
(
0
);
}
int16_t
get_target_pusch_rx_power
(
const
module_id_t
module_idP
,
const
uint8_t
CC_id
)
int16_t
get_target_pusch_rx_power
(
const
module_id_t
module_idP
,
const
uint8_t
CC_id
)
{
{
return
PHY_vars_eNB_g
[
module_idP
][
CC_id
]
->
frame_parms
.
ul_power_control_config_common
.
p0_NominalPUSCH
;
return
PHY_vars_eNB_g
[
module_idP
][
CC_id
]
->
frame_parms
.
ul_power_control_config_common
.
p0_NominalPUSCH
;
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler.c
View file @
41d16f16
...
@@ -1087,7 +1087,13 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
...
@@ -1087,7 +1087,13 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
// Allocate CCEs for good after scheduling is done
// Allocate CCEs for good after scheduling is done
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
allocate_CCEs
(
module_idP
,
CC_id
,
subframeP
,
0
);
if
(
allocate_CCEs
(
module_idP
,
CC_id
,
subframeP
,
0
))
{
LOG_D
(
MAC
,
"eNB %d CC_id %d frame %d subframe %d: CCE allocation failed
\n
"
,
module_idP
,
CC_id
,
frameP
,
subframeP
);
printf
(
"eNB %d CC_id %d frame %d subframe %d: CCE allocation failed
\n
"
,
module_idP
,
CC_id
,
frameP
,
subframeP
);
abort
();
}
#if defined(FLEXRAN_AGENT_SB_IF)
#if defined(FLEXRAN_AGENT_SB_IF)
#ifndef DISABLE_CONT_STATS
#ifndef DISABLE_CONT_STATS
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
View file @
41d16f16
...
@@ -452,6 +452,7 @@ schedule_ue_spec(
...
@@ -452,6 +452,7 @@ schedule_ue_spec(
static
int32_t
tpc_accumulated
=
0
;
static
int32_t
tpc_accumulated
=
0
;
UE_sched_ctrl
*
ue_sched_ctl
;
UE_sched_ctrl
*
ue_sched_ctl
;
int
i
;
int
i
;
DCI_PDU
saved_DCI_pdu
[
MAX_NUM_CCs
];
#if 0
#if 0
if (UE_list->head==-1) {
if (UE_list->head==-1) {
...
@@ -462,6 +463,10 @@ schedule_ue_spec(
...
@@ -462,6 +463,10 @@ schedule_ue_spec(
start_meas
(
&
eNB
->
schedule_dlsch
);
start_meas
(
&
eNB
->
schedule_dlsch
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH
,
VCD_FUNCTION_IN
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH
,
VCD_FUNCTION_IN
);
/* save DCI_pdu size */
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
saved_DCI_pdu
[
CC_id
].
Num_dci
=
eNB
->
common_channels
[
CC_id
].
DCI_pdu
.
Num_dci
;
//weight = get_ue_weight(module_idP,UE_id);
//weight = get_ue_weight(module_idP,UE_id);
aggregation
=
2
;
aggregation
=
2
;
...
@@ -496,7 +501,6 @@ schedule_ue_spec(
...
@@ -496,7 +501,6 @@ schedule_ue_spec(
stop_meas
(
&
eNB
->
schedule_dlsch_preprocessor
);
stop_meas
(
&
eNB
->
schedule_dlsch_preprocessor
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR
,
VCD_FUNCTION_OUT
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR
,
VCD_FUNCTION_OUT
);
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
LOG_D
(
MAC
,
"doing schedule_ue_spec for CC_id %d
\n
"
,
CC_id
);
LOG_D
(
MAC
,
"doing schedule_ue_spec for CC_id %d
\n
"
,
CC_id
);
...
@@ -571,6 +575,18 @@ schedule_ue_spec(
...
@@ -571,6 +575,18 @@ schedule_ue_spec(
continue
;
continue
;
}
}
/* add "fake" DCI to have CCE_allocation_infeasible work properly for next allocations */
/* if we don't add it, next allocations may succeed but overall allocations may fail */
/* will be removed at the end of this function */
add_ue_spec_dci
(
&
eNB
->
common_channels
[
CC_id
].
DCI_pdu
,
&
(
char
[]){
0
},
rnti
,
1
,
aggregation
,
1
,
format1
,
0
);
nb_available_rb
=
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
];
nb_available_rb
=
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
];
harq_pid
=
ue_sched_ctl
->
harq_pid
[
CC_id
];
harq_pid
=
ue_sched_ctl
->
harq_pid
[
CC_id
];
round
=
ue_sched_ctl
->
round
[
CC_id
];
round
=
ue_sched_ctl
->
round
[
CC_id
];
...
@@ -632,6 +648,7 @@ schedule_ue_spec(
...
@@ -632,6 +648,7 @@ schedule_ue_spec(
while
((
nb_rb_temp
>
0
)
&&
(
j
<
frame_parms
[
CC_id
]
->
N_RBG
))
{
while
((
nb_rb_temp
>
0
)
&&
(
j
<
frame_parms
[
CC_id
]
->
N_RBG
))
{
if
(
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
j
]
==
1
)
{
if
(
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
j
]
==
1
)
{
if
(
UE_list
->
UE_template
[
CC_id
][
UE_id
].
rballoc_subband
[
harq_pid
][
j
])
printf
(
"WARN: rballoc_subband not free for retrans?
\n
"
);
UE_list
->
UE_template
[
CC_id
][
UE_id
].
rballoc_subband
[
harq_pid
][
j
]
=
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
j
];
UE_list
->
UE_template
[
CC_id
][
UE_id
].
rballoc_subband
[
harq_pid
][
j
]
=
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
j
];
if
((
j
==
frame_parms
[
CC_id
]
->
N_RBG
-
1
)
&&
if
((
j
==
frame_parms
[
CC_id
]
->
N_RBG
-
1
)
&&
...
@@ -798,7 +815,7 @@ schedule_ue_spec(
...
@@ -798,7 +815,7 @@ schedule_ue_spec(
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs1
=
eNB_UE_stats
->
dlsch_mcs1
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs1
=
eNB_UE_stats
->
dlsch_mcs1
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs2
=
eNB_UE_stats
->
dlsch_mcs1
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs2
=
eNB_UE_stats
->
dlsch_mcs1
;
}
else
{
}
else
{
LOG_
D
(
MAC
,
"[eNB %d] Frame %d CC_id %d : don't schedule UE %d, its retransmission takes more resources than we have
\n
"
,
LOG_
E
(
MAC
,
"[eNB %d] Frame %d CC_id %d : don't schedule UE %d, its retransmission takes more resources than we have
\n
"
,
module_idP
,
frameP
,
CC_id
,
UE_id
);
module_idP
,
frameP
,
CC_id
,
UE_id
);
}
}
}
else
{
/* This is a potentially new SDU opportunity */
}
else
{
/* This is a potentially new SDU opportunity */
...
@@ -1645,6 +1662,10 @@ schedule_ue_spec(
...
@@ -1645,6 +1662,10 @@ schedule_ue_spec(
}
// UE_id loop
}
// UE_id loop
}
// CC_id loop
}
// CC_id loop
/* restore DCI_pdu size */
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
eNB
->
common_channels
[
CC_id
].
DCI_pdu
.
Num_dci
=
saved_DCI_pdu
[
CC_id
].
Num_dci
;
stop_meas
(
&
eNB
->
schedule_dlsch
);
stop_meas
(
&
eNB
->
schedule_dlsch
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH
,
VCD_FUNCTION_OUT
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_SCHEDULE_DLSCH
,
VCD_FUNCTION_OUT
);
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
View file @
41d16f16
...
@@ -670,6 +670,16 @@ void schedule_ulsch(module_id_t module_idP,
...
@@ -670,6 +670,16 @@ void schedule_ulsch(module_id_t module_idP,
}
}
}
}
/* TODO: this is a hack to disable scheduling in the PRACH.
* We need to get the information from config/phy/wherever
* as done in the commented code below.
* For the moment, we hardcode for the config used by default.
* Only tested with FDD.
*/
int
frame_ul
=
(
frameP
+
(
subframeP
>=
6
))
&
1023
;
int
subframe_ul
=
(
subframeP
+
4
)
%
10
;
if
((
frame_ul
&
1
)
==
0
&&
subframe_ul
==
1
)
first_rb
[
CC_id
]
=
8
;
/*
/*
if (mac_xface->is_prach_subframe(&(mac_xface->lte_frame_parms),frameP,subframeP)) {
if (mac_xface->is_prach_subframe(&(mac_xface->lte_frame_parms),frameP,subframeP)) {
first_rb[CC_id] = (mac_xface->get_prach_prb_offset(&(mac_xface->lte_frame_parms),
first_rb[CC_id] = (mac_xface->get_prach_prb_offset(&(mac_xface->lte_frame_parms),
...
@@ -677,6 +687,65 @@ void schedule_ulsch(module_id_t module_idP,
...
@@ -677,6 +687,65 @@ void schedule_ulsch(module_id_t module_idP,
}
}
/* TODO: remove this hack which is to avoid scheduling new uplink where there is a
* retransmission. It increases first_rb to move after the retransmission RBs,
* which can skip a lot of free RBs (say the UE 2 has a retransmission
* in RBs 45..47, we would skip RBs 1..47, but RBs 1..44 are free and
* won't be used for scheduling)
*/
int
UE_id
;
int
rnti
;
UE_list_t
*
UE_list
=&
eNB
->
UE_list
;
LTE_eNB_UE_stats
*
eNB_UE_stats
=
NULL
;
int
drop_ue
=
0
;
uint8_t
harq_pid
=
0
;
uint8_t
round
=
0
;
int
n
;
// loop over all UEs
for
(
UE_id
=
0
;
UE_id
<
NUMBER_OF_UE_MAX
;
UE_id
++
)
{
rnti
=
UE_RNTI
(
module_idP
,
UE_id
);
if
(
rnti
==
NOT_A_RNTI
)
continue
;
if
(
UE_list
->
UE_template
[
UE_PCCID
(
module_idP
,
UE_id
)][
UE_id
].
configured
==
FALSE
)
continue
;
drop_ue
=
0
;
for
(
n
=
0
;
n
<
UE_list
->
numactiveULCCs
[
UE_id
];
n
++
)
{
CC_id
=
UE_list
->
ordered_ULCCids
[
n
][
UE_id
];
if
(
mac_xface
->
get_eNB_UE_stats
(
module_idP
,
CC_id
,
rnti
)
==
NULL
)
{
drop_ue
=
1
;
break
;
}
}
if
(
drop_ue
==
1
)
continue
;
for
(
n
=
0
;
n
<
UE_list
->
numactiveULCCs
[
UE_id
];
n
++
)
{
// This is the actual CC_id in the list
CC_id
=
UE_list
->
ordered_ULCCids
[
n
][
UE_id
];
eNB_UE_stats
=
mac_xface
->
get_eNB_UE_stats
(
module_idP
,
CC_id
,
rnti
);
if
(
eNB_UE_stats
->
mode
==
PUSCH
)
{
// ue has a ulsch channel
int
start_rb
;
int
nb_rb
;
//DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
//UE_template = &UE_list->UE_template[CC_id][UE_id];
//UE_sched_ctrl = &UE_list->UE_sched_ctrl[UE_id];
if
(
mac_xface
->
get_ue_active_harq_pid
(
module_idP
,
CC_id
,
rnti
,
frameP
,
subframeP
,
&
harq_pid
,
&
round
,
openair_harq_UL
)
==
-
1
)
continue
;
int
get_ue_rbs
(
int
module_idP
,
int
CC_id
,
int
rnti
,
int
frameP
,
int
subframeP
,
int
*
start_rb
,
int
*
nb_rb
);
if
(
get_ue_rbs
(
module_idP
,
CC_id
,
rnti
,
frameP
,
subframeP
,
&
start_rb
,
&
nb_rb
)
==
-
1
)
continue
;
if
(
round
>
0
)
{
if
(
start_rb
<
first_rb
[
CC_id
])
{
LOG_E
(
MAC
,
"scheduled retransmission in forbidden RBs
\n
"
);
// printf("scheduled retransmission in forbidden RBs\n");
}
if
(
first_rb
[
CC_id
]
<
start_rb
+
nb_rb
)
first_rb
[
CC_id
]
=
start_rb
+
nb_rb
;
}
}
// UE is in PUSCH
}
// loop over CC
}
// loop over UE
schedule_ulsch_rnti
(
module_idP
,
cooperation_flag
,
frameP
,
subframeP
,
sched_subframe
,
first_rb
);
schedule_ulsch_rnti
(
module_idP
,
cooperation_flag
,
frameP
,
subframeP
,
sched_subframe
,
first_rb
);
#ifdef CBA
#ifdef CBA
...
@@ -802,6 +871,13 @@ abort();
...
@@ -802,6 +871,13 @@ abort();
module_idP
,
frameP
,
subframeP
,
UE_id
,
rnti
,
CC_id
,
mode_string
[
eNB_UE_stats
->
mode
],
1
<<
aggregation
);
module_idP
,
frameP
,
subframeP
,
UE_id
,
rnti
,
CC_id
,
mode_string
[
eNB_UE_stats
->
mode
],
1
<<
aggregation
);
}
}
/* be sure that there are some free RBs */
if
(
first_rb
[
CC_id
]
>=
frame_parms
->
N_RB_UL
-
1
)
{
LOG_W
(
MAC
,
"[eNB %d] frame %d subframe %d, UE %d/%x CC %d mode %s: dropping, not enough RBs
\n
"
,
module_idP
,
frameP
,
subframeP
,
UE_id
,
rnti
,
CC_id
,
mode_string
[
eNB_UE_stats
->
mode
]);
continue
;
}
if
(
eNB_UE_stats
->
mode
==
PUSCH
)
{
// ue has a ulsch channel
if
(
eNB_UE_stats
->
mode
==
PUSCH
)
{
// ue has a ulsch channel
...
@@ -891,9 +967,11 @@ abort();
...
@@ -891,9 +967,11 @@ abort();
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
ulsch_mcs2
=
mcs
;
UE_list
->
eNB_UE_stats
[
CC_id
][
UE_id
].
ulsch_mcs2
=
mcs
;
// buffer_occupancy = UE_template->ul_total_buffer;
// buffer_occupancy = UE_template->ul_total_buffer;
while
(((
rb_table
[
rb_table_index
]
>
(
frame_parms
->
N_RB_UL
-
1
-
first_rb
[
CC_id
]))
||
while
(
rb_table_index
>
0
&&
(
rb_table
[
rb_table_index
]
>
45
))
&&
(
rb_table
[
rb_table_index
]
>
frame_parms
->
N_RB_UL
-
1
-
first_rb
[
CC_id
]
||
(
rb_table_index
>
0
))
{
rb_table
[
rb_table_index
]
>
45
||
(
UE_template
->
pre_allocated_rb_table_index_ul
>=
0
&&
rb_table
[
rb_table_index
]
>
UE_template
->
pre_allocated_nb_rb_ul
)))
{
rb_table_index
--
;
rb_table_index
--
;
}
}
...
...
This diff is collapsed.
Click to expand it.
openair2/LAYER2/MAC/pre_processor.c
View file @
41d16f16
...
@@ -672,9 +672,12 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
...
@@ -672,9 +672,12 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
for
(
ii
=
0
;
ii
<
UE_num_active_CC
(
UE_list
,
i
);
ii
++
)
{
for
(
ii
=
0
;
ii
<
UE_num_active_CC
(
UE_list
,
i
);
ii
++
)
{
CC_id
=
UE_list
->
ordered_CCids
[
ii
][
i
];
CC_id
=
UE_list
->
ordered_CCids
[
ii
][
i
];
ue_sched_ctl
=
&
UE_list
->
UE_sched_ctrl
[
i
];
round
=
ue_sched_ctl
->
round
[
CC_id
];
// control channel
// control channel or retransmission
if
(
mac_eNB_get_rrc_status
(
Mod_id
,
rnti
)
<
RRC_RECONFIGURED
)
{
/* TODO: do we have to check for retransmission? */
if
(
mac_eNB_get_rrc_status
(
Mod_id
,
rnti
)
<
RRC_RECONFIGURED
||
round
>
0
)
{
nb_rbs_required_remaining_1
[
CC_id
][
i
]
=
nb_rbs_required
[
CC_id
][
i
];
nb_rbs_required_remaining_1
[
CC_id
][
i
]
=
nb_rbs_required
[
CC_id
][
i
];
}
else
{
}
else
{
nb_rbs_required_remaining_1
[
CC_id
][
i
]
=
cmin
(
average_rbs_per_user
[
CC_id
],
nb_rbs_required
[
CC_id
][
i
]);
nb_rbs_required_remaining_1
[
CC_id
][
i
]
=
cmin
(
average_rbs_per_user
[
CC_id
],
nb_rbs_required
[
CC_id
][
i
]);
...
@@ -696,6 +699,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
...
@@ -696,6 +699,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
nb_rbs_required_remaining
[
CC_id
][
i
]
=
nb_rbs_required_remaining_1
[
CC_id
][
i
];
nb_rbs_required_remaining
[
CC_id
][
i
]
=
nb_rbs_required_remaining_1
[
CC_id
][
i
];
}
else
{
// rb required based only on the buffer - rb allloctaed in the 1st round + extra reaming rb form the 1st round
}
else
{
// rb required based only on the buffer - rb allloctaed in the 1st round + extra reaming rb form the 1st round
nb_rbs_required_remaining
[
CC_id
][
i
]
=
nb_rbs_required
[
CC_id
][
i
]
-
nb_rbs_required_remaining_1
[
CC_id
][
i
]
+
nb_rbs_required_remaining
[
CC_id
][
i
];
nb_rbs_required_remaining
[
CC_id
][
i
]
=
nb_rbs_required
[
CC_id
][
i
]
-
nb_rbs_required_remaining_1
[
CC_id
][
i
]
+
nb_rbs_required_remaining
[
CC_id
][
i
];
if
(
nb_rbs_required_remaining
[
CC_id
][
i
]
<
0
)
abort
();
}
}
if
(
nb_rbs_required
[
CC_id
][
i
]
>
0
)
if
(
nb_rbs_required
[
CC_id
][
i
]
>
0
)
...
@@ -901,7 +905,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
...
@@ -901,7 +905,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
}
}
}
}
#define SF0
5
_LIMIT 1
#define SF0_LIMIT 1
void
dlsch_scheduler_pre_processor_reset
(
int
module_idP
,
void
dlsch_scheduler_pre_processor_reset
(
int
module_idP
,
int
UE_id
,
int
UE_id
,
...
@@ -920,10 +924,10 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
...
@@ -920,10 +924,10 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
UE_sched_ctrl
*
ue_sched_ctl
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
];
UE_sched_ctrl
*
ue_sched_ctl
=
&
UE_list
->
UE_sched_ctrl
[
UE_id
];
rnti_t
rnti
=
UE_RNTI
(
module_idP
,
UE_id
);
rnti_t
rnti
=
UE_RNTI
(
module_idP
,
UE_id
);
uint8_t
*
vrb_map
=
eNB_mac_inst
[
module_idP
].
common_channels
[
CC_id
].
vrb_map
;
uint8_t
*
vrb_map
=
eNB_mac_inst
[
module_idP
].
common_channels
[
CC_id
].
vrb_map
;
int
RBGsize
=
PHY_vars_eNB_g
[
module_idP
][
CC_id
]
->
frame_parms
.
N_RB_DL
/
N_RBG
;
int
RBGsize
;
#ifdef SF05_LIMIT
int
RBGsize_last
;
//int subframe05_limit=0;
#ifdef SF0_LIMIT
int
sf0
5_upper
=-
1
,
sf05
_lower
=-
1
;
int
sf0
_upper
=-
1
,
sf0
_lower
=-
1
;
#endif
#endif
LTE_eNB_UE_stats
*
eNB_UE_stats
=
mac_xface
->
get_eNB_UE_stats
(
module_idP
,
CC_id
,
rnti
);
LTE_eNB_UE_stats
*
eNB_UE_stats
=
mac_xface
->
get_eNB_UE_stats
(
module_idP
,
CC_id
,
rnti
);
if
(
eNB_UE_stats
==
NULL
)
return
;
if
(
eNB_UE_stats
==
NULL
)
return
;
...
@@ -986,44 +990,60 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
...
@@ -986,44 +990,60 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
ue_sched_ctl
->
dl_pow_off
[
CC_id
]
=
2
;
ue_sched_ctl
->
dl_pow_off
[
CC_id
]
=
2
;
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
=
0
;
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
=
0
;
#ifdef SF05_LIMIT
switch
(
PHY_vars_eNB_g
[
module_idP
][
CC_id
]
->
frame_parms
.
N_RB_DL
)
{
case
6
:
RBGsize
=
1
;
RBGsize_last
=
1
;
break
;
case
15
:
RBGsize
=
2
;
RBGsize_last
=
1
;
break
;
case
25
:
RBGsize
=
2
;
RBGsize_last
=
1
;
break
;
case
50
:
RBGsize
=
3
;
RBGsize_last
=
2
;
break
;
case
75
:
RBGsize
=
4
;
RBGsize_last
=
3
;
break
;
case
100
:
RBGsize
=
4
;
RBGsize_last
=
4
;
break
;
default:
printf
(
"unsupported RBs (%d)
\n
"
,
PHY_vars_eNB_g
[
module_idP
][
CC_id
]
->
frame_parms
.
N_RB_DL
);
fflush
(
stdout
);
abort
();
}
#ifdef SF0_LIMIT
switch
(
N_RBG
)
{
switch
(
N_RBG
)
{
case
6
:
case
6
:
sf0
5
_lower
=
0
;
sf0_lower
=
0
;
sf0
5
_upper
=
5
;
sf0_upper
=
5
;
break
;
break
;
case
8
:
case
8
:
sf0
5
_lower
=
2
;
sf0_lower
=
2
;
sf0
5
_upper
=
5
;
sf0_upper
=
5
;
break
;
break
;
case
13
:
case
13
:
sf0
5
_lower
=
4
;
sf0_lower
=
4
;
sf0
5
_upper
=
7
;
sf0_upper
=
7
;
break
;
break
;
case
17
:
case
17
:
sf0
5
_lower
=
7
;
sf0_lower
=
7
;
sf0
5
_upper
=
9
;
sf0_upper
=
9
;
break
;
break
;
case
25
:
case
25
:
sf0
5
_lower
=
11
;
sf0_lower
=
11
;
sf0
5
_upper
=
13
;
sf0_upper
=
13
;
break
;
break
;
default:
printf
(
"unsupported RBs (%d)
\n
"
,
PHY_vars_eNB_g
[
module_idP
][
CC_id
]
->
frame_parms
.
N_RB_DL
);
fflush
(
stdout
);
abort
();
}
}
#endif
#endif
// Initialize Subbands according to VRB map
// Initialize Subbands according to VRB map
for
(
i
=
0
;
i
<
N_RBG
;
i
++
)
{
for
(
i
=
0
;
i
<
N_RBG
;
i
++
)
{
int
rb_size
=
i
==
N_RBG
-
1
?
RBGsize_last
:
RBGsize
;
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
i
]
=
0
;
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
i
]
=
0
;
rballoc_sub
[
CC_id
][
i
]
=
0
;
rballoc_sub
[
CC_id
][
i
]
=
0
;
#ifdef SF05_LIMIT
#ifdef SF0_LIMIT
// for avoiding 6+ PRBs around DC in subframe 0-5 (avoid excessive errors)
// for avoiding 6+ PRBs around DC in subframe 0 (avoid excessive errors)
/* TODO: make it proper - allocate those RBs, do not "protect" them, but
if
((
subframeP
==
0
||
subframeP
==
5
)
&&
* compute number of available REs and limit MCS according to the
(
i
>=
sf05_lower
&&
i
<=
sf05_upper
))
* TBS table 36.213 7.1.7.2.1-1 (can be done after pre-processor)
*/
if
(
subframeP
==
0
&&
i
>=
sf0_lower
&&
i
<=
sf0_upper
)
rballoc_sub
[
CC_id
][
i
]
=
1
;
rballoc_sub
[
CC_id
][
i
]
=
1
;
#endif
#endif
// for SI-RNTI,RA-RNTI and P-RNTI allocations
// for SI-RNTI,RA-RNTI and P-RNTI allocations
for
(
j
=
0
;
j
<
RBGsize
;
j
++
)
{
for
(
j
=
0
;
j
<
rb_size
;
j
++
)
{
if
(
vrb_map
[
j
+
(
i
*
RBGsize
)]
!=
0
)
{
if
(
vrb_map
[
j
+
(
i
*
RBGsize
)]
!=
0
)
{
rballoc_sub
[
CC_id
][
i
]
=
1
;
rballoc_sub
[
CC_id
][
i
]
=
1
;
LOG_D
(
MAC
,
"Frame %d, subframe %d : vrb %d allocated
\n
"
,
frameP
,
subframeP
,
j
+
(
i
*
RBGsize
));
LOG_D
(
MAC
,
"Frame %d, subframe %d : vrb %d allocated
\n
"
,
frameP
,
subframeP
,
j
+
(
i
*
RBGsize
));
break
;
break
;
...
@@ -1063,14 +1083,16 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
...
@@ -1063,14 +1083,16 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
if
(
ue_sched_ctl
->
dl_pow_off
[
CC_id
]
!=
0
)
{
if
(
ue_sched_ctl
->
dl_pow_off
[
CC_id
]
!=
0
)
{
if
((
i
==
N_RBG
-
1
)
&&
((
N_RB_DL
==
25
)
||
(
N_RB_DL
==
50
)))
{
if
((
i
==
N_RBG
-
1
)
&&
((
N_RB_DL
==
25
)
||
(
N_RB_DL
==
50
)))
{
rballoc_sub
[
CC_id
][
i
]
=
1
;
if
(
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
>=
min_rb_unit
-
1
){
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
i
]
=
1
;
rballoc_sub
[
CC_id
][
i
]
=
1
;
MIMO_mode_indicator
[
CC_id
][
i
]
=
1
;
ue_sched_ctl
->
rballoc_sub_UE
[
CC_id
][
i
]
=
1
;
if
(
transmission_mode
==
5
)
{
MIMO_mode_indicator
[
CC_id
][
i
]
=
1
;
ue_sched_ctl
->
dl_pow_off
[
CC_id
]
=
1
;
if
(
transmission_mode
==
5
)
{
}
ue_sched_ctl
->
dl_pow_off
[
CC_id
]
=
1
;
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
=
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
-
min_rb_unit
+
1
;
}
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
]
=
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
]
+
min_rb_unit
-
1
;
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
=
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
-
min_rb_unit
+
1
;
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
]
=
ue_sched_ctl
->
pre_nb_available_rbs
[
CC_id
]
+
min_rb_unit
-
1
;
}
}
else
{
}
else
{
if
(
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
>=
min_rb_unit
){
if
(
nb_rbs_required_remaining
[
CC_id
][
UE_id
]
>=
min_rb_unit
){
rballoc_sub
[
CC_id
][
i
]
=
1
;
rballoc_sub
[
CC_id
][
i
]
=
1
;
...
@@ -1086,7 +1108,6 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
...
@@ -1086,7 +1108,6 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
}
// dl_pow_off[CC_id][UE_id] ! = 0
}
// dl_pow_off[CC_id][UE_id] ! = 0
}
}
}
}
}
}
...
@@ -1335,6 +1356,8 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
...
@@ -1335,6 +1356,8 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
// if this UE has UL traffic
// if this UE has UL traffic
if
(
UE_template
->
ul_total_buffer
>
0
)
{
if
(
UE_template
->
ul_total_buffer
>
0
)
{
/* start with 3 RB => rb_table_index = 2 */
rb_table_index
=
2
;
tbs
=
mac_xface
->
get_TBS_UL
(
mcs
,
3
);
// 1 or 2 PRB with cqi enabled does not work well!
tbs
=
mac_xface
->
get_TBS_UL
(
mcs
,
3
);
// 1 or 2 PRB with cqi enabled does not work well!
// fixme: set use_srs flag
// fixme: set use_srs flag
tx_power
=
mac_xface
->
estimate_ue_tx_power
(
tbs
,
rb_table
[
rb_table_index
],
0
,
frame_parms
->
Ncp
,
0
);
tx_power
=
mac_xface
->
estimate_ue_tx_power
(
tbs
,
rb_table
[
rb_table_index
],
0
,
frame_parms
->
Ncp
,
0
);
...
@@ -1378,8 +1401,15 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
...
@@ -1378,8 +1401,15 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
UE_template
->
pre_allocated_nb_rb_ul
,
UE_template
->
pre_allocated_nb_rb_ul
,
UE_template
->
phr_info
,
tx_power
);
UE_template
->
phr_info
,
tx_power
);
}
else
{
}
else
{
UE_template
->
pre_allocated_rb_table_index_ul
=-
1
;
/* if UE has pending scheduling request then pre-allocate 3 RBs */
UE_template
->
pre_allocated_nb_rb_ul
=
0
;
//if (UE_template->ul_active == 1 && UE_template->ul_SR == 1) {
if
(
UE_is_to_be_scheduled
(
module_idP
,
CC_id
,
i
))
{
UE_template
->
pre_allocated_rb_table_index_ul
=
2
;
UE_template
->
pre_allocated_nb_rb_ul
=
3
;
}
else
{
UE_template
->
pre_allocated_rb_table_index_ul
=-
1
;
UE_template
->
pre_allocated_nb_rb_ul
=
0
;
}
}
}
}
}
}
}
...
...
This diff is collapsed.
Click to expand it.
openair2/RRC/LITE/MESSAGES/asn1_msg.c
View file @
41d16f16
...
@@ -1680,7 +1680,7 @@ do_RRCConnectionSetup(
...
@@ -1680,7 +1680,7 @@ do_RRCConnectionSetup(
// SchedulingRequestConfig
// SchedulingRequestConfig
physicalConfigDedicated2
->
schedulingRequestConfig
->
present
=
SchedulingRequestConfig_PR_setup
;
physicalConfigDedicated2
->
schedulingRequestConfig
->
present
=
SchedulingRequestConfig_PR_setup
;
physicalConfigDedicated2
->
schedulingRequestConfig
->
choice
.
setup
.
sr_PUCCH_ResourceIndex
=
3
;
//ue_context_pP->local_uid;
physicalConfigDedicated2
->
schedulingRequestConfig
->
choice
.
setup
.
sr_PUCCH_ResourceIndex
=
71
-
ue_context_pP
->
local_uid
/
10
;
//ue_context_pP->local_uid;
if
(
frame_parms
->
frame_type
==
0
)
{
// FDD
if
(
frame_parms
->
frame_type
==
0
)
{
// FDD
physicalConfigDedicated2
->
schedulingRequestConfig
->
choice
.
setup
.
sr_ConfigIndex
=
5
+
(
ue_context_pP
->
local_uid
%
10
);
// Isr = 5 (every 10 subframes, offset=2+UE_id mod3)
physicalConfigDedicated2
->
schedulingRequestConfig
->
choice
.
setup
.
sr_ConfigIndex
=
5
+
(
ue_context_pP
->
local_uid
%
10
);
// Isr = 5 (every 10 subframes, offset=2+UE_id mod3)
...
...
This diff is collapsed.
Click to expand it.
targets/PROJECTS/GENERIC-LTE-EPC/CONF/rcc.band7.tm1.50PRB.if4p5-ercom.conf
View file @
41d16f16
...
@@ -48,7 +48,7 @@ eNBs =
...
@@ -48,7 +48,7 @@ eNBs =
prach_zero_correlation
=
1
;
prach_zero_correlation
=
1
;
prach_freq_offset
=
2
;
prach_freq_offset
=
2
;
pucch_delta_shift
=
1
;
pucch_delta_shift
=
1
;
pucch_nRB_CQI
=
1
;
pucch_nRB_CQI
=
0
;
pucch_nCS_AN
=
0
;
pucch_nCS_AN
=
0
;
pucch_n1_AN
=
32
;
pucch_n1_AN
=
32
;
pdsch_referenceSignalPower
= -
29
;
pdsch_referenceSignalPower
= -
29
;
...
...
This diff is collapsed.
Click to expand it.
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