Commit 418d9574 authored by Robert Schmidt's avatar Robert Schmidt

Merge remote-tracking branch 'origin/cnproc-twopass' into integration_2026_w30

Two-pass min1/min2 cnProc for BG1 and BG2. (#282)

nrLDPC_cnProc_BG1_2pass and nrLDPC_cnProc_BG2_2pass replace the
LUT-exclude-self approach with a two-pass algorithm:

- Pass 1: single sweep over all numBN inputs to collect min1, min2 (two
  smallest |vk|) and the full sign product via sign_epi8.
- Pass 2: re-read each vk, select min2 where |vk|==min1 (tie approx),
  remove self sign with sign_epi8(vsgn_all, vk), and store.

Memory reads per CN group: `2*numBN` vs `numBN*(numBN-1)` for LUT
approach:

    numBN= 4:  8 vs  12  (1.5x  fewer)
    numBN= 7: 14 vs  42  (3.0x  fewer)
    numBN=10: 20 vs  90  (4.5x  fewer)
    numBN=19: 38 vs 342  (9.0x  fewer)

A generic nrLDPC_cnProc_group_2pass(buf, res, numBN, M, off) helper does
the work; the BG1/BG2 wrappers loop over their degree groups and derive
the BN stride from lut_numCnInCnGroups_BG1/2_R13/15 exactly as the
existing functions do.  No new LUT tables are required.

Placed inside the #else (non-AVX512) block alongside the existing
BG1/BG2 functions; AVX512 path is unchanged.

It also removes the cnProc/bnProc/bnProcPC generators and simplifies the
original implementation (several hundreds of lines of repetitive code
replaced by generic functions.)
Reviewed-by: default avatarLaurent THOMAS <laurent.thomas@open-cells.com>
parents 99478c7a 3c026eb5
......@@ -675,5 +675,5 @@ class Containerize():
logging.info(f"check against thresholds from {thresholds}")
success, datalog_rt_stats = cls_analysis.Analysis.analyze_rt_stats(thresholds, local_files)
HTML.CreateHtmlDataLogTable(datalog_rt_stats)
HTML.CreateHtmlDataLogTable(datalog_rt_stats, thresholds)
return success
......@@ -289,14 +289,14 @@ class HTMLManagement():
self.htmlFile.close()
#for the moment it is limited to 4 columns, to be made generic later
def CreateHtmlDataLogTable(self, DataLog):
def CreateHtmlDataLogTable(self, DataLog, filename):
if (self.htmlFooterCreated or (not self.htmlHeaderCreated)):
return
self.htmlFile = open('test_results.html', 'a')
# TabHeader
self.htmlFile.write(' <tr bgcolor = "#F0F0F0" >\n')
self.htmlFile.write(' <td colspan="6"><b> ---- ' + DataLog['Title'] + ' ---- </b></td>\n')
self.htmlFile.write(f' <td colspan="6"><b> ---- Processing Time from {filename} ---- </b></td>\n')
self.htmlFile.write(' </tr>\n')
self.htmlFile.write(' <tr bgcolor = "#33CCFF" >\n')
self.htmlFile.write(' <th colspan="3">'+ DataLog['ColNames'][0] +'</th>\n')
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.4x4.fhi72.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -13,9 +9,8 @@ Ref :
feptx_prec (per port, half_slot) : 46.0
L1 Tx processing : 371.7
DLSCH encoding : 196.9
L1 Rx processing : 578.0
UL segments decoding : 81.2
UL Indication : 0.4
L1 Rx processing : 460.0
UL segments decoding : 58.0
Slot Indication : 14.3
PUSCH inner-receiver : 739.4
DeviationThreshold :
......@@ -25,6 +20,5 @@ DeviationThreshold :
DLSCH encoding : 0.25
L1 Rx processing : 0.25
UL segments decoding : 0.25
UL Indication : 1.00
Slot Indication : 0.50
PUSCH inner-receiver : 0.25
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.100.2x2.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -15,10 +11,9 @@ Ref :
feptx_total : 150.0
L1 Tx processing : 475.0
DLSCH encoding : 200.0
L1 Rx processing : 530.0
L1 Rx processing : 407.0
PUSCH inner-receiver : 360.0
DL & UL scheduling timing : 17.0
UL Indication : 1.0
Slot Indication : 13.0
feprx : 151.0
feptx_ofdm (per port, half_slot) : 57
......@@ -33,7 +28,6 @@ DeviationThreshold :
L1 Rx processing : 0.25
PUSCH inner-receiver : 0.25
DL & UL scheduling timing : 0.25
UL Indication : 1.00
Slot Indication : 0.50
feprx : 0.25
feptx_ofdm (per port, half_slot) : 0.25
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.4x4.fhi72.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -15,7 +11,6 @@ Ref :
DLSCH encoding : 141.0
L1 Rx processing : 332.5
UL segments decoding : 55.2
UL Indication : 0.4
Slot Indication : 14.3
PUSCH inner-receiver : 421.4
DeviationThreshold :
......@@ -25,6 +20,5 @@ DeviationThreshold :
DLSCH encoding : 0.25
L1 Rx processing : 0.25
UL segments decoding : 0.25
UL Indication : 1.00
Slot Indication : 0.50
PUSCH inner-receiver : 0.25
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.1x1.60.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -15,10 +11,9 @@ Ref :
feptx_total : 45.0
L1 Tx processing : 175.0
DLSCH encoding : 110.0
L1 Rx processing : 345.0
L1 Rx processing : 254.0
PUSCH inner-receiver : 150.0
DL & UL scheduling timing : 5.0
UL Indication : 1.0
Slot Indication : 6.0
feprx : 44.0
feptx_ofdm (per port, half_slot) : 31
......@@ -33,7 +28,6 @@ DeviationThreshold :
L1 Rx processing : 0.25
PUSCH inner-receiver : 0.25
DL & UL scheduling timing : 0.50
UL Indication : 1.00
Slot Indication : 0.50
feprx : 0.25
feptx_ofdm (per port, half_slot) : 0.25
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.2x2.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -18,7 +14,6 @@ Ref :
L1 Rx processing : 175.0
PUSCH inner-receiver : 100.0
DL & UL scheduling timing : 11.0
UL Indication : 3.0
Slot Indication : 14.0
DeviationThreshold :
feprx : 0.25
......@@ -30,5 +25,4 @@ DeviationThreshold :
L1 Rx processing : 0.25
PUSCH inner-receiver : 0.25
DL & UL scheduling timing : 0.50
UL Indication : 1.00
Slot Indication : 0.25
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.60.2x2.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -15,10 +11,9 @@ Ref :
feptx_total : 80.0
L1 Tx processing : 280.0
DLSCH encoding : 140.0
L1 Rx processing : 345.0
L1 Rx processing : 255.0
PUSCH inner-receiver : 155.0
DL & UL scheduling timing : 8.0
UL Indication : 3.0
Slot Indication : 9.0
feprx : 50.0
feptx_ofdm (per port, half_slot) : 31
......@@ -33,7 +28,6 @@ DeviationThreshold :
L1 Rx processing : 0.25
PUSCH inner-receiver : 0.25
DL & UL scheduling timing : 0.35
UL Indication : 1.00
Slot Indication : 0.35
feprx : 0.25
feptx_ofdm (per port, half_slot) : 0.25
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : Processing Time (us) from datalog_rt_stats.default.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -15,10 +11,9 @@ Ref :
feptx_total : 45.0
L1 Tx processing : 145.0
DLSCH encoding : 90.0
L1 Rx processing : 290.0
L1 Rx processing : 223.0
PUSCH inner-receiver : 115.0
DL & UL scheduling timing : 4.0
UL Indication : 2.0
Slot Indication : 5.0
feprx : 43.0
feptx_ofdm (per port, half_slot) : 30
......@@ -33,7 +28,6 @@ DeviationThreshold :
L1 Rx processing : 0.25
PUSCH inner-receiver : 0.25
DL & UL scheduling timing : 0.50
UL Indication : 1.00
Slot Indication : 0.50
feprx : 0.25
feptx_ofdm (per port, half_slot) : 0.25
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : gNB Processing Time (us) from datalog_rt_stats.default.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -11,10 +7,9 @@ ColNames :
Ref :
L1 Tx processing : 190.0
DLSCH encoding : 120.0
L1 Rx processing : 235.0
L1 Rx processing : 208.0
UL segments decoding : 120.0
PUSCH inner-receiver : 150.0
UL Indication : 2.0
Slot Indication : 10.0
feprx : 40.0
feptx_ofdm (per port, half_slot) : 30
......@@ -25,7 +20,6 @@ DeviationThreshold :
L1 Rx processing : 0.25
UL segments decoding : 0.25
PUSCH inner-receiver : 0.25
UL Indication : 1.00
Slot Indication : 0.50
feprx : 0.25
feptx_ofdm (per port, half_slot) : 0.25
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
#this is a configuration file
#used to build real time processing statistics
#for 5G NR phy test (gNB terminate)
Title : UE Processing Time (us) from datalog_rt_stats.ue.40.vrtsim.yaml
ColNames :
- Metric
- Average; Max; Count
......@@ -13,15 +9,15 @@ Ref :
DLSCH_RX_PDCCH_STATS : 30.5
RX_DFT_STATS : 5.5
DLSCH_CHANNEL_ESTIMATION_STATS : 39.0
DLSCH_DECODING_STATS : 178.0
DLSCH_LDPC_DECODING_STATS : 78.0
DLSCH_LLR_STATS : 25.0
DLSCH_DECODING_STATS : 141.0
DLSCH_LDPC_DECODING_STATS : 50.0
DLSCH_LLR_STATS : 21.0
DLSCH_LAYER_DEMAPPING : 8.5
DLSCH_PROCEDURES_STATS : 188.0
DLSCH_PROCEDURES_STATS : 153.0
PHY_PROC_TX : 158.0
PUSCH_PROC_STATS : 167.0
ULSCH_LDPC_ENCODING_STATS : 43.0
ULSCH_ENCODING_STATS : 121.0
ULSCH_LDPC_ENCODING_STATS : 54.0
ULSCH_ENCODING_STATS : 135.0
OFDM_MOD_STATS : 44.5
DeviationThreshold :
RX_PDSCH_STATS : 0.25
......
......@@ -146,5 +146,5 @@ class RANManagement():
logging.info(f"check against thresholds from {thresholds}")
success, datalog_rt_stats = cls_analysis.Analysis.analyze_rt_stats(thresholds, [l1_file, mac_file])
HTML.CreateHtmlDataLogTable(datalog_rt_stats)
HTML.CreateHtmlDataLogTable(datalog_rt_stats, thresholds)
return success
......@@ -28,7 +28,6 @@ class TestAnalysis(unittest.TestCase):
macf = "tests/analysis/gnb_phytest.success.nrMAC.log"
status, s = cls_analysis.Analysis.analyze_rt_stats(rtsf, [l1f, macf])
self.assertTrue(status)
self.assertEqual(s['Title'], "Processing Time (us) from datalog_rt_stats.100.2x2.yaml")
self.assertEqual(s['ColNames'], ["Metric", "Average; Max; Count", "Average vs Reference Deviation (Reference Value; Acceptability Deviation Threshold)"])
with open(rtsf, 'r') as f:
rt_stats = yaml.load(f, Loader=yaml.FullLoader)
......@@ -46,7 +45,6 @@ class TestAnalysis(unittest.TestCase):
self.assertEqual(s['Data']['L1 Tx processing'], ['476', '872', '102933', '1.00'])
self.assertEqual(s['Data']['DLSCH encoding'], ['216', '544', '77201', '1.08'])
self.assertEqual(s['Data']['L1 Rx processing'], ['488', '868', '38598', '0.92'])
self.assertEqual(s['Data']['UL Indication'], ['1', '10', '38598', '0.76'])
self.assertEqual(s['Data']['Slot Indication'], ['18', '94', '128667', '1.38'])
self.assertEqual(s['Data']['PUSCH inner-receiver'], ['307', '530', '25730', '0.85'])
self.assertEqual(s['Data']['feprx'], ['169', '310', '38600', '1.12'])
......
......@@ -28,7 +28,6 @@ ULSCH RNTI 1234, 389: ulsch_power[0] 41,5 ulsch_noise_power[0] 7.8, sync_pos 0
UL segment deinterleaving: 5.063 us; 488870; 27.005 us;
UL segment rate recovery: 11.554 us; 488870; 517.998 us;
UL segments decoding: 134.035 us; 488870; 759.164 us;
UL Indication: 0.763 us; 38598; 9.588 us;
Slot Indication: 17.891 us; 128667; 94.446 us;
PUSCH inner-receiver: 307.193 us; 25730; 529.580 us;
feprx: 169.305 us; 38600; 310.489 us;
......
......@@ -2079,30 +2079,6 @@ INPUT = \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_bnProc.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_types.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc_avx512/main.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc_avx512/cnProc_gen_BG2_avx512.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc_avx512/cnProc_gen_BG1_avx512.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/main.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/main128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG1_avx2.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG2_128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG1_128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG2_avx2.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG2_avx2.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG1_128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProc_gen_BG1_avx2.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc/bnProcPc_gen_BG2_128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/main.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG1_avx2.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG1_128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/main128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG2_128.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_cnProc/cnProc_gen_BG2_avx2.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc_avx512/main.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc_avx512/bnProcPc_gen_BG1_avx512.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc_avx512/bnProc_gen_BG2_avx512.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc_avx512/bnProc_gen_BG1_avx512.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_tools/generator_bnProc_avx512/bnProcPc_gen_BG2_avx512.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_cnProc.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_mPass.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_init.h \
......
......@@ -62,9 +62,9 @@ versions of gcc defined in the cmake cross-compilation file (`cross-arm.cmake`).
### Build code generation tools for host
Use the x86 compiler to build the `ldpc_generators` and generate the header
file in the `ran_build/build` folder. They are necessary during a build for
code generation, and therefore need to be created for the x86 architecture.
Use the x86 compiler to generate the T header file in the `ran_build/build`
folder. This is necessary during a build for code generation, and therefore
need to be created for the x86 architecture.
```shell
rm -r ran_build
......@@ -74,7 +74,7 @@ mkdir ran_build/build-cross
cd ran_build/build
cmake ../../..
make -j`nproc` ldpc_generators generate_T
make -j`nproc` generate_T
```
### Build executables for ARM64
......
......@@ -19,7 +19,7 @@ RUN /bin/sh oaienv && \
mkdir -p log ran_build/build ran_build/build-cross && \
cd ran_build/build && \
cmake ../../.. -GNinja && \
ninja ldpc_generators generate_T && \
ninja generate_T && \
cd ../build-cross/ && \
# install missing libyaml-cpp-dev for arm64
apt install -y libyaml-cpp-dev:arm64 && \
......
......@@ -16,14 +16,14 @@ add_library(ldpc_orig MODULE
nrLDPC_encoder/ldpc_encoder.c
)
set_target_properties(ldpc_orig PROPERTIES LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
target_link_libraries(ldpc_orig PRIVATE ldpc_segment ldpc_gen_HEADERS)
target_link_libraries(ldpc_orig PRIVATE ldpc_segment)
add_library(ldpc MODULE
nrLDPC_decoder/nrLDPC_decoder.c
nrLDPC_encoder/ldpc_encoder_optim8segmulti.c
)
set_target_properties(ldpc PROPERTIES LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
target_link_libraries(ldpc PRIVATE ldpc_segment ldpc_gen_HEADERS)
target_link_libraries(ldpc PRIVATE ldpc_segment)
add_dependencies(ldpctest ldpc ldpc_orig)
add_dependencies(nr-softmodem ldpc ldpc_orig)
......@@ -36,6 +36,5 @@ add_dependencies(nr_dlschsim ldpc ldpc_orig)
add_library(crc_byte OBJECT crc_byte.c)
add_subdirectory(nrLDPC_coding)
add_subdirectory(nrLDPC_decoder)
add_subdirectory(nrPolar_tools)
add_subdirectory(nrSmallBlock)
......@@ -23,7 +23,7 @@ if (ENABLE_LDPC_AAL)
set_target_properties(ldpc_aal PROPERTIES COMPILE_FLAGS "-DALLOW_EXPERIMENTAL_API")
set_target_properties(ldpc_aal PROPERTIES LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR})
target_include_directories(ldpc_aal PRIVATE ${LIBDPDK_AAL_INCLUDE_DIRS})
target_link_libraries(ldpc_aal PRIVATE log_headers ldpc_gen_HEADERS ${LIBDPDK_AAL_LDFLAGS})
target_link_libraries(ldpc_aal PRIVATE log_headers ${LIBDPDK_AAL_LDFLAGS})
if (PMD_T2)
target_link_libraries(ldpc_aal PRIVATE ${PMD_T2})
endif()
......
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
add_subdirectory(nrLDPC_tools)
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
add_subdirectory(generator_bnProc ldpc/generator_bnProc)
add_subdirectory(generator_bnProc_avx512 ldpc/generator_bnProc_avx512)
add_subdirectory(generator_cnProc ldpc/generator_cnProc)
add_subdirectory(generator_cnProc_avx512 ldpc/generator_cnProc_avx512)
# custom target to build all generators
add_custom_target(ldpc_generators)
# if (CROSS_COMPILE)
# find_package(bnProc_gen_avx2)
# find_package(bnProc_gen_128)
# find_package(bnProc_gen_avx512)
# find_package(cnProc_gen_avx2)
# find_package(cnProc_gen_128)
# find_package(cnProc_gen_avx512)
# endif()
add_dependencies(ldpc_generators
bnProc_gen_avx2_files
bnProc_gen_128_files
bnProc_gen_avx512_files
cnProc_gen_avx2_files
cnProc_gen_128_files
cnProc_gen_avx512_files)
add_library(ldpc_gen_HEADERS INTERFACE)
target_link_libraries(ldpc_gen_HEADERS INTERFACE
bnProc_gen_avx2_HEADERS
bnProc_gen_128_HEADERS
bnProc_gen_avx512_HEADERS
cnProc_gen_avx2_HEADERS
cnProc_gen_128_HEADERS
cnProc_gen_avx512_HEADERS)
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
if (CROSS_COMPILE)
find_package(bnProc_gen_128)
find_package(bnProc_gen_avx2)
else()
add_executable(bnProc_gen_avx2
bnProc_gen_BG1_avx2.c
bnProc_gen_BG2_avx2.c
bnProcPc_gen_BG1_avx2.c
bnProcPc_gen_BG2_avx2.c
main.c)
add_executable(bnProc_gen_128
bnProc_gen_BG1_128.c
bnProc_gen_BG2_128.c
bnProcPc_gen_BG1_128.c
bnProcPc_gen_BG2_128.c
main128.c)
target_compile_options(bnProc_gen_avx2 PRIVATE -W -Wall )
target_compile_options(bnProc_gen_128 PRIVATE -W -Wall )
export(TARGETS bnProc_gen_avx2 FILE
"${CMAKE_BINARY_DIR}/bnProc_gen_avx2Config.cmake")
export(TARGETS bnProc_gen_128 FILE
"${CMAKE_BINARY_DIR}/bnProc_gen_128Config.cmake")
endif ()
set(bnProc_headers
bnProc/nrLDPC_bnProc_BG1_R13_AVX2.h
bnProc/nrLDPC_bnProc_BG1_R23_AVX2.h
bnProc/nrLDPC_bnProc_BG1_R89_AVX2.h
bnProc/nrLDPC_bnProc_BG2_R13_AVX2.h
bnProc/nrLDPC_bnProc_BG2_R15_AVX2.h
bnProc/nrLDPC_bnProc_BG2_R23_AVX2.h)
set(bnProcPc_headers
bnProcPc/nrLDPC_bnProcPc_BG1_R13_AVX2.h
bnProcPc/nrLDPC_bnProcPc_BG1_R23_AVX2.h
bnProcPc/nrLDPC_bnProcPc_BG1_R89_AVX2.h
bnProcPc/nrLDPC_bnProcPc_BG2_R13_AVX2.h
bnProcPc/nrLDPC_bnProcPc_BG2_R15_AVX2.h
bnProcPc/nrLDPC_bnProcPc_BG2_R23_AVX2.h)
set(bnProc128_headers
bnProc/nrLDPC_bnProc_BG1_R13_128.h
bnProc/nrLDPC_bnProc_BG1_R23_128.h
bnProc/nrLDPC_bnProc_BG1_R89_128.h
bnProc/nrLDPC_bnProc_BG2_R13_128.h
bnProc/nrLDPC_bnProc_BG2_R15_128.h
bnProc/nrLDPC_bnProc_BG2_R23_128.h)
set(bnProcPc128_headers
bnProcPc/nrLDPC_bnProcPc_BG1_R13_128.h
bnProcPc/nrLDPC_bnProcPc_BG1_R23_128.h
bnProcPc/nrLDPC_bnProcPc_BG1_R89_128.h
bnProcPc/nrLDPC_bnProcPc_BG2_R13_128.h
bnProcPc/nrLDPC_bnProcPc_BG2_R15_128.h
bnProcPc/nrLDPC_bnProcPc_BG2_R23_128.h)
add_custom_command(
# TARGET bnProc_gen_avx2 POST_BUILD
OUTPUT ${bnProc_headers} ${bnProcPc_headers}
COMMAND ${CMAKE_COMMAND} -E make_directory bnProc
COMMAND ${CMAKE_COMMAND} -E make_directory bnProcPc
COMMAND bnProc_gen_avx2 .
DEPENDS bnProc_gen_avx2
COMMENT "Generating LDPC bnProc header files for AVX2"
)
add_custom_target(bnProc_gen_avx2_files DEPENDS ${bnProc_headers} ${bnProcPc_headers})
add_custom_command(
# TARGET bnProc_gen_128 POST_BUILD
OUTPUT ${bnProc128_headers} ${bnProcPc128_headers}
COMMAND ${CMAKE_COMMAND} -E make_directory bnProc128
COMMAND ${CMAKE_COMMAND} -E make_directory bnProcPc128
COMMAND bnProc_gen_128 .
DEPENDS bnProc_gen_128
COMMENT "Generating LDPC bnProc header files for 128-bit SIMD"
)
add_custom_target(bnProc_gen_128_files DEPENDS ${bnProc128_headers} ${bnProcPc128_headers})
add_library(bnProc_gen_avx2_HEADERS INTERFACE)
target_include_directories(bnProc_gen_avx2_HEADERS INTERFACE ${CMAKE_CURRENT_BINARY_DIR})
add_dependencies(bnProc_gen_avx2_HEADERS bnProc_gen_avx2_files)
add_library(bnProc_gen_128_HEADERS INTERFACE)
target_include_directories(bnProc_gen_128_HEADERS INTERFACE ${CMAKE_CURRENT_BINARY_DIR})
add_dependencies(bnProc_gen_128_HEADERS bnProc_gen_128_files)
/*
* SPDX-License-Identifier: LicenseRef-CSSL-1.0
*/
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include "../../nrLDPCdecoder_defs.h"
#include "../../nrLDPC_types.h"
void nrLDPC_bnProcPc_BG1_generator_128(const char *dir, int R)
{
const char *ratestr[3]={"13","23","89"};
if (R<0 || R>2) {printf("Illegal R %d\n",R); abort();}
// system("mkdir -p ../ldpc_gen_files");
char fname[FILENAME_MAX+1];
snprintf(fname, sizeof(fname), "%s/bnProcPc128/nrLDPC_bnProcPc_BG1_R%s_128.h", dir, ratestr[R]);
FILE *fd=fopen(fname,"w");
if (fd == NULL) {
printf("Cannot create file %s\n", fname);
abort();
}
fprintf(fd,"#include <stdint.h>\n");
fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
fprintf(fd,"static inline void nrLDPC_bnProcPc_BG1_R%s_128(int8_t* bnProcBuf,int8_t* bnProcBufRes,int8_t* llrRes , int8_t* llrProcBuf, uint16_t Z ) {\n",ratestr[R]);
const uint8_t* lut_numBnInBnGroups;
const uint32_t* lut_startAddrBnGroups;
const uint16_t* lut_startAddrBnGroupsLlr;
if (R==0) {
lut_numBnInBnGroups = lut_numBnInBnGroups_BG1_R13;
lut_startAddrBnGroups = lut_startAddrBnGroups_BG1_R13;
lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG1_R13;
}
else if (R==1){
lut_numBnInBnGroups = lut_numBnInBnGroups_BG1_R23;
lut_startAddrBnGroups = lut_startAddrBnGroups_BG1_R23;
lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG1_R23;
}
else if (R==2) {
lut_numBnInBnGroups = lut_numBnInBnGroups_BG1_R89;
lut_startAddrBnGroups = lut_startAddrBnGroups_BG1_R89;
lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG1_R89;
}
else { printf("aborting, illegal R %d\n",R); fclose(fd);abort();}
// Number of BNs in Groups
uint32_t k;
// Offset to each bit within a group in terms of 32 Byte
uint32_t cnOffsetInGroup;
uint8_t idxBnGroup = 0;
fprintf(fd," // Process group with 1 CN\n");
fprintf(fd," uint32_t M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[0]);
fprintf(fd," simde__m128i* p_bnProcBuf = (simde__m128i*) &bnProcBuf [%u];\n", lut_startAddrBnGroups[idxBnGroup]);
fprintf(fd," simde__m128i* p_bnProcBufRes = (simde__m128i*) &bnProcBufRes [%u];\n", lut_startAddrBnGroups[idxBnGroup]);
fprintf(fd," simde__m128i* p_llrProcBuf = (simde__m128i*) &llrProcBuf [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
fprintf(fd," simde__m128i* p_llrRes = (simde__m128i*) &llrRes [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
fprintf(fd," simde__m128i ymm0, ymm1, ymmRes0, ymmRes1;\n");
fprintf(fd," for (int i=0;i<M;i++) {\n");
fprintf(fd," p_bnProcBufRes[i] = p_llrProcBuf[i];\n");
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
fprintf(fd," ymmRes0 = simde_mm_adds_epi16(ymm0, ymm1);\n");
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
fprintf(fd," ymmRes1 = simde_mm_adds_epi16(ymm0, ymm1);\n");
fprintf(fd," *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
fprintf(fd," p_llrRes++;\n");
fprintf(fd," }\n");
for (uint32_t cnidx=1;cnidx<30;cnidx++) {
// Process group with 4 CNs
if (lut_numBnInBnGroups[cnidx] > 0)
{
// If elements in group move to next address
idxBnGroup++;
fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[cnidx]);
// Set the offset to each CN within a group in terms of 16 Byte
cnOffsetInGroup = (lut_numBnInBnGroups[cnidx]*NR_LDPC_ZMAX)>>4;
// Set pointers to start of group 2
fprintf(fd," p_bnProcBuf = (simde__m128i*) &bnProcBuf [%u];\n", lut_startAddrBnGroups[idxBnGroup]);
fprintf(fd," p_llrProcBuf = (simde__m128i*) &llrProcBuf [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
fprintf(fd," p_llrRes = (simde__m128i*) &llrRes [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
// Loop over BNs
fprintf(fd," for (int i=0;i<M;i++) {\n");
// First 16 LLRs of first CN
fprintf(fd," ymmRes0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
fprintf(fd," ymmRes1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
// Loop over CNs
for (k=1; k<=cnidx; k++)
{
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf[%u + i]);\n", k * cnOffsetInGroup);
fprintf(fd," ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf[%u + i],8));\n", k * cnOffsetInGroup);
fprintf(fd, " ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1); \n");
}
// Add LLR from receiver input
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
fprintf(fd," ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
fprintf(fd," ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1);\n");
// Pack results back to epi8
fprintf(fd," *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
fprintf(fd," p_llrRes++;\n");
fprintf(fd," }\n");
}
}
fprintf(fd,"}\n");
fclose(fd);
}//end of the function nrLDPC_bnProcPc_BG1
/*
* SPDX-License-Identifier: LicenseRef-CSSL-1.0
*/
#include <stdio.h>
#include <stdint.h>
#include "PHY/sse_intrin.h"
#include "../../nrLDPCdecoder_defs.h"
#include "../../nrLDPC_types.h"
void nrLDPC_bnProcPc_BG2_generator_128(const char *dir, int R)
{
const char *ratestr[3]={"15","13","23"};
if (R<0 || R>2) {printf("Illegal R %d\n",R); abort();}
// system("mkdir -p ../ldpc_gen_files");
char fname[FILENAME_MAX+1];
snprintf(fname, sizeof(fname), "%s/bnProcPc128/nrLDPC_bnProcPc_BG2_R%s_128.h", dir, ratestr[R]);
FILE *fd=fopen(fname,"w");
if (fd == NULL) {
printf("Cannot create file %s\n", fname);
abort();
}
fprintf(fd,"#include <stdint.h>\n");
fprintf(fd,"#include \"PHY/sse_intrin.h\"\n");
fprintf(fd,"static inline void nrLDPC_bnProcPc_BG2_R%s_128(int8_t* bnProcBuf,int8_t* bnProcBufRes,int8_t* llrRes , int8_t* llrProcBuf, uint16_t Z ) {\n",ratestr[R]);
const uint8_t* lut_numBnInBnGroups;
const uint32_t* lut_startAddrBnGroups;
const uint16_t* lut_startAddrBnGroupsLlr;
if (R==0) {
lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R15;
lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R15;
lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R15;
}
else if (R==1){
lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R13;
lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R13;
lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R13;
}
else if (R==2) {
lut_numBnInBnGroups = lut_numBnInBnGroups_BG2_R23;
lut_startAddrBnGroups = lut_startAddrBnGroups_BG2_R23;
lut_startAddrBnGroupsLlr = lut_startAddrBnGroupsLlr_BG2_R23;
}
else { printf("aborting, illegal R %d\n",R); fclose(fd);abort();}
// Number of BNs in Groups
uint32_t k;
// Offset to each bit within a group in terms of 32 Byte
uint32_t cnOffsetInGroup;
uint8_t idxBnGroup = 0;
fprintf(fd," // Process group with 1 CN\n");
fprintf(fd," uint32_t M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[0]);
fprintf(fd," simde__m128i* p_bnProcBuf = (simde__m128i*) &bnProcBuf [%u];\n", lut_startAddrBnGroups[idxBnGroup]);
fprintf(fd," simde__m128i* p_bnProcBufRes = (simde__m128i*) &bnProcBufRes [%u];\n", lut_startAddrBnGroups[idxBnGroup]);
fprintf(fd," simde__m128i* p_llrProcBuf = (simde__m128i*) &llrProcBuf [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
fprintf(fd," simde__m128i* p_llrRes = (simde__m128i*) &llrRes [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
fprintf(fd," simde__m128i ymm0, ymm1, ymmRes0, ymmRes1;\n");
fprintf(fd," for (int i=0;i<M;i++) {\n");
fprintf(fd," p_bnProcBufRes[i] = p_llrProcBuf[i];\n");
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
fprintf(fd," ymmRes0 = simde_mm_adds_epi16(ymm0, ymm1);\n");
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
fprintf(fd," ymmRes1 = simde_mm_adds_epi16(ymm0, ymm1);\n");
fprintf(fd," *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
fprintf(fd," p_llrRes++;\n");
fprintf(fd," }\n");
for (uint32_t cnidx=1;cnidx<30;cnidx++) {
// Process group with 4 CNs
if (lut_numBnInBnGroups[cnidx] > 0)
{
// If elements in group move to next address
idxBnGroup++;
fprintf(fd," M = (%d*Z + 15)>>4;\n",lut_numBnInBnGroups[cnidx]);
// Set the offset to each CN within a group in terms of 16 Byte
cnOffsetInGroup = (lut_numBnInBnGroups[cnidx]*NR_LDPC_ZMAX)>>4;
// Set pointers to start of group 2
fprintf(fd," p_bnProcBuf = (simde__m128i*) &bnProcBuf [%u];\n", lut_startAddrBnGroups[idxBnGroup]);
fprintf(fd," p_llrProcBuf = (simde__m128i*) &llrProcBuf [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
fprintf(fd," p_llrRes = (simde__m128i*) &llrRes [%d];\n", lut_startAddrBnGroupsLlr[idxBnGroup]);
// Loop over BNs
fprintf(fd," for (int i=0;i<M;i++) {\n");
// First 16 LLRs of first CN
fprintf(fd," ymmRes0 = simde_mm_cvtepi8_epi16(p_bnProcBuf [i]);\n");
fprintf(fd," ymmRes1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf [i],8));\n");
// Loop over CNs
for (k=1; k<=cnidx; k++)
{
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(p_bnProcBuf[%u + i]);\n", k * cnOffsetInGroup);
fprintf(fd," ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_bnProcBuf[%u + i],8));\n", k * cnOffsetInGroup);
fprintf(fd, " ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1); \n");
}
// Add LLR from receiver input
fprintf(fd," ymm0 = simde_mm_cvtepi8_epi16(p_llrProcBuf[i]);\n");
fprintf(fd," ymmRes0 = simde_mm_adds_epi16(ymmRes0, ymm0);\n");
fprintf(fd," ymm1 = simde_mm_cvtepi8_epi16(simde_mm_srli_si128(p_llrProcBuf[i],8));\n");
fprintf(fd," ymmRes1 = simde_mm_adds_epi16(ymmRes1, ymm1);\n");
// Pack results back to epi8
fprintf(fd," *p_llrRes = simde_mm_packs_epi16(ymmRes0, ymmRes1);\n");
fprintf(fd," p_llrRes++;\n");
fprintf(fd," }\n");
}
}
fprintf(fd,"}\n");
fclose(fd);
}//end of the function nrLDPC_bnProcPc_BG2
#!/bin/bash
# SPDX-License-Identifier: LicenseRef-CSSL-1.0
echo "to build the LDPC decoder headers: go to the build directory, and type"
echo "make/ninja ldpc_generators"
echo
echo "assuming your build directory is ran_build/build, I trigger building for"
echo "you now. The generated headers will be in ran_build/build/ldpc/generator_*/"
echo
cd $OPENAIR_HOME/cmake_targets/ran_build/build
make ldpc_generators || ninja ldpc_generators
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