Commit 1309358b authored by Raymond Knopp's avatar Raymond Knopp

changes for oaisim to function with new threading architecture and...

changes for oaisim to function with new threading architecture and trx_read/trx_write emulation. Tested for 5/10 MHz TM1. Multiple-antenna mode fails.
parent 8d057b80
dev 1 128-ues 207-feature-ued-platform-support 256_QAM_demod 2cw_fairRRscd 340-fix-beamforming-for-multiple-antenna 342-isip-pcie-lib 375-syrtem-sdr-platform 383-ulsch-scheduler-optimization 387-fraunhofer-iis-transmission-mode-4 401-bug-related-to-nr-pucch-format-2-generator 408-reworked 408-ue-main-threads 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 512-dataplane-bug-in-l2nfapi_nos1 5g_fapi_scf FR2_NSA Fix_SA_SIB1 LTE-sidelink LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRPRACH_highSpeed_saankhya NRUE_usedlschparallel NR_10MHz NR_2port_CSIRS NR_CSIRS_tomerge NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_F1C_F1U_extensions NR_FAPI_beamindex_SSB_RO NR_FAPI_beamindex_SSB_RO_SEMPROJ NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_FR2_initsync_fixes NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge-old NR_MAC_SSB NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_MCS_BLER NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_5GRECORDS NR_SA_F1AP_5GRECORDS-USIM NR_SA_F1AP_5GRECORDS-wf-0623 NR_SA_F1AP_5GRECORDS_lts NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_RFSIMULATOR2_SRB NR_SA_F1AP_RFSIMULATOR3 NR_SA_F1AP_RFSIMULATOR3_tmp NR_SA_F1AP_RFSIMULATOR3_wf NR_SA_F1AP_RFSIMULATOR_w5GCN NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SA_w5GCN_new_gtpu NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_CONFIG_REQ_FIXES NR_UE_MAC_scheduler NR_UE_PUCCH_bugfixes NR_UE_RA_fixes NR_UE_SA NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_rework_test NR_UE_reworking_UCI_procedures NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_SCFDMA_100MHz NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_cleanup_PUCCH_resources NR_gNB_SCF_Indication NR_gNB_initial_MIB_fix NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_multiplexing_HARQ_CSI_PUCCH NR_phytest_bugfixes NR_reworking_UL_antennaports NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm New-Merge-sidelink-develop OpInConnect_ISIP PBCHNRTCFIX PUSCH_TA_update PerfumeOldTdd RA_CI_test RFquality RRC-measurements-merge2develop Saankhya_NRPRACH_HighSpeed Test_SA_5GREC UE_DL_DCI_hotfix UpdateRANRemoteUEReport add-dmrs-test add-ru-docker-image add_iris_hw addoptions_nr_USRPdevice avxllr bandwidth-testing bch-fixes-bitmap benetel_5g_prach_fix benetel_config_file_fix benetel_dpdk20 benetel_driver_uldl_pf_merge benetel_driver_update benetel_fixes benetel_phase_rotation benetel_phase_rotation_old block_mmse_receiver_with_whitenning bsr-fix bugfix-find-uci bugfix-free-ra-process bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-nr-t-reordering bugfix-pdcch_order bugfix-x2-SgNBAdditionRequest bugfix_gnb_rt_stats_html bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-fix-module-ul-iperf ci-new-docker-pipeline ci-rd-july-improvements ci-reduce-nb-vms ci-test ci-ul-iperf-from-trf-container ci-yacine ci_benetel_longrun_limits ci_benetel_test ci_fix_iperf_for_module ci_hotfix_module_ue_ip_address ci_improve_module_ctl ci_nsa_benetel ci_nsa_fixes ci_nsa_pipes_improve ci_nsa_test_integration_2021_wk19 ci_nsa_traces ci_nsa_uplink ci_phytest ci_quectel_support ci_sa_rfsim_test ci_solve_ul_for_module ci_test_5GREC ci_test_nsa_fix_quectel_nic ci_test_nsa_on_develop ci_test_ra_fr2 ci_testinfra_as_code ci_vm_resource_fix clean-5G-scope-round2 cleanup_softmodem_main constant_power container_fix container_v1.2.2 debug-UL-5GRECORDS debug_UL_signal debug_branch_init_sync detached-w16-test develop develop-CBRA-v3 develop-CCE develop-FeMBMS develop-NR_SA_F1AP_5GRECORDS develop-NR_SA_F1AP_5GRECORDS-abs develop-NR_SA_F1AP_5GRECORDS-hs develop-NR_SA_F1AP_5GRECORDS-hs1 develop-NR_SA_F1AP_5GRECORDS-lts develop-NR_SA_F1AP_5GRECORDS-lts-wf develop-NR_SA_F1AP_5GRECORDS-v3 develop-NR_SA_F1AP_5GRECORDS_100M develop-NR_SA_F1AP_5GRECORDS_LDPC_FPGA develop-NR_SA_F1AP_5GRECORDS_lfq_0607 develop-SA-CBRA develop-SA-CBRA-CUDU develop-SA-CBRA-Msg5 develop-SA-CBRA-lts develop-SA-CBRA-ulsch-lts develop-SA-RA develop-SnT develop-aarch64build develop-aw2sori develop-ci develop-ci-fju develop-large-scale-emulations develop-m2ap develop-multi-RRUs develop-nb-iot develop-nb-iot-RRC develop-nb-iot-merge develop-nb-iot-merge-w-conflicts develop-nb-iot-ntust develop-nr develop-nr-adding-2018-09-asn1 develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop-sidekiq develop-vco3 develop-wf-du develop_ci develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_inria_ci_deployment_gp_b4merge develop_integration_2019_w44 develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_jenkins_replay develop_stable dfts_alternatives disable_CSI_measrep dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel dlsim-autotests docker-improvements-2021-april docker-no-cache-option documentation docupdate_tools dongzhanyi-zte-0001 dongzhanyi-zte-develop dongzhanyi-zte-develop1 dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dreibh/doxygen-fix dual-connectivity dummy edrx enhance-rfsim enhancement-149-iqtxshift episys-merge episys/nsa_baseline episys/nsa_development extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feat-mac-sock feature-21-TM7 feature-230-tm3_scheduler feature-247-tm89 feature-247-tm89-fixes feature-247-tm89-rebased feature-278-physical-layer-GPU-version feature-309-phy_procedures_eNB_TX_split_to_multi_threading feature-330-turbo_decoder_gpu feature-368-channel-simulator feature-4g-sched feature-68-enb-agent feature-flexran-cm-s1ap feature-nr-4g-nfapi-modifications feature-pdcp-task feature-send-rrc-message-for-wireshark-logging feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes feature_tm3 fedora-gen-kernel-fix fembms-enb-ue fft_bench_hotfix finalize-oaicn-integration firas fix-check fix-ci-tun fix-clock-source fix-compile fix-dirty-ue-same-machine fix-itti fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-nr-pdcp-timer fix-nr-rlc-range-nack fix-physim-deploy fix-quectel fix-realtime fix-retransmission-rbg fix-segfault-flexran-isolated fix-softmodem-restart fix-warnings fix-x2-without-gnb fix_NR_DLUL_PF fix_NR_DLUL_PF_benchmark fix_coreset_dmrs_idx fix_do_ra_data fix_nr_ulsim fix_pdsch_low_prb fix_rb_corruption fix_reestablishment fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun fixgtpu flexran-apps flexran-improvements flexran-repair-mme-mgmt flexran-report-split flexran-rtc-repo-is-public fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 gNB-nrUE-USRP gNB_mwc18_integration generate_push_ptrs git-dashboard gnb-freerun-txru gnb-n300-fixes gnb-only-test gnb-realtime-hotfix gnb-realtime-quickfix gnb-threadpool hack-bch-no-sched-sf-0 hack-exit-gnb-when-no-enb-nsa harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability initial-nfapi-PNF-fixes integ-w13-test-rt-issue integration-develop-nr-2019w45 integration_2020_wk15 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 integration_2021_wk06 integration_2021_wk06_MR978 integration_2021_wk06_b integration_2021_wk06_c integration_2021_wk08 integration_2021_wk08_2 integration_2021_wk08_MR963 integration_2021_wk09 integration_2021_wk09_b integration_2021_wk10 integration_2021_wk10_b integration_2021_wk11 integration_2021_wk12 integration_2021_wk12_b integration_2021_wk13_a integration_2021_wk13_b integration_2021_wk13_b_fix_tdas integration_2021_wk13_b_fixed integration_2021_wk13_c integration_2021_wk14_a integration_2021_wk15_a integration_2021_wk16 integration_2021_wk17_a integration_2021_wk17_b integration_2021_wk18_a integration_2021_wk18_b integration_2021_wk19 integration_2021_wk20_a integration_2021_wk22 integration_2021_wk23 integration_2021_wk27 integration_w5GC_CBRA_test inter-RRU inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip-turbo-decoder-dynamic isip-turbo-decoder-parallel isip_nr issue271_simulator issue392-simplify-s1-nos1step2_01 issue416_nfapicleanup issue_345_l2_fapi_simulator itti-enhancement l2-fixes large_scale_simulations ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_offload_t1 ldpc_short_codeword_fixes load_gnb lte-m-ue_type lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mac-monitoring main_python master mbms-fix-develop-nr merging-2019-w51-to-develop-nr mex_mmse_receiver migrate-cpp-check-container migrate-vm-pipeline-to-bionic minor-fix-doc-basic-sim mobipass-hack modify_fairRRscd_parallel mosaic5g-oai-ran mosaic5g-oai-sim msg4_phy_0303_lfq mu_allocate multi-L1 multi-RRUs multiple_ssb_sib1_bugfix nasmesh_kernel_5.8 new-gtpu new_nos1 new_pdcp new_rlc new_rlc_2020 new_rlc_in_mbms nfapi-L2-emulator nfapi-bugfix nfapi_improvement nfapi_nr_arch_mod nfapi_nr_develop nfapi_nr_develop_new ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-bsr-fix nr-coreset-bug-fix nr-dl-mimo-2layer nr-dlsch-multi-thread nr-dlsch-thread nr-dmrs-fixes nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-multiple-ssb nr-pdcp nr-pdcp-benchmarking nr-pdcp-improvements nr-pdcp-nea2-security nr-pdcp-nia2-integrity nr-pdcp-small-bugfixes nr-pdcp-srb-integrity nr-pdsch-extraction-bugfix nr-physim-update nr-ra-fix nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-stats-print nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-ue-slot-based nr-uldci nrPBCHTCFix nrPbchTcFix nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_ci_dlsim nr_csi_newbranch nr_dci_procedures nr_demo_wsa2019 nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_dlsim_plot nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_flexible_NRBDL nr_improve_build_procedures nr_improve_chanest nr_increase_tp nr_mib_vsa_test nr_pdcch_testing nr_pdcch_updates nr_pdsch_integration nr_polar_decoder_improvement nr_power_measurement_fixes nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_pdcp_fix nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oai_ue_mwc18_integration oairu oairu-dockerfile-support oc-docker-october-improvements ocp_simulator openxg/develop pdcp-benchmark pdsch-ch-est phy-asan-fixes physim-build-deploy physim-deploy-handle-error-cases polar8 prb_based_dl_channel_estimation preprocessor_refactor-2 ptrs_rrc_config pucch2ab pucchsim-multiue pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul rau_rru_reciprocity_measurements recode_itti_from_scratch recursive-cmake reduce_memory_footprint release_v1_2_0_candidate remove-ci-workaround remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert-itti revert_memcpy rh-ci-add-ue-parallelization rh_ci_add_runtime_stats rh_ci_add_uldlharq_stats rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_gsheet_rt_monitoring rh_ci_nsa2jenkins rh_ci_nsa_test_n310 rh_ci_oc rh_ci_phy_test_improve rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_test_benetel rh_ci_test_nsa rh_ci_test_nsa_wk16 rh_ci_test_nsa_wk17_b rh_ci_test_nsa_wk17b rh_ci_test_rfsim_sa rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rhel77-build rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rohan_ulsim2RxFix rrc-enb-phy-testmode rru-txwrite-modification ru-parallel-beamforming ru_rau_enhancement ru_rau_enhancement-external-timing runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-demo-hs sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz sanitize-address sanitize-v1 sanitize-v1-tmp sarma_pvnp_oai schedule-si-fix scs_60_iisc signal-delay sim-channels small-bugfixes-w40 small-config-change small_nr_bugfixes smallcleanup softmodem_cleanup split73 t-gnb-tracer tcri test-5GREC test-nsa-benetel test-panos test-x310-perf test_nsa_gtpu_fix test_rt-fix_phy-test testing_2symb_pdcch testing_with_external_txdata thread-pool tm7-iris tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-dci-false-detection ue-fixes ue-fixes-ota ue-pdsch-pusch-parallel ue-race-fix ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch ues_test_tmp uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test usrp_stop_cleanly usrp_x400 wf-sa-rrc wf_testc wireshark-T-hack-ueid wireshark-log-scheduling-requests wk11-with-phytest workaround-rebased workaround-restart-not-working x2-endc-processing x2-ho x2-ka-test x2_handle_sctp_shutdown x2_neighbor_6cells x2_tdd xiangwab xiangwan xw2 yihongzheng_srb zzs 2021.wk14_a 2021.wk13_d 2021.wk13_c 2021.w27 2021.w26 2021.w25 2021.w24 2021.w23 2021.w22 2021.w20 2021.w19 2021.w18_b 2021.w18_a 2021.w17_b 2021.w16 2021.w15 2021.w14 2021.w13_a 2021.w12 2021.w11 2021.w10 2021.w09 2021.w08 2021.w06 2021.w05 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 2019.w51 2019.w44 2019.w41 2019.w36 2019.w30 2019.w28 2019.w27 2019.w25 2019.w23 2019.w21 2019.w17 2019.w15 2019.w13 2019.w11 2019.w10 2019.w09 2019.w08 2019.w07 2019.w06 2019.w04 2019.w03 2018.w51 2018.w48 2018.w47 2018.w46 2018.w44 2018.w41 2018.w40 2018.w39 2018.w36 2018.w33 2018.w31 2018.w29 2018.w25 2018.w19 2018.w15 2018.w12 2018.w11 2018.w10 2018.w09 2018.w08 2018.w07 2018.w06 2018.w05 2018.w04 2018.w03 2018.w02 2017.w48 2017.w46 2017.w43 2017.w42 2017.w34 2017.w30 2017.w25 2017.w24 2017.w22 2017.w20 2017.w19 2017.w15 2017.w14 2017.w13 2017.w12 2017.w11 2017.w10 2017.w09 2017.w08 2017.w07 2017.w06 2017.w05 2017.w04 2017.w03 2017.w02 2017.w01 2016.w50 2016.w49 v1.2.2 v1.2.1 v1.2.0 v1.1.1 v1.1.0 v1.0.3 v1.0.2 v1.0.1 v1.0.0 v1B0.8 v1B0.7 v1B0.6 v1B0.5 v1B0.4 v1B0.3 v1B0.2 v1B0.1 v0.6.1 v0.6.1_tdd v0.6 v0.5.1_tdd v0.5 v0.4 v0.3 v0.2 osa-etsi-ws-ue osa-etsi-ws-try2 osa-etsi-ws-try1 osa-etsi-ws-gNB oai_nr_sync nr-ip-over-lte nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-pdcch develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 develop-nr-2019w28 develop-nr-2019w23 benetel_phase_rotation benetel_gnb_rel_2.0 benetel_gnb_rel_1.0 benetel_enb_rel_2.0 benetel_enb_rel_1.0
No related merge requests found
...@@ -179,7 +179,7 @@ install_nettle_from_source() { ...@@ -179,7 +179,7 @@ install_nettle_from_source() {
cd /tmp cd /tmp
echo "Downloading nettle archive" echo "Downloading nettle archive"
$SUDO rm -rf /tmp/nettle-2.5.tar.gz* /tmp/nettle-2.5 $SUDO rm -rf /tmp/nettle-2.5.tar.gz* /tmp/nettle-2.5
wget https://ftp.gnu.org/gnu/nettle/nettle-2.5.tar.gz wget http://ftp.nluug.nl/gnu/nettle/nettle-2.5.tar.gz
if [ $? -ne 0 ]; then if [ $? -ne 0 ]; then
wget ftp://ftp.lysator.liu.se/pub/security/lsh/nettle-2.5.tar.gz wget ftp://ftp.lysator.liu.se/pub/security/lsh/nettle-2.5.tar.gz
fi fi
......
...@@ -988,7 +988,8 @@ int phy_init_lte_ue(PHY_VARS_UE *ue, ...@@ -988,7 +988,8 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
ue->total_received_bits[eNB_id] = 0; ue->total_received_bits[eNB_id] = 0;
} }
ue->tx_power_dBm=-127; for (i=0;i<10;i++)
ue->tx_power_dBm[i]=-127;
if (abstraction_flag == 0) { if (abstraction_flag == 0) {
......
...@@ -30,6 +30,8 @@ ...@@ -30,6 +30,8 @@
#include "PHY/defs.h" #include "PHY/defs.h"
#include "PHY/extern.h" #include "PHY/extern.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
#define DEBUG_PHY #define DEBUG_PHY
// Adjust location synchronization point to account for drift // Adjust location synchronization point to account for drift
...@@ -48,6 +50,8 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -48,6 +50,8 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
int diff; int diff;
short Re,Im,ncoef; short Re,Im,ncoef;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_IN);
ncoef = 32767 - coef; ncoef = 32767 - coef;
#ifdef DEBUG_PHY #ifdef DEBUG_PHY
...@@ -98,6 +102,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms, ...@@ -98,6 +102,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
ue->proc.proc_rxtx[0].frame_rx,ue->rx_offset,max_pos,max_pos_fil,temp); ue->proc.proc_rxtx[0].frame_rx,ue->rx_offset,max_pos,max_pos_fil,temp);
#endif //DEBUG_PHY #endif //DEBUG_PHY
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT);
} }
......
...@@ -296,10 +296,10 @@ int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16 ...@@ -296,10 +296,10 @@ int32_t subcarrier_energy(int32_t *,uint32_t, int32_t* subcarrier_energy, uint16
*/ */
int32_t signal_energy_nodc(int32_t *,uint32_t); int32_t signal_energy_nodc(int32_t *,uint32_t);
/*!\fn double signal_energy_fp(double **, double **,uint32_t, uint32_t,uint32_t); /*!\fn double signal_energy_fp(double s_re[2][30720], double s_im[2][30720],uint32_t, uint32_t,uint32_t);
\brief Computes the signal energy per subcarrier \brief Computes the signal energy per subcarrier
*/ */
double signal_energy_fp(double **s_re, double **s_im, uint32_t nb_antennas, uint32_t length,uint32_t offset); double signal_energy_fp(double s_re[2][30720], double s_im[2][30720], uint32_t nb_antennas, uint32_t length,uint32_t offset);
/*!\fn double signal_energy_fp2(struct complex *, uint32_t); /*!\fn double signal_energy_fp2(struct complex *, uint32_t);
\brief Computes the signal energy per subcarrier \brief Computes the signal energy per subcarrier
......
...@@ -255,7 +255,7 @@ int32_t signal_energy_nodc(int32_t *input,uint32_t length) ...@@ -255,7 +255,7 @@ int32_t signal_energy_nodc(int32_t *input,uint32_t length)
} }
#endif #endif
double signal_energy_fp(double **s_re,double **s_im,uint32_t nb_antennas,uint32_t length,uint32_t offset) double signal_energy_fp(double s_re[2][30720],double s_im[2][30720],uint32_t nb_antennas,uint32_t length,uint32_t offset)
{ {
int32_t aa,i; int32_t aa,i;
......
...@@ -612,6 +612,8 @@ typedef struct { ...@@ -612,6 +612,8 @@ typedef struct {
int is_synchronized; int is_synchronized;
/// Data structure for UE process scheduling /// Data structure for UE process scheduling
UE_proc_t proc; UE_proc_t proc;
/// Flag to indicate the UE shouldn't do timing correction at all
int no_timing_correction;
/// \brief Total gain of the TX chain (16-bit baseband I/Q to antenna) /// \brief Total gain of the TX chain (16-bit baseband I/Q to antenna)
uint32_t tx_total_gain_dB; uint32_t tx_total_gain_dB;
/// \brief Total gain of the RX chain (antenna to baseband I/Q) This is a function of rx_gain_mode (and the corresponding gain) and the rx_gain of the card. /// \brief Total gain of the RX chain (antenna to baseband I/Q) This is a function of rx_gain_mode (and the corresponding gain) and the rx_gain of the card.
...@@ -623,9 +625,9 @@ typedef struct { ...@@ -623,9 +625,9 @@ typedef struct {
/// \brief Total gains with bypassed RF gain stage (ExpressMIMO2/Lime) /// \brief Total gains with bypassed RF gain stage (ExpressMIMO2/Lime)
uint32_t rx_gain_byp[4]; uint32_t rx_gain_byp[4];
/// \brief Current transmit power /// \brief Current transmit power
int8_t tx_power_dBm; int8_t tx_power_dBm[10];
/// \brief Total number of REs in current transmission /// \brief Total number of REs in current transmission
int tx_total_RE; int tx_total_RE[10];
/// \brief Maximum transmit power /// \brief Maximum transmit power
int8_t tx_power_max_dBm; int8_t tx_power_max_dBm;
/// \brief Number of eNB seen by UE /// \brief Number of eNB seen by UE
......
...@@ -111,7 +111,7 @@ extern double p_qam64[8]; ...@@ -111,7 +111,7 @@ extern double p_qam64[8];
extern double beta1_dlsch[6][MCS_COUNT]; extern double beta1_dlsch[6][MCS_COUNT];
extern double beta2_dlsch[6][MCS_COUNT]; extern double beta2_dlsch[6][MCS_COUNT];
extern char eNB_functions[5][20]; extern char eNB_functions[6][20];
extern char eNB_timing[2][20]; extern char eNB_timing[2][20];
......
...@@ -718,7 +718,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin ...@@ -718,7 +718,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
frame_tx, frame_tx,
eNB_id, eNB_id,
subframe_tx); subframe_tx);
// LOG_I(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[Mod_id].radioResourceConfigCommon); LOG_D(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,ue->prach_resources[eNB_id],UE_mac_inst[ue->Mod_id].radioResourceConfigCommon);
} }
} }
...@@ -744,17 +744,17 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin ...@@ -744,17 +744,17 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
ue->prach_resources[eNB_id]->ra_RNTI); ue->prach_resources[eNB_id]->ra_RNTI);
if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) { if ((ue->mac_enabled==1) && (mode != calib_prach_tx)) {
ue->tx_power_dBm = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id); ue->tx_power_dBm[subframe_tx] = ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(ue->Mod_id,ue->CC_id,eNB_id);
} }
else { else {
ue->tx_power_dBm = ue->tx_power_max_dBm; ue->tx_power_dBm[subframe_tx] = ue->tx_power_max_dBm;
ue->prach_resources[eNB_id]->ra_PreambleIndex = 19; ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
} }
ue->tx_total_RE = 96; ue->tx_total_RE[subframe_tx] = 96;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm, ue->prach_vars[eNB_id]->amp = get_tx_amp(ue->tx_power_dBm[subframe_tx],
ue->tx_power_max_dBm, ue->tx_power_max_dBm,
ue->frame_parms.N_RB_UL, ue->frame_parms.N_RB_UL,
6); 6);
...@@ -766,7 +766,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin ...@@ -766,7 +766,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
ue->Mod_id, ue->Mod_id,
proc->frame_rx, proc->frame_rx,
proc->subframe_tx, proc->subframe_tx,
ue->tx_power_dBm, ue->tx_power_dBm[subframe_tx],
ue->prach_vars[eNB_id]->amp); ue->prach_vars[eNB_id]->amp);
...@@ -778,7 +778,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin ...@@ -778,7 +778,7 @@ void ue_prach_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n", LOG_D(PHY,"[UE %d][RAPROC] PRACH PL %d dB, power %d dBm, digital power %d dB (amp %d)\n",
ue->Mod_id, ue->Mod_id,
get_PL(ue->Mod_id,ue->CC_id,eNB_id), get_PL(ue->Mod_id,ue->CC_id,eNB_id),
ue->tx_power_dBm, ue->tx_power_dBm[subframe_tx],
dB_fixed(prach_power), dB_fixed(prach_power),
ue->prach_vars[eNB_id]->amp); ue->prach_vars[eNB_id]->amp);
} else { } else {
...@@ -1036,15 +1036,15 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB ...@@ -1036,15 +1036,15 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
if (abstraction_flag == 0) { if (abstraction_flag == 0) {
if (ue->mac_enabled==1) { if (ue->mac_enabled==1) {
pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag); pusch_power_cntl(ue,proc,eNB_id,1, abstraction_flag);
ue->tx_power_dBm = ue->ulsch[eNB_id]->Po_PUSCH; ue->tx_power_dBm[subframe_tx] = ue->ulsch[eNB_id]->Po_PUSCH;
} }
else { else {
ue->tx_power_dBm = ue->tx_power_max_dBm; ue->tx_power_dBm[subframe_tx] = ue->tx_power_max_dBm;
} }
ue->tx_total_RE = nb_rb*12; ue->tx_total_RE[subframe_tx] = nb_rb*12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
tx_amp = get_tx_amp(ue->tx_power_dBm, tx_amp = get_tx_amp(ue->tx_power_dBm[,
ue->tx_power_max_dBm, ue->tx_power_max_dBm,
ue->frame_parms.N_RB_UL, ue->frame_parms.N_RB_UL,
nb_rb); nb_rb);
...@@ -1052,7 +1052,7 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB ...@@ -1052,7 +1052,7 @@ void ue_ulsch_uespec_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB
tx_amp = AMP; tx_amp = AMP;
#endif #endif
LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n", LOG_D(PHY,"[UE %d][PUSCH %d] Frame %d subframe %d, generating PUSCH, Po_PUSCH: %d dBm (max %d dBm), amp %d\n",
Mod_id,harq_pid,frame_tx,subframe_tx,ue->tx_power_dBm,ue->tx_power_max_dBm, tx_amp); Mod_id,harq_pid,frame_tx,subframe_tx,ue->tx_power_dBm[subframe_tx],ue->tx_power_max_dBm, tx_amp);
start_meas(&ue->ulsch_modulation_stats); start_meas(&ue->ulsch_modulation_stats);
ulsch_modulation(ue->common_vars.txdataF, ulsch_modulation(ue->common_vars.txdataF,
tx_amp, tx_amp,
...@@ -1156,8 +1156,8 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin ...@@ -1156,8 +1156,8 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
else { else {
Po_PUCCH = ue->tx_power_max_dBm; Po_PUCCH = ue->tx_power_max_dBm;
} }
ue->tx_power_dBm = Po_PUCCH; ue->tx_power_dBm[subframe_tx] = Po_PUCCH;
ue->tx_total_RE = 12; ue->tx_total_RE[subframe_tx] = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
tx_amp = get_tx_amp(Po_PUCCH, tx_amp = get_tx_amp(Po_PUCCH,
...@@ -1220,8 +1220,8 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin ...@@ -1220,8 +1220,8 @@ void ue_pucch_procedures(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uin
else { else {
Po_PUCCH = ue->tx_power_max_dBm; Po_PUCCH = ue->tx_power_max_dBm;
} }
ue->tx_power_dBm = Po_PUCCH; ue->tx_power_dBm[subframe_tx] = Po_PUCCH;
ue->tx_total_RE = 12; ue->tx_total_RE[subframe_tx] = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) #if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
tx_amp = get_tx_amp(Po_PUCCH, tx_amp = get_tx_amp(Po_PUCCH,
...@@ -1286,7 +1286,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,ui ...@@ -1286,7 +1286,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,ui
//phy_procedures_emos_UE_TX(next_slot); //phy_procedures_emos_UE_TX(next_slot);
#endif #endif
ue->tx_power_dBm=-127; ue->tx_power_dBm[subframe_tx]=-127;
if (abstraction_flag==0) { if (abstraction_flag==0) {
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) { for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
...@@ -1391,6 +1391,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,ui ...@@ -1391,6 +1391,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,ui
(ue->frame_parms.prach_config_common.prach_Config_enabled==1)) { (ue->frame_parms.prach_config_common.prach_Config_enabled==1)) {
// check if we have PRACH opportunity // check if we have PRACH opportunity
if (is_prach_subframe(&ue->frame_parms,frame_tx,subframe_tx)) { if (is_prach_subframe(&ue->frame_parms,frame_tx,subframe_tx)) {
ue_prach_procedures(ue,proc,eNB_id,abstraction_flag,mode); ue_prach_procedures(ue,proc,eNB_id,abstraction_flag,mode);
...@@ -1484,17 +1485,17 @@ void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,UE_rxtx_proc_t *proc, ...@@ -1484,17 +1485,17 @@ void ue_measurement_procedures(uint16_t l, PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,
#endif #endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL, VCD_FUNCTION_OUT); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_GAIN_CONTROL, VCD_FUNCTION_OUT);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_IN);
eNB_id = 0; eNB_id = 0;
if (abstraction_flag == 0) if (abstraction_flag == 0) {
lte_adjust_synch(&ue->frame_parms, if (ue->no_timing_correction==0)
ue, lte_adjust_synch(&ue->frame_parms,
eNB_id, ue,
0, eNB_id,
16384); 0,
16384);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_ADJUST_SYNCH, VCD_FUNCTION_OUT); }
} }
......
...@@ -26,8 +26,8 @@ ...@@ -26,8 +26,8 @@
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/ *******************************************************************************/
void adc(double **r_re, void adc(double r_re[2][30720],
double **r_im, double r_im[2][30720],
unsigned int input_offset, unsigned int input_offset,
unsigned int output_offset, unsigned int output_offset,
unsigned int **output, unsigned int **output,
......
...@@ -31,8 +31,8 @@ ...@@ -31,8 +31,8 @@
#include <stdio.h> #include <stdio.h>
#include "PHY/TOOLS/defs.h" #include "PHY/TOOLS/defs.h"
void dac(double **s_re, void dac(double s_re[2][30720],
double **s_im, double s_im[2][30720],
uint32_t **input, uint32_t **input,
uint32_t input_offset, uint32_t input_offset,
uint32_t nb_tx_antennas, uint32_t nb_tx_antennas,
...@@ -81,8 +81,8 @@ void dac(double **s_re, ...@@ -81,8 +81,8 @@ void dac(double **s_re,
} }
} }
double dac_fixed_gain(double **s_re, double dac_fixed_gain(double s_re[2][30720],
double **s_im, double s_im[2][30720],
uint32_t **input, uint32_t **input,
uint32_t input_offset, uint32_t input_offset,
uint32_t nb_tx_antennas, uint32_t nb_tx_antennas,
......
...@@ -64,16 +64,16 @@ void rf_rx(double **r_re, ...@@ -64,16 +64,16 @@ void rf_rx(double **r_re,
double IQ_imb_dB, double IQ_imb_dB,
double IQ_phase); double IQ_phase);
void rf_rx_simple(double **r_re, void rf_rx_simple(double r_re[2][30720],
double **r_im, double r_im[2][30720],
unsigned int nb_rx_antennas, unsigned int nb_rx_antennas,
unsigned int length, unsigned int length,
double s_time, double s_time,
double rx_gain_dB); double rx_gain_dB);
void adc(double **r_re, void adc(double r_re[2][30720],
double **r_im, double r_im[2][30720],
unsigned int input_offset, unsigned int input_offset,
unsigned int output_offset, unsigned int output_offset,
int **output, int **output,
...@@ -81,8 +81,8 @@ void adc(double **r_re, ...@@ -81,8 +81,8 @@ void adc(double **r_re,
unsigned int length, unsigned int length,
unsigned char B); unsigned char B);
void dac(double **s_re, void dac(double s_re[2][30720],
double **s_im, double s_im[2][30720],
int **input, int **input,
unsigned int input_offset, unsigned int input_offset,
unsigned int nb_tx_antennas, unsigned int nb_tx_antennas,
...@@ -92,8 +92,8 @@ void dac(double **s_re, ...@@ -92,8 +92,8 @@ void dac(double **s_re,
unsigned int meas_length, unsigned int meas_length,
unsigned int meas_offset); unsigned int meas_offset);
double dac_fixed_gain(double **s_re, double dac_fixed_gain(double s_re[2][30720],
double **s_im, double s_im[2][30720],
int **input, int **input,
unsigned int input_offset, unsigned int input_offset,
unsigned int nb_tx_antennas, unsigned int nb_tx_antennas,
......
...@@ -206,8 +206,8 @@ void rf_rx(double **r_re, ...@@ -206,8 +206,8 @@ void rf_rx(double **r_re,
} }
} }
void rf_rx_simple(double **r_re, void rf_rx_simple(double r_re[2][30720],
double **r_im, double r_im[2][30720],
unsigned int nb_rx_antennas, unsigned int nb_rx_antennas,
unsigned int length, unsigned int length,
double s_time, double s_time,
......
...@@ -219,10 +219,10 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx, ...@@ -219,10 +219,10 @@ channel_desc_t *new_channel_desc_scm(uint8_t nb_tx,
int random_channel(channel_desc_t *desc, uint8_t abstraction_flag); int random_channel(channel_desc_t *desc, uint8_t abstraction_flag);
/**\fn void multipath_channel(channel_desc_t *desc, /**\fn void multipath_channel(channel_desc_t *desc,
double **tx_sig_re, double tx_sig_re[2][30720],
double **tx_sig_im, double tx_sig_im[2][30720],
double **rx_sig_re, double rx_sig_re[2][30720],
double **rx_sig_im, double rx_sig_im[2][30720],
uint32_t length, uint32_t length,
uint8_t keep_channel) uint8_t keep_channel)
...@@ -237,10 +237,10 @@ int random_channel(channel_desc_t *desc, uint8_t abstraction_flag); ...@@ -237,10 +237,10 @@ int random_channel(channel_desc_t *desc, uint8_t abstraction_flag);
*/ */
void multipath_channel(channel_desc_t *desc, void multipath_channel(channel_desc_t *desc,
double **tx_sig_re, double tx_sig_re[2][30720],
double **tx_sig_im, double tx_sig_im[2][30720],
double **rx_sig_re, double rx_sig_re[2][30720],
double **rx_sig_im, double rx_sig_im[2][30720],
uint32_t length, uint32_t length,
uint8_t keep_channel); uint8_t keep_channel);
/* /*
......
...@@ -44,10 +44,10 @@ uint8_t multipath_channel_nosigconv(channel_desc_t *desc) ...@@ -44,10 +44,10 @@ uint8_t multipath_channel_nosigconv(channel_desc_t *desc)
//#define CHANNEL_SSE //#define CHANNEL_SSE
#ifdef CHANNEL_SSE #ifdef CHANNEL_SSE
void multipath_channel(channel_desc_t *desc, void multipath_channel(channel_desc_t *desc,
double **tx_sig_re, double tx_sig_re[2][30720],
double **tx_sig_im, double tx_sig_im[2][30720],
double **rx_sig_re, double rx_sig_re[2][30720],
double **rx_sig_im, double rx_sig_im[2][30720],
uint32_t length, uint32_t length,
uint8_t keep_channel) uint8_t keep_channel)
{ {
...@@ -150,10 +150,10 @@ void multipath_channel(channel_desc_t *desc, ...@@ -150,10 +150,10 @@ void multipath_channel(channel_desc_t *desc,
#else #else
void multipath_channel(channel_desc_t *desc, void multipath_channel(channel_desc_t *desc,
double **tx_sig_re, double tx_sig_re[2][30720],
double **tx_sig_im, double tx_sig_im[2][30720],
double **rx_sig_re, double rx_sig_re[2][30720],
double **rx_sig_im, double rx_sig_im[2][30720],
uint32_t length, uint32_t length,
uint8_t keep_channel) uint8_t keep_channel)
{ {
......
...@@ -24,7 +24,7 @@ eNBs = ...@@ -24,7 +24,7 @@ eNBs =
component_carriers = ( component_carriers = (
{ {
node_function = "eNodeB_3GPP"; node_function = "eNodeB_3GPP";
node_timing = "synch_to_other"; node_timing = "synch_to_ext_device";
node_synch_ref = 0; node_synch_ref = 0;
frame_type = "FDD"; frame_type = "FDD";
tdd_config = 3; tdd_config = 3;
......
...@@ -191,7 +191,7 @@ static inline void thread_top_init(char *thread_name, ...@@ -191,7 +191,7 @@ static inline void thread_top_init(char *thread_name,
return &eNB_thread_rxtx_status; return &eNB_thread_rxtx_status;
} }
LOG_I( HW, "[SCHED] eNB RXn-TXnp4 deadline thread (TID %ld) started on CPU %d\n", gettid(), sched_getcpu() ); LOG_I( HW, "[SCHED] eNB %s deadline thread (TID %ld) started on CPU %d\n", gettid(), thread_name,sched_getcpu() );
#else //LOW_LATENCY #else //LOW_LATENCY
int policy, s, j; int policy, s, j;
...@@ -654,7 +654,7 @@ static void* eNB_thread_rxtx( void* param ) { ...@@ -654,7 +654,7 @@ static void* eNB_thread_rxtx( void* param ) {
return &eNB_thread_rxtx_status; return &eNB_thread_rxtx_status;
} }
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME)
/* Wait for eNB application initialization to be complete (eNB registration to MME) */ /* Wait for eNB application initialization to be complete (eNB registration to MME) */
static void wait_system_ready (char *message, volatile int *start_flag) { static void wait_system_ready (char *message, volatile int *start_flag) {
...@@ -1032,7 +1032,7 @@ void rx_fh_if4p5(PHY_VARS_eNB *eNB,int *frame,int *subframe) { ...@@ -1032,7 +1032,7 @@ void rx_fh_if4p5(PHY_VARS_eNB *eNB,int *frame,int *subframe) {
void rx_fh_slave(PHY_VARS_eNB *eNB,int *frame,int *subframe) { void rx_fh_slave(PHY_VARS_eNB *eNB,int *frame,int *subframe) {
// This case is for synchronization to another thread // This case is for synchronization to another thread
// it just waits for an external event. The actual rx_rh is handle by the asynchronous RX thread // it just waits for an external event. The actual rx_fh is handle by the asynchronous RX thread
eNB_proc_t *proc=&eNB->proc; eNB_proc_t *proc=&eNB->proc;
if (wait_on_condition(&proc->mutex_FH,&proc->cond_FH,&proc->instance_cnt_FH,"rx_fh_slave") < 0) if (wait_on_condition(&proc->mutex_FH,&proc->cond_FH,&proc->instance_cnt_FH,"rx_fh_slave") < 0)
...@@ -1129,7 +1129,7 @@ void wakeup_slaves(eNB_proc_t *proc) { ...@@ -1129,7 +1129,7 @@ void wakeup_slaves(eNB_proc_t *proc) {
break; break;
} }
} else { } else {
LOG_W( PHY,"[eNB] Frame %d, FH CC_id %d thread busy!! (cnt_FH %i)\n",slave_proc->frame_rx,slave_proc->CC_id, cnt_slave); LOG_W( PHY,"[eNB] Frame %d, slave CC_id %d thread busy!! (cnt_FH %i)\n",slave_proc->frame_rx,slave_proc->CC_id, cnt_slave);
exit_fun( "FH thread busy" ); exit_fun( "FH thread busy" );
break; break;
} }
...@@ -1161,7 +1161,7 @@ static void* eNB_thread_FH( void* param ) { ...@@ -1161,7 +1161,7 @@ static void* eNB_thread_FH( void* param ) {
wait_sync("eNB_thread_FH"); wait_sync("eNB_thread_FH");
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME)
if (eNB->node_function < NGFI_RRU_IF5) if (eNB->node_function < NGFI_RRU_IF5)
wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB); wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
#endif #endif
...@@ -1273,7 +1273,7 @@ static void* eNB_thread_single( void* param ) { ...@@ -1273,7 +1273,7 @@ static void* eNB_thread_single( void* param ) {
wait_sync("eNB_thread_single"); wait_sync("eNB_thread_single");
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI) && defined(ENABLE_USE_MME)
if (eNB->node_function < NGFI_RRU_IF5) if (eNB->node_function < NGFI_RRU_IF5)
wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB); wait_system_ready ("Waiting for eNB application to be ready %s\r", &start_eNB);
#endif #endif
...@@ -1307,6 +1307,7 @@ static void* eNB_thread_single( void* param ) { ...@@ -1307,6 +1307,7 @@ static void* eNB_thread_single( void* param ) {
subframe++; subframe++;
} }
LOG_D(PHY,"eNB Fronthaul thread, frame %d, subframe %d\n",frame,subframe);
// synchronization on FH interface, acquire signals/data and block // synchronization on FH interface, acquire signals/data and block
if (eNB->rx_fh) eNB->rx_fh(eNB,&frame,&subframe); if (eNB->rx_fh) eNB->rx_fh(eNB,&frame,&subframe);
...@@ -1314,6 +1315,7 @@ static void* eNB_thread_single( void* param ) { ...@@ -1314,6 +1315,7 @@ static void* eNB_thread_single( void* param ) {
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx)); T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
// At this point, all information for subframe has been received on FH interface // At this point, all information for subframe has been received on FH interface
// If this proc is to provide synchronization, do so // If this proc is to provide synchronization, do so
wakeup_slaves(proc); wakeup_slaves(proc);
...@@ -1546,17 +1548,17 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c ...@@ -1546,17 +1548,17 @@ int setup_eNB_buffers(PHY_VARS_eNB **phy_vars_eNB, openair0_config_t *openair0_c
for (i=0; i<frame_parms->nb_antennas_rx; i++) { for (i=0; i<frame_parms->nb_antennas_rx; i++) {
free(phy_vars_eNB[CC_id]->common_vars.rxdata[0][i]); free(phy_vars_eNB[CC_id]->common_vars.rxdata[0][i]);
rxdata[i] = (int32_t*)(32 + malloc16(32+openair0_cfg[phy_vars_eNB[CC_id]->rf_map.card].samples_per_frame*sizeof(int32_t))); // FIXME broken memory allocation rxdata[i] = (int32_t*)(32 + malloc16(32+frame_parms->samples_per_tti*10*sizeof(int32_t))); // FIXME broken memory allocation
phy_vars_eNB[CC_id]->common_vars.rxdata[0][i] = rxdata[i]-N_TA_offset; // N_TA offset for TDD FIXME! N_TA_offset > 16 => access of unallocated memory phy_vars_eNB[CC_id]->common_vars.rxdata[0][i] = rxdata[i]-N_TA_offset; // N_TA offset for TDD FIXME! N_TA_offset > 16 => access of unallocated memory
memset(rxdata[i], 0, openair0_cfg[phy_vars_eNB[CC_id]->rf_map.card].samples_per_frame*sizeof(int32_t)); memset(rxdata[i], 0, frame_parms->samples_per_tti*10*sizeof(int32_t));
printf("rxdata[%d] @ %p (%p) (N_TA_OFFSET %d)\n", i, phy_vars_eNB[CC_id]->common_vars.rxdata[0][i],rxdata[i],N_TA_offset); printf("rxdata[%d] @ %p (%p) (N_TA_OFFSET %d)\n", i, phy_vars_eNB[CC_id]->common_vars.rxdata[0][i],rxdata[i],N_TA_offset);
} }
for (i=0; i<frame_parms->nb_antennas_tx; i++) { for (i=0; i<frame_parms->nb_antennas_tx; i++) {
free(phy_vars_eNB[CC_id]->common_vars.txdata[0][i]); free(phy_vars_eNB[CC_id]->common_vars.txdata[0][i]);
txdata[i] = (int32_t*)(32 + malloc16(32 + openair0_cfg[phy_vars_eNB[CC_id]->rf_map.card].samples_per_frame*sizeof(int32_t))); // FIXME broken memory allocation txdata[i] = (int32_t*)(32 + malloc16(32 + frame_parms->samples_per_tti*10*sizeof(int32_t))); // FIXME broken memory allocation
phy_vars_eNB[CC_id]->common_vars.txdata[0][i] = txdata[i]; phy_vars_eNB[CC_id]->common_vars.txdata[0][i] = txdata[i];
memset(txdata[i],0, openair0_cfg[phy_vars_eNB[CC_id]->rf_map.card].samples_per_frame*sizeof(int32_t)); memset(txdata[i],0, frame_parms->samples_per_tti*10*sizeof(int32_t));
printf("txdata[%d] @ %p\n", i, phy_vars_eNB[CC_id]->common_vars.txdata[0][i]); printf("txdata[%d] @ %p\n", i, phy_vars_eNB[CC_id]->common_vars.txdata[0][i]);
} }
} }
......
...@@ -793,6 +793,16 @@ static void *UE_thread_rxn_txnp4(void *arg) ...@@ -793,6 +793,16 @@ static void *UE_thread_rxn_txnp4(void *arg)
UE->UE_mode[0] = PRACH; UE->UE_mode[0] = PRACH;
} }
} }
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
(UE->frame_parms.frame_type == FDD) ||
(subframe_select( &UE->frame_parms, proc->subframe_tx ) == SF_S)) {
if (UE->mode != loop_through_memory) {
phy_procedures_UE_TX(UE,proc,0,0,normal_txrx,no_relay);
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_RXTX0+(proc->subframe_rx&1), 0 ); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_UE_THREAD_RXTX0+(proc->subframe_rx&1), 0 );
...@@ -967,15 +977,18 @@ void *UE_thread(void *arg) { ...@@ -967,15 +977,18 @@ void *UE_thread(void *arg) {
if (start_rx_stream==0) { if (start_rx_stream==0) {
start_rx_stream=1; start_rx_stream=1;
if (UE->mode != loop_through_memory) { if (UE->mode != loop_through_memory) {
LOG_I(PHY,"Resynchronizing RX by %d samples\n",UE->rx_offset);
rxs = UE->rfdevice.trx_read_func(&UE->rfdevice, if (UE->no_timing_correction==0) {
&timestamp, LOG_I(PHY,"Resynchronizing RX by %d samples\n",UE->rx_offset);
(void**)rxdata, rxs = UE->rfdevice.trx_read_func(&UE->rfdevice,
UE->rx_offset, &timestamp,
UE->frame_parms.nb_antennas_rx); (void**)rxdata,
if (rxs != UE->rx_offset) { UE->rx_offset,
exit_fun("problem in rx"); UE->frame_parms.nb_antennas_rx);
return &UE_thread_retval; if (rxs != UE->rx_offset) {
exit_fun("problem in rx");
return &UE_thread_retval;
}
} }
UE->rx_offset=0; UE->rx_offset=0;
UE->proc.proc_rxtx[0].frame_rx++; UE->proc.proc_rxtx[0].frame_rx++;
...@@ -1049,10 +1062,15 @@ void *UE_thread(void *arg) { ...@@ -1049,10 +1062,15 @@ void *UE_thread(void *arg) {
int instance_cnt_rxtx = ++proc->instance_cnt_rxtx; int instance_cnt_rxtx = ++proc->instance_cnt_rxtx;
proc->subframe_rx=sf; proc->subframe_rx=sf;
proc->subframe_tx=(sf+4)%10; proc->subframe_tx=(sf+4)%10;
proc->frame_tx = proc->frame_rx + (proc->subframe_rx>5)?1:0; proc->frame_tx = proc->frame_rx + ((proc->subframe_rx>5)?1:0);
proc->timestamp_tx = timestamp+(4*UE->frame_parms.samples_per_tti)-UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0; proc->timestamp_tx = timestamp+(4*UE->frame_parms.samples_per_tti)-UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
if (sf != (timestamp/UE->frame_parms.samples_per_tti)%10) {
LOG_E(PHY,"steady-state UE_thread error : frame_rx %d, subframe_rx %d, frame_tx %d, subframe_tx %d, rx subframe %d\n",proc->frame_rx,proc->subframe_rx,proc->frame_tx,proc->subframe_tx,(timestamp/UE->frame_parms.samples_per_tti)%10);
exit(-1);
}
if (pthread_mutex_unlock(&proc->mutex_rxtx) != 0) { if (pthread_mutex_unlock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX\n" ); LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX\n" );
exit_fun("nothing to add"); exit_fun("nothing to add");
......
...@@ -437,9 +437,14 @@ void do_UL_sig(channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX][MAX_N ...@@ -437,9 +437,14 @@ void do_UL_sig(channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX][MAX_N
txdata = PHY_vars_UE_g[UE_id][CC_id]->common_vars.txdata; txdata = PHY_vars_UE_g[UE_id][CC_id]->common_vars.txdata;
sf_offset = subframe*frame_parms->samples_per_tti; sf_offset = subframe*frame_parms->samples_per_tti;
if (((double)PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm + if (((double)PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe] +
UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB) <= -125.0) { UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB) <= -125.0) {
// don't simulate a UE that is too weak // don't simulate a UE that is too weak
LOG_D(OCM,"[SIM][UL] UE %d tx_pwr %d dBm (num_RE %d) for subframe %d (sf_offset %d)\n",
UE_id,
PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe],
PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe],
subframe,sf_offset);
} else { } else {
tx_pwr = dac_fixed_gain((double**)s_re, tx_pwr = dac_fixed_gain((double**)s_re,
...@@ -451,13 +456,13 @@ void do_UL_sig(channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX][MAX_N ...@@ -451,13 +456,13 @@ void do_UL_sig(channel_desc_t *UE2eNB[NUMBER_OF_UE_MAX][NUMBER_OF_eNB_MAX][MAX_N
sf_offset, sf_offset,
frame_parms->ofdm_symbol_size, frame_parms->ofdm_symbol_size,
14, 14,
(double)PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm-10*log10((double)PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE), (double)PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe]-10*log10((double)PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe]),
PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE); // This make the previous argument the total power PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe]); // This make the previous argument the total power
LOG_D(OCM,"[SIM][UL] UE %d tx_pwr %f dBm (target %d dBm, num_RE %d) for subframe %d (sf_offset %d)\n", LOG_D(OCM,"[SIM][UL] UE %d tx_pwr %f dBm (target %d dBm, num_RE %d) for subframe %d (sf_offset %d)\n",
UE_id, UE_id,
10*log10(tx_pwr), 10*log10(tx_pwr),
PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm, PHY_vars_UE_g[UE_id][CC_id]->tx_power_dBm[subframe],
PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE, PHY_vars_UE_g[UE_id][CC_id]->tx_total_RE[subframe],
subframe,sf_offset); subframe,sf_offset);
......
...@@ -139,8 +139,10 @@ node_desc_t *ue_data[NUMBER_OF_UE_MAX]; ...@@ -139,8 +139,10 @@ node_desc_t *ue_data[NUMBER_OF_UE_MAX];
pthread_cond_t sync_cond; pthread_cond_t sync_cond;
pthread_mutex_t sync_mutex; pthread_mutex_t sync_mutex;
int sync_var; int sync_var=-1;
pthread_mutex_t subframe_mutex;
int subframe_eNB_mask=0,subframe_UE_mask=0;
openair0_config_t openair0_cfg[MAX_CARDS]; openair0_config_t openair0_cfg[MAX_CARDS];
uint32_t downlink_frequency[MAX_NUM_CCs][4]; uint32_t downlink_frequency[MAX_NUM_CCs][4];
...@@ -451,6 +453,10 @@ typedef enum l2l1_task_state_e { ...@@ -451,6 +453,10 @@ typedef enum l2l1_task_state_e {
l2l1_task_state_t l2l1_state = L2L1_WAITTING; l2l1_task_state_t l2l1_state = L2L1_WAITTING;
extern openair0_timestamp current_eNB_rx_timestamp[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
extern openair0_timestamp current_UE_rx_timestamp[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
/*------------------------------------------------------------------------------*/ /*------------------------------------------------------------------------------*/
void * void *
l2l1_task (void *args_p) l2l1_task (void *args_p)
...@@ -719,6 +725,40 @@ l2l1_task (void *args_p) ...@@ -719,6 +725,40 @@ l2l1_task (void *args_p)
clear_eNB_transport_info (oai_emulation.info.nb_enb_local); clear_eNB_transport_info (oai_emulation.info.nb_enb_local);
CC_id=0;
int all_done=0;
while (all_done==0) {
pthread_mutex_lock(&subframe_mutex);
int subframe_eNB_mask_local = subframe_eNB_mask;
int subframe_UE_mask_local = subframe_UE_mask;
pthread_mutex_unlock(&subframe_mutex);
LOG_D(EMU,"Frame %d, Subframe %d: Checking masks %x,%x\n",frame,sf,subframe_eNB_mask,subframe_UE_mask);
if ((subframe_eNB_mask_local == ((1<<NB_eNB_INST)-1)) &&
(subframe_UE_mask_local == ((1<<NB_UE_INST)-1)))
all_done=1;
else
usleep(500);
}
//clear subframe masks for next round
pthread_mutex_lock(&subframe_mutex);
subframe_eNB_mask=0;
subframe_UE_mask=0;
pthread_mutex_unlock(&subframe_mutex);
// increment timestamps
for (eNB_inst = oai_emulation.info.first_enb_local;
(eNB_inst
< (oai_emulation.info.first_enb_local
+ oai_emulation.info.nb_enb_local));
eNB_inst++) {
current_eNB_rx_timestamp[eNB_inst][CC_id] += PHY_vars_eNB_g[eNB_inst][CC_id]->frame_parms.samples_per_tti;
}
for (UE_inst = 0; UE_inst<NB_UE_INST;UE_inst++) {
current_UE_rx_timestamp[UE_inst][CC_id] += PHY_vars_UE_g[UE_inst][CC_id]->frame_parms.samples_per_tti;
}
for (eNB_inst = oai_emulation.info.first_enb_local; for (eNB_inst = oai_emulation.info.first_enb_local;
(eNB_inst (eNB_inst
< (oai_emulation.info.first_enb_local < (oai_emulation.info.first_enb_local
...@@ -727,6 +767,7 @@ l2l1_task (void *args_p) ...@@ -727,6 +767,7 @@ l2l1_task (void *args_p)
if (oai_emulation.info.cli_start_enb[eNB_inst] != 0) { if (oai_emulation.info.cli_start_enb[eNB_inst] != 0) {
T(T_ENB_MASTER_TICK, T_INT(eNB_inst), T_INT(frame % 1024), T_INT(sf)); T(T_ENB_MASTER_TICK, T_INT(eNB_inst), T_INT(frame % 1024), T_INT(sf));
/*
LOG_D(EMU, LOG_D(EMU,
"PHY procedures eNB %d for frame %d, subframe %d TDD %d/%d Nid_cell %d\n", "PHY procedures eNB %d for frame %d, subframe %d TDD %d/%d Nid_cell %d\n",
eNB_inst, eNB_inst,
...@@ -736,7 +777,7 @@ l2l1_task (void *args_p) ...@@ -736,7 +777,7 @@ l2l1_task (void *args_p)
PHY_vars_eNB_g[eNB_inst][0]->frame_parms.tdd_config, PHY_vars_eNB_g[eNB_inst][0]->frame_parms.tdd_config,
PHY_vars_eNB_g[eNB_inst][0]->frame_parms.Nid_cell); PHY_vars_eNB_g[eNB_inst][0]->frame_parms.Nid_cell);
*/
#ifdef OPENAIR2 #ifdef OPENAIR2
//Application: traffic gen //Application: traffic gen
update_otg_eNB (eNB_inst, oai_emulation.info.time_ms); update_otg_eNB (eNB_inst, oai_emulation.info.time_ms);
...@@ -744,35 +785,8 @@ l2l1_task (void *args_p) ...@@ -744,35 +785,8 @@ l2l1_task (void *args_p)
//IP/OTG to PDCP and PDCP to IP operation //IP/OTG to PDCP and PDCP to IP operation
// pdcp_run (frame, 1, 0, eNB_inst); //PHY_vars_eNB_g[eNB_id]->Mod_id // pdcp_run (frame, 1, 0, eNB_inst); //PHY_vars_eNB_g[eNB_id]->Mod_id
#endif #endif
CC_id=0;
// trigger synch event to RAN FH thread for CC_id
eNB_proc_t *proc = &PHY_vars_eNB_g[eNB_inst][CC_id]->proc;
if (pthread_mutex_lock(&proc->mutex_FH) != 0) {
LOG_E( PHY, "error locking mutex for FH\n");
exit_fun( "error locking mutex" );
break;
}
int cnt_FH = ++proc->instance_cnt_FH;
proc->frame_rx = frame;
proc->subframe_rx = sf;
proc->timestamp_rx += PHY_vars_eNB_g[eNB_inst][CC_id]->frame_parms.samples_per_tti;
pthread_mutex_unlock( &proc->mutex_FH );
if (cnt_FH == 0) {
if (pthread_cond_signal(&proc->cond_FH) != 0) {
LOG_E(PHY,"ERROR pthread_cond_signal for eNB FH CCid %d\n",proc->CC_id);
exit_fun("ERROR pthread_cond_signal");
break;
}
}
else {
LOG_W(PHY,"[eNB] Frame %d, FH CC_id %d thread busy!! (cnt_FH %d)\n",proc->instance_cnt_FH);
exit_fun("FH thread busy");
break;
}
#ifdef PRINT_STATS #ifdef PRINT_STATS
if((sf==9) && frame%10==0) if((sf==9) && frame%10==0)
...@@ -1099,6 +1113,10 @@ main (int argc, char **argv) ...@@ -1099,6 +1113,10 @@ main (int argc, char **argv)
sinr_dB = -20; sinr_dB = -20;
} }
pthread_cond_init(&sync_cond,NULL);
pthread_mutex_init(&sync_mutex, NULL);
pthread_mutex_init(&subframe_mutex, NULL);
#ifdef OPENAIR2 #ifdef OPENAIR2
init_omv (); init_omv ();
#endif #endif
...@@ -1116,6 +1134,15 @@ main (int argc, char **argv) ...@@ -1116,6 +1134,15 @@ main (int argc, char **argv)
init_openair2 (); init_openair2 ();
init_ocm (); init_ocm ();
// wait for all threads to startup
sleep(3);
printf("Sending sync to all threads\n");
pthread_mutex_lock(&sync_mutex);
sync_var=0;
pthread_cond_broadcast(&sync_cond);
pthread_mutex_unlock(&sync_mutex);
#ifdef SMBV #ifdef SMBV
// Rohde&Schwarz SMBV100A vector signal generator // Rohde&Schwarz SMBV100A vector signal generator
......
...@@ -456,7 +456,7 @@ int olg_config(void) ...@@ -456,7 +456,7 @@ int olg_config(void)
set_comp_log(PHY, LOG_TRACE, 0x15, 1); set_comp_log(PHY, LOG_TRACE, 0x15, 1);
set_comp_log(PDCP, LOG_DEBUG, 0x15,1); set_comp_log(PDCP, LOG_DEBUG, 0x15,1);
set_comp_log(RRC, LOG_DEBUG, 0x15,1); set_comp_log(RRC, LOG_DEBUG, 0x15,1);
set_comp_log(OCM, LOG_ERR, 0x15,20); set_comp_log(OCM, LOG_DEBUG, 0x15,20);
set_comp_log(OTG, LOG_DEBUG, 0x15,1); set_comp_log(OTG, LOG_DEBUG, 0x15,1);
set_comp_log(OMG, LOG_NOTICE, 0x15,1); set_comp_log(OMG, LOG_NOTICE, 0x15,1);
set_comp_log(OPT, LOG_ERR, 0x15,1); set_comp_log(OPT, LOG_ERR, 0x15,1);
......
...@@ -957,6 +957,11 @@ void init_seed(uint8_t set_seed) ...@@ -957,6 +957,11 @@ void init_seed(uint8_t set_seed)
} }
} }
openair0_timestamp current_eNB_rx_timestamp[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
openair0_timestamp current_UE_rx_timestamp[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
openair0_timestamp last_eNB_rx_timestamp[NUMBER_OF_eNB_MAX][MAX_NUM_CCs];
openair0_timestamp last_UE_rx_timestamp[NUMBER_OF_UE_MAX][MAX_NUM_CCs];
int eNB_trx_start(openair0_device *device) { int eNB_trx_start(openair0_device *device) {
return(0); return(0);
} }
...@@ -990,53 +995,134 @@ int UE_trx_set_gains(openair0_device *device, openair0_config_t *openair0_cfg) { ...@@ -990,53 +995,134 @@ int UE_trx_set_gains(openair0_device *device, openair0_config_t *openair0_cfg) {
return(0); return(0);
} }
int eNB_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) { extern pthread_mutex_t subframe_mutex;
return(0); extern int subframe_eNB_mask,subframe_UE_mask;
}
int UE_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) {
return(0);
}
int eNB_trx_write(openair0_device *device,openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) { int eNB_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) {
int eNB_id = device->Mod_id; int eNB_id = device->Mod_id;
int CC_id = device->CC_id; int CC_id = device->CC_id;
int UE_id;
int subframe = (timestamp/PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.samples_per_tti)%10;
for (UE_id=0;UE_id<=NB_UE_INST;UE_id++) { int subframe;
do_DL_sig(eNB2UE, int ready_for_new_subframe=0;
int subframe_eNB_mask_local;
int sample_count=0;
*ptimestamp = last_eNB_rx_timestamp[eNB_id][CC_id];
LOG_D(PHY,"eNB_trx_read nsamps %d TS(%llu,%llu) => subframe %d\n",nsamps,
(unsigned long long)current_eNB_rx_timestamp[eNB_id][CC_id],
(unsigned long long)last_eNB_rx_timestamp[eNB_id][CC_id],
(*ptimestamp/PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.samples_per_tti)%10);
// if we're at a subframe boundary generate UL signals for this eNB
while (sample_count<nsamps) {
while (current_eNB_rx_timestamp[eNB_id][CC_id]<
(nsamps+last_eNB_rx_timestamp[eNB_id][CC_id])) {
LOG_D(EMU,"eNB: current TS %llu, last TS %llu, sleeping\n",current_eNB_rx_timestamp[eNB_id][CC_id],last_eNB_rx_timestamp[eNB_id][CC_id]);
usleep(500);
}
// tell top-level we are busy
pthread_mutex_lock(&subframe_mutex);
subframe_eNB_mask|=(1<<eNB_id);
pthread_mutex_unlock(&subframe_mutex);
subframe = (last_eNB_rx_timestamp[eNB_id][CC_id]/PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.samples_per_tti)%10;
LOG_D(PHY,"eNB_trx_read generating UL subframe %d (Ts %llu, current TS %llu)\n",
subframe,(unsigned long long)*ptimestamp,
(unsigned long long)current_eNB_rx_timestamp[eNB_id][CC_id]);
do_UL_sig(UE2eNB,
enb_data, enb_data,
ue_data, ue_data,
subframe, subframe,
0, //abstraction_flag, 0, // abstraction_flag
&PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms, &PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms,
UE_id, 0, // frame is only used for abstraction
eNB_id,
CC_id); CC_id);
last_eNB_rx_timestamp[eNB_id][CC_id] += PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.samples_per_tti;
sample_count += PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.samples_per_tti;
} }
return(0);
return(nsamps);
} }
int UE_trx_write(openair0_device *device,openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) { int UE_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **buff, int nsamps, int cc) {
int UE_id = device->Mod_id; int UE_id = device->Mod_id;
int CC_id = device->CC_id; int CC_id = device->CC_id;
int eNB_id; int subframe;
int subframe = (timestamp/PHY_vars_UE_g[UE_id][CC_id]->frame_parms.samples_per_tti)%10; int ready_for_new_subframe=0;
int subframe_UE_mask_local;
int sample_count=0;
int read_size;
*ptimestamp = last_UE_rx_timestamp[UE_id][CC_id];
LOG_D(PHY,"UE_trx_read nsamps %d TS(%llu,%llu)\n",nsamps,
(unsigned long long)current_UE_rx_timestamp[UE_id][CC_id],
(unsigned long long)last_UE_rx_timestamp[UE_id][CC_id]);
if (nsamps < PHY_vars_UE_g[UE_id][CC_id]->frame_parms.samples_per_tti)
read_size = nsamps;
else
read_size = PHY_vars_UE_g[UE_id][CC_id]->frame_parms.samples_per_tti;
while (sample_count<nsamps) {
while (current_UE_rx_timestamp[UE_id][CC_id] <
(last_UE_rx_timestamp[UE_id][CC_id]+read_size)) {
LOG_D(EMU,"UE_trx_read : current TS %d, last TS %d, sleeping\n",current_UE_rx_timestamp[UE_id][CC_id],last_UE_rx_timestamp[UE_id][CC_id]);
usleep(500);
}
for (eNB_id=0;eNB_id<=NB_eNB_INST;eNB_id++) { LOG_D(EMU,"UE_trx_read : current TS %d, last TS %d, sleeping\n",current_UE_rx_timestamp[UE_id][CC_id],last_UE_rx_timestamp[UE_id][CC_id]);
do_UL_sig(UE2eNB,
// tell top-level we are busy
pthread_mutex_lock(&subframe_mutex);
subframe_UE_mask|=(1<<UE_id);
pthread_mutex_unlock(&subframe_mutex);
// if we didn't ask for at least a subframe's worth of samples return
// otherwise we have one subframe here so generate the received signal
subframe = (last_UE_rx_timestamp[UE_id][CC_id]/PHY_vars_UE_g[UE_id][CC_id]->frame_parms.samples_per_tti)%10;
if ((last_UE_rx_timestamp[UE_id][CC_id]%PHY_vars_UE_g[UE_id][CC_id]->frame_parms.samples_per_tti) > 0)
subframe++;
last_UE_rx_timestamp[UE_id][CC_id] += read_size;
sample_count += read_size;
if (subframe > 9)
return(nsamps);
LOG_D(PHY,"UE_trx_read generating DL subframe %d (Ts %llu, current TS %llu)\n",
subframe,(unsigned long long)*ptimestamp,
(unsigned long long)current_UE_rx_timestamp[UE_id][CC_id]);
do_DL_sig(eNB2UE,
enb_data, enb_data,
ue_data, ue_data,
subframe, subframe,
0, // abstraction_flag 0, //abstraction_flag,
&PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms, &PHY_vars_UE_g[UE_id][CC_id]->frame_parms,
0, // frame is only used for abstraction UE_id,
eNB_id,
CC_id); CC_id);
} }
return(0);
return(nsamps);
}
int eNB_trx_write(openair0_device *device,openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) {
return(nsamps);
}
int UE_trx_write(openair0_device *device,openair0_timestamp timestamp, void **buff, int nsamps, int cc, int flags) {
return(nsamps);
} }
void init_devices(void){ void init_devices(void){
...@@ -1055,8 +1141,10 @@ void init_devices(void){ ...@@ -1055,8 +1141,10 @@ void init_devices(void){
PHY_vars_eNB_g[eNB_id][CC_id]->rfdevice.trx_stop_func = eNB_trx_stop; PHY_vars_eNB_g[eNB_id][CC_id]->rfdevice.trx_stop_func = eNB_trx_stop;
PHY_vars_eNB_g[eNB_id][CC_id]->rfdevice.trx_set_freq_func = eNB_trx_set_freq; PHY_vars_eNB_g[eNB_id][CC_id]->rfdevice.trx_set_freq_func = eNB_trx_set_freq;
PHY_vars_eNB_g[eNB_id][CC_id]->rfdevice.trx_set_gains_func = eNB_trx_set_gains; PHY_vars_eNB_g[eNB_id][CC_id]->rfdevice.trx_set_gains_func = eNB_trx_set_gains;
current_eNB_rx_timestamp[eNB_id][CC_id] = PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.samples_per_tti;
last_eNB_rx_timestamp[eNB_id][CC_id] = 0;
} }
for (UE_id=0;UE_id<NB_eNB_INST;UE_id++) { for (UE_id=0;UE_id<NB_UE_INST;UE_id++) {
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.Mod_id = UE_id; PHY_vars_UE_g[UE_id][CC_id]->rfdevice.Mod_id = UE_id;
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.CC_id = CC_id; PHY_vars_UE_g[UE_id][CC_id]->rfdevice.CC_id = CC_id;
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_start_func = UE_trx_start; PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_start_func = UE_trx_start;
...@@ -1066,6 +1154,9 @@ void init_devices(void){ ...@@ -1066,6 +1154,9 @@ void init_devices(void){
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_stop_func = UE_trx_stop; PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_stop_func = UE_trx_stop;
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_set_freq_func = UE_trx_set_freq; PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_set_freq_func = UE_trx_set_freq;
PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_set_gains_func = UE_trx_set_gains; PHY_vars_UE_g[UE_id][CC_id]->rfdevice.trx_set_gains_func = UE_trx_set_gains;
current_UE_rx_timestamp[UE_id][CC_id] = PHY_vars_UE_g[UE_id][CC_id]->frame_parms.samples_per_tti;
last_UE_rx_timestamp[UE_id][CC_id] = 0;
} }
} }
} }
...@@ -1123,7 +1214,11 @@ void init_openair1(void) ...@@ -1123,7 +1214,11 @@ void init_openair1(void)
//N_TA_offset //N_TA_offset
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) { for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
for (UE_id=0; UE_id<NB_UE_INST; UE_id++) { for (UE_id=0; UE_id<NB_UE_INST; UE_id++) {
PHY_vars_UE_g[UE_id][CC_id]->use_ia_receiver = 0;
PHY_vars_UE_g[UE_id][CC_id]->use_ia_receiver = 0;
PHY_vars_UE_g[UE_id][CC_id]->mode = normal_txrx;
PHY_vars_UE_g[UE_id][CC_id]->mac_enabled = 1;
PHY_vars_UE_g[UE_id][CC_id]->no_timing_correction = 1;
if (PHY_vars_UE_g[UE_id][CC_id]->frame_parms.frame_type == TDD) { if (PHY_vars_UE_g[UE_id][CC_id]->frame_parms.frame_type == TDD) {
if (PHY_vars_UE_g[UE_id][CC_id]->frame_parms.N_RB_DL == 100) if (PHY_vars_UE_g[UE_id][CC_id]->frame_parms.N_RB_DL == 100)
...@@ -1396,7 +1491,7 @@ void update_ocm() ...@@ -1396,7 +1491,7 @@ void update_ocm()
enb_data[eNB_id]->tx_power_dBm = PHY_vars_eNB_g[eNB_id][0]->frame_parms.pdsch_config_common.referenceSignalPower; enb_data[eNB_id]->tx_power_dBm = PHY_vars_eNB_g[eNB_id][0]->frame_parms.pdsch_config_common.referenceSignalPower;
for (UE_id = 0; UE_id < NB_UE_INST; UE_id++) for (UE_id = 0; UE_id < NB_UE_INST; UE_id++)
ue_data[UE_id]->tx_power_dBm = PHY_vars_UE_g[UE_id][0]->tx_power_dBm; ue_data[UE_id]->tx_power_dBm = PHY_vars_UE_g[UE_id][0]->tx_power_dBm[0];
/* check if the openair channel model is activated used for PHY abstraction : path loss*/ /* check if the openair channel model is activated used for PHY abstraction : path loss*/
...@@ -1450,10 +1545,10 @@ void update_ocm() ...@@ -1450,10 +1545,10 @@ void update_ocm()
UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB = -132.24 + sinr_dB - PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.pdsch_config_common.referenceSignalPower; UE2eNB[UE_id][eNB_id][CC_id]->path_loss_dB = -132.24 + sinr_dB - PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.pdsch_config_common.referenceSignalPower;
} }
LOG_I(OCM,"Path loss from eNB %d to UE %d (CCid %d)=> %f dB (eNB TX %d, SNR %f)\n",eNB_id,UE_id,CC_id, LOG_D(OCM,"Path loss from eNB %d to UE %d (CCid %d)=> %f dB (eNB TX %d, SNR %f)\n",eNB_id,UE_id,CC_id,
eNB2UE[eNB_id][UE_id][CC_id]->path_loss_dB, eNB2UE[eNB_id][UE_id][CC_id]->path_loss_dB,
PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.pdsch_config_common.referenceSignalPower,snr_dB); PHY_vars_eNB_g[eNB_id][CC_id]->frame_parms.pdsch_config_common.referenceSignalPower,snr_dB);
// printf("[SIM] Path loss from UE %d to eNB %d => %f dB\n",UE_id,eNB_id,UE2eNB[UE_id][eNB_id]->path_loss_dB);
} }
} }
} }
...@@ -1721,3 +1816,14 @@ void init_time() ...@@ -1721,3 +1816,14 @@ void init_time()
td_avg = TARGET_SF_TIME_NS; td_avg = TARGET_SF_TIME_NS;
} }
int openair0_transport_load(openair0_device *device, openair0_config_t *openair0_cfg, eth_params_t * eth_params) {
return(0);
}
int openair0_device_load(openair0_device *device, openair0_config_t *openair0_cfg) {
return(0);
}
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment